106 lines · cpp
1//=== LoongArchDeadRegisterDefinitions.cpp - Replace dead defs w/ zero reg ===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===---------------------------------------------------------------------===//8//9// This pass rewrites Rd to r0 for instrs whose return values are unused.10//11//===---------------------------------------------------------------------===//12 13#include "LoongArch.h"14#include "LoongArchSubtarget.h"15#include "llvm/ADT/Statistic.h"16#include "llvm/CodeGen/LiveDebugVariables.h"17#include "llvm/CodeGen/LiveIntervals.h"18#include "llvm/CodeGen/LiveStacks.h"19#include "llvm/CodeGen/MachineFunctionPass.h"20 21using namespace llvm;22#define DEBUG_TYPE "loongarch-dead-defs"23#define LoongArch_DEAD_REG_DEF_NAME "LoongArch Dead register definitions"24 25STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced");26 27namespace {28class LoongArchDeadRegisterDefinitions : public MachineFunctionPass {29public:30 static char ID;31 32 LoongArchDeadRegisterDefinitions() : MachineFunctionPass(ID) {}33 bool runOnMachineFunction(MachineFunction &MF) override;34 void getAnalysisUsage(AnalysisUsage &AU) const override {35 AU.setPreservesCFG();36 AU.addRequired<LiveIntervalsWrapperPass>();37 AU.addPreserved<LiveIntervalsWrapperPass>();38 AU.addRequired<LiveIntervalsWrapperPass>();39 AU.addPreserved<SlotIndexesWrapperPass>();40 AU.addPreserved<LiveDebugVariablesWrapperLegacy>();41 AU.addPreserved<LiveStacksWrapperLegacy>();42 MachineFunctionPass::getAnalysisUsage(AU);43 }44 45 StringRef getPassName() const override { return LoongArch_DEAD_REG_DEF_NAME; }46};47} // end anonymous namespace48 49char LoongArchDeadRegisterDefinitions::ID = 0;50INITIALIZE_PASS(LoongArchDeadRegisterDefinitions, DEBUG_TYPE,51 LoongArch_DEAD_REG_DEF_NAME, false, false)52 53FunctionPass *llvm::createLoongArchDeadRegisterDefinitionsPass() {54 return new LoongArchDeadRegisterDefinitions();55}56 57bool LoongArchDeadRegisterDefinitions::runOnMachineFunction(58 MachineFunction &MF) {59 if (skipFunction(MF.getFunction()))60 return false;61 62 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();63 LiveIntervals &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();64 LLVM_DEBUG(dbgs() << "***** LoongArchDeadRegisterDefinitions *****\n");65 66 bool MadeChange = false;67 for (MachineBasicBlock &MBB : MF) {68 for (MachineInstr &MI : MBB) {69 // We only handle non-computational instructions.70 const MCInstrDesc &Desc = MI.getDesc();71 if (!Desc.mayLoad() && !Desc.mayStore() &&72 !Desc.hasUnmodeledSideEffects())73 continue;74 for (int I = 0, E = Desc.getNumDefs(); I != E; ++I) {75 MachineOperand &MO = MI.getOperand(I);76 if (!MO.isReg() || !MO.isDef() || MO.isEarlyClobber())77 continue;78 // Be careful not to change the register if it's a tied operand.79 if (MI.isRegTiedToUseOperand(I)) {80 LLVM_DEBUG(dbgs() << " Ignoring, def is tied operand.\n");81 continue;82 }83 Register Reg = MO.getReg();84 if (!Reg.isVirtual() || !MO.isDead())85 continue;86 LLVM_DEBUG(dbgs() << " Dead def operand #" << I << " in:\n ";87 MI.print(dbgs()));88 const TargetRegisterClass *RC = TII->getRegClass(Desc, I);89 if (!(RC && RC->contains(LoongArch::R0))) {90 LLVM_DEBUG(dbgs() << " Ignoring, register is not a GPR.\n");91 continue;92 }93 assert(LIS.hasInterval(Reg));94 LIS.removeInterval(Reg);95 MO.setReg(LoongArch::R0);96 LLVM_DEBUG(dbgs() << " Replacing with zero register. New:\n ";97 MI.print(dbgs()));98 ++NumDeadDefsReplaced;99 MadeChange = true;100 }101 }102 }103 104 return MadeChange;105}106