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1//=- LoongArchLASXInstrInfo.td - LoongArch LASX instructions -*- tablegen -*-=//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file describes the Advanced SIMD extension instructions.10//11//===----------------------------------------------------------------------===//12 13def SDT_LoongArchXVPERM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0, 1>,14 SDTCisVec<2>, SDTCisInt<2>]>;15def SDT_LoongArchXVREPLVE0 : SDTypeProfile<1, 1, [SDTCisVec<0>,16 SDTCisSameAs<0, 1>]>;17 18// Target nodes.19 20// Vector Shuffle21def loongarch_xvpermi: SDNode<"LoongArchISD::XVPERMI", SDT_LoongArchV1RUimm>;22def loongarch_xvperm: SDNode<"LoongArchISD::XVPERM", SDT_LoongArchXVPERM>;23def loongarch_xvreplve0: SDNode<"LoongArchISD::XVREPLVE0", SDT_LoongArchXVREPLVE0>;24def loongarch_xvreplve0q: SDNode<"LoongArchISD::XVREPLVE0Q", SDT_LoongArchXVREPLVE0>;25def loongarch_xvinsve0 : SDNode<"LoongArchISD::XVINSVE0", SDT_LoongArchV2RUimm>;26 27// Vector mask set by condition28def loongarch_xvmskltz: SDNode<"LoongArchISD::XVMSKLTZ", SDT_LoongArchVMSKCOND>;29def loongarch_xvmskgez: SDNode<"LoongArchISD::XVMSKGEZ", SDT_LoongArchVMSKCOND>;30def loongarch_xvmskeqz: SDNode<"LoongArchISD::XVMSKEQZ", SDT_LoongArchVMSKCOND>;31def loongarch_xvmsknez: SDNode<"LoongArchISD::XVMSKNEZ", SDT_LoongArchVMSKCOND>;32 33def lasxsplati834 : PatFrag<(ops node:$e0),35 (v32i8 (build_vector node:$e0, node:$e0, node:$e0, node:$e0,36 node:$e0, node:$e0, node:$e0, node:$e0,37 node:$e0, node:$e0, node:$e0, node:$e0,38 node:$e0, node:$e0, node:$e0, node:$e0,39 node:$e0, node:$e0, node:$e0, node:$e0,40 node:$e0, node:$e0, node:$e0, node:$e0,41 node:$e0, node:$e0, node:$e0, node:$e0,42 node:$e0, node:$e0, node:$e0, node:$e0))>;43def lasxsplati1644 : PatFrag<(ops node:$e0),45 (v16i16 (build_vector node:$e0, node:$e0, node:$e0, node:$e0,46 node:$e0, node:$e0, node:$e0, node:$e0,47 node:$e0, node:$e0, node:$e0, node:$e0,48 node:$e0, node:$e0, node:$e0, node:$e0))>;49def lasxsplati3250 : PatFrag<(ops node:$e0),51 (v8i32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0,52 node:$e0, node:$e0, node:$e0, node:$e0))>;53def lasxsplati6454 : PatFrag<(ops node:$e0),55 (v4i64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>;56def lasxsplatf3257 : PatFrag<(ops node:$e0),58 (v8f32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0,59 node:$e0, node:$e0, node:$e0, node:$e0))>;60def lasxsplatf6461 : PatFrag<(ops node:$e0),62 (v4f64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>;63 64//===----------------------------------------------------------------------===//65// Instruction class templates66//===----------------------------------------------------------------------===//67 68class LASX1RI13_XI<bits<32> op, Operand ImmOpnd = simm13>69 : Fmt1RI13_XI<op, (outs LASX256:$xd), (ins ImmOpnd:$imm13), "$xd, $imm13">;70 71class LASX2R_XX<bits<32> op>72 : Fmt2R_XX<op, (outs LASX256:$xd), (ins LASX256:$xj), "$xd, $xj">;73 74class LASX2R_XR<bits<32> op>75 : Fmt2R_XR<op, (outs LASX256:$xd), (ins GPR:$rj), "$xd, $rj">;76 77class LASX2R_CX<bits<32> op>78 : Fmt2R_CX<op, (outs CFR:$cd), (ins LASX256:$xj), "$cd, $xj">;79 80class LASX2RI1_XXI<bits<32> op, Operand ImmOpnd = uimm1>81 : Fmt2RI1_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm1),82 "$xd, $xj, $imm1">;83 84class LASX2RI2_XXI<bits<32> op, Operand ImmOpnd = uimm2>85 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2),86 "$xd, $xj, $imm2">;87 88class LASX2RI2_RXI<bits<32> op, Operand ImmOpnd = uimm2>89 : Fmt2RI2_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm2),90 "$rd, $xj, $imm2">;91 92class LASX2RI3_XXI<bits<32> op, Operand ImmOpnd = uimm3>93 : Fmt2RI3_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm3),94 "$xd, $xj, $imm3">;95 96class LASX2RI3_RXI<bits<32> op, Operand ImmOpnd = uimm3>97 : Fmt2RI3_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm3),98 "$rd, $xj, $imm3">;99 100class LASX2RI4_XXI<bits<32> op, Operand ImmOpnd = uimm4>101 : Fmt2RI4_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm4),102 "$xd, $xj, $imm4">;103 104class LASX2RI4_XRI<bits<32> op, Operand ImmOpnd = uimm4>105 : Fmt2RI4_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm4),106 "$xd, $rj, $imm4">;107 108class LASX2RI4_RXI<bits<32> op, Operand ImmOpnd = uimm4>109 : Fmt2RI4_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm4),110 "$rd, $xj, $imm4">;111 112class LASX2RI5_XXI<bits<32> op, Operand ImmOpnd = uimm5>113 : Fmt2RI5_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm5),114 "$xd, $xj, $imm5">;115 116class LASX2RI6_XXI<bits<32> op, Operand ImmOpnd = uimm6>117 : Fmt2RI6_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm6),118 "$xd, $xj, $imm6">;119 120class LASX2RI8_XXI<bits<32> op, Operand ImmOpnd = uimm8>121 : Fmt2RI8_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm8),122 "$xd, $xj, $imm8">;123 124class LASX2RI8I2_XRII<bits<32> op, Operand ImmOpnd = simm8,125 Operand IdxOpnd = uimm2>126 : Fmt2RI8I2_XRII<op, (outs),127 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2),128 "$xd, $rj, $imm8, $imm2">;129class LASX2RI8I3_XRII<bits<32> op, Operand ImmOpnd = simm8,130 Operand IdxOpnd = uimm3>131 : Fmt2RI8I3_XRII<op, (outs),132 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm3),133 "$xd, $rj, $imm8, $imm3">;134class LASX2RI8I4_XRII<bits<32> op, Operand ImmOpnd = simm8,135 Operand IdxOpnd = uimm4>136 : Fmt2RI8I4_XRII<op, (outs),137 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm4),138 "$xd, $rj, $imm8, $imm4">;139class LASX2RI8I5_XRII<bits<32> op, Operand ImmOpnd = simm8,140 Operand IdxOpnd = uimm5>141 : Fmt2RI8I5_XRII<op, (outs),142 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm5),143 "$xd, $rj, $imm8, $imm5">;144 145class LASX3R_XXX<bits<32> op>146 : Fmt3R_XXX<op, (outs LASX256:$xd), (ins LASX256:$xj, LASX256:$xk),147 "$xd, $xj, $xk">;148 149class LASX3R_XXR<bits<32> op>150 : Fmt3R_XXR<op, (outs LASX256:$xd), (ins LASX256:$xj, GPR:$rk),151 "$xd, $xj, $rk">;152 153class LASX4R_XXXX<bits<32> op>154 : Fmt4R_XXXX<op, (outs LASX256:$xd),155 (ins LASX256:$xj, LASX256:$xk, LASX256:$xa),156 "$xd, $xj, $xk, $xa">;157 158let Constraints = "$xd = $dst" in {159 160class LASX2RI2_XXXI<bits<32> op, Operand ImmOpnd = uimm2>161 : Fmt2RI2_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm2),162 "$xd, $xj, $imm2">;163class LASX2RI3_XXXI<bits<32> op, Operand ImmOpnd = uimm3>164 : Fmt2RI3_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm3),165 "$xd, $xj, $imm3">;166 167class LASX2RI2_XXRI<bits<32> op, Operand ImmOpnd = uimm2>168 : Fmt2RI2_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm2),169 "$xd, $rj, $imm2">;170class LASX2RI3_XXRI<bits<32> op, Operand ImmOpnd = uimm3>171 : Fmt2RI3_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm3),172 "$xd, $rj, $imm3">;173 174class LASX2RI4_XXXI<bits<32> op, Operand ImmOpnd = uimm4>175 : Fmt2RI4_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm4),176 "$xd, $xj, $imm4">;177class LASX2RI5_XXXI<bits<32> op, Operand ImmOpnd = uimm5>178 : Fmt2RI5_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm5),179 "$xd, $xj, $imm5">;180class LASX2RI6_XXXI<bits<32> op, Operand ImmOpnd = uimm6>181 : Fmt2RI6_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm6),182 "$xd, $xj, $imm6">;183class LASX2RI7_XXXI<bits<32> op, Operand ImmOpnd = uimm7>184 : Fmt2RI7_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm7),185 "$xd, $xj, $imm7">;186 187class LASX2RI8_XXXI<bits<32> op, Operand ImmOpnd = uimm8>188 : Fmt2RI8_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm8),189 "$xd, $xj, $imm8">;190 191class LASX3R_XXXX<bits<32> op>192 : Fmt3R_XXX<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, LASX256:$xk),193 "$xd, $xj, $xk">;194 195} // Constraints = "$xd = $dst"196 197class LASX2RI9_Load<bits<32> op, Operand ImmOpnd = simm9_lsl3>198 : Fmt2RI9_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm9),199 "$xd, $rj, $imm9">;200class LASX2RI10_Load<bits<32> op, Operand ImmOpnd = simm10_lsl2>201 : Fmt2RI10_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm10),202 "$xd, $rj, $imm10">;203class LASX2RI11_Load<bits<32> op, Operand ImmOpnd = simm11_lsl1>204 : Fmt2RI11_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm11),205 "$xd, $rj, $imm11">;206class LASX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12_addlike>207 : Fmt2RI12_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm12),208 "$xd, $rj, $imm12">;209class LASX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12_addlike>210 : Fmt2RI12_XRI<op, (outs), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm12),211 "$xd, $rj, $imm12">;212 213class LASX3R_Load<bits<32> op>214 : Fmt3R_XRR<op, (outs LASX256:$xd), (ins GPR:$rj, GPR:$rk),215 "$xd, $rj, $rk">;216class LASX3R_Store<bits<32> op>217 : Fmt3R_XRR<op, (outs), (ins LASX256:$xd, GPR:$rj, GPR:$rk),218 "$xd, $rj, $rk">;219 220//===----------------------------------------------------------------------===//221// Instructions222//===----------------------------------------------------------------------===//223 224let hasSideEffects = 0, Predicates = [HasExtLASX] in {225 226let mayLoad = 0, mayStore = 0 in {227def XVADD_B : LASX3R_XXX<0x740a0000>;228def XVADD_H : LASX3R_XXX<0x740a8000>;229def XVADD_W : LASX3R_XXX<0x740b0000>;230def XVADD_D : LASX3R_XXX<0x740b8000>;231def XVADD_Q : LASX3R_XXX<0x752d0000>;232 233def XVSUB_B : LASX3R_XXX<0x740c0000>;234def XVSUB_H : LASX3R_XXX<0x740c8000>;235def XVSUB_W : LASX3R_XXX<0x740d0000>;236def XVSUB_D : LASX3R_XXX<0x740d8000>;237def XVSUB_Q : LASX3R_XXX<0x752d8000>;238 239def XVADDI_BU : LASX2RI5_XXI<0x768a0000>;240def XVADDI_HU : LASX2RI5_XXI<0x768a8000>;241def XVADDI_WU : LASX2RI5_XXI<0x768b0000>;242def XVADDI_DU : LASX2RI5_XXI<0x768b8000>;243 244def XVSUBI_BU : LASX2RI5_XXI<0x768c0000>;245def XVSUBI_HU : LASX2RI5_XXI<0x768c8000>;246def XVSUBI_WU : LASX2RI5_XXI<0x768d0000>;247def XVSUBI_DU : LASX2RI5_XXI<0x768d8000>;248 249def XVNEG_B : LASX2R_XX<0x769c3000>;250def XVNEG_H : LASX2R_XX<0x769c3400>;251def XVNEG_W : LASX2R_XX<0x769c3800>;252def XVNEG_D : LASX2R_XX<0x769c3c00>;253 254def XVSADD_B : LASX3R_XXX<0x74460000>;255def XVSADD_H : LASX3R_XXX<0x74468000>;256def XVSADD_W : LASX3R_XXX<0x74470000>;257def XVSADD_D : LASX3R_XXX<0x74478000>;258def XVSADD_BU : LASX3R_XXX<0x744a0000>;259def XVSADD_HU : LASX3R_XXX<0x744a8000>;260def XVSADD_WU : LASX3R_XXX<0x744b0000>;261def XVSADD_DU : LASX3R_XXX<0x744b8000>;262 263def XVSSUB_B : LASX3R_XXX<0x74480000>;264def XVSSUB_H : LASX3R_XXX<0x74488000>;265def XVSSUB_W : LASX3R_XXX<0x74490000>;266def XVSSUB_D : LASX3R_XXX<0x74498000>;267def XVSSUB_BU : LASX3R_XXX<0x744c0000>;268def XVSSUB_HU : LASX3R_XXX<0x744c8000>;269def XVSSUB_WU : LASX3R_XXX<0x744d0000>;270def XVSSUB_DU : LASX3R_XXX<0x744d8000>;271 272def XVHADDW_H_B : LASX3R_XXX<0x74540000>;273def XVHADDW_W_H : LASX3R_XXX<0x74548000>;274def XVHADDW_D_W : LASX3R_XXX<0x74550000>;275def XVHADDW_Q_D : LASX3R_XXX<0x74558000>;276def XVHADDW_HU_BU : LASX3R_XXX<0x74580000>;277def XVHADDW_WU_HU : LASX3R_XXX<0x74588000>;278def XVHADDW_DU_WU : LASX3R_XXX<0x74590000>;279def XVHADDW_QU_DU : LASX3R_XXX<0x74598000>;280 281def XVHSUBW_H_B : LASX3R_XXX<0x74560000>;282def XVHSUBW_W_H : LASX3R_XXX<0x74568000>;283def XVHSUBW_D_W : LASX3R_XXX<0x74570000>;284def XVHSUBW_Q_D : LASX3R_XXX<0x74578000>;285def XVHSUBW_HU_BU : LASX3R_XXX<0x745a0000>;286def XVHSUBW_WU_HU : LASX3R_XXX<0x745a8000>;287def XVHSUBW_DU_WU : LASX3R_XXX<0x745b0000>;288def XVHSUBW_QU_DU : LASX3R_XXX<0x745b8000>;289 290def XVADDWEV_H_B : LASX3R_XXX<0x741e0000>;291def XVADDWEV_W_H : LASX3R_XXX<0x741e8000>;292def XVADDWEV_D_W : LASX3R_XXX<0x741f0000>;293def XVADDWEV_Q_D : LASX3R_XXX<0x741f8000>;294def XVADDWOD_H_B : LASX3R_XXX<0x74220000>;295def XVADDWOD_W_H : LASX3R_XXX<0x74228000>;296def XVADDWOD_D_W : LASX3R_XXX<0x74230000>;297def XVADDWOD_Q_D : LASX3R_XXX<0x74238000>;298 299def XVSUBWEV_H_B : LASX3R_XXX<0x74200000>;300def XVSUBWEV_W_H : LASX3R_XXX<0x74208000>;301def XVSUBWEV_D_W : LASX3R_XXX<0x74210000>;302def XVSUBWEV_Q_D : LASX3R_XXX<0x74218000>;303def XVSUBWOD_H_B : LASX3R_XXX<0x74240000>;304def XVSUBWOD_W_H : LASX3R_XXX<0x74248000>;305def XVSUBWOD_D_W : LASX3R_XXX<0x74250000>;306def XVSUBWOD_Q_D : LASX3R_XXX<0x74258000>;307 308def XVADDWEV_H_BU : LASX3R_XXX<0x742e0000>;309def XVADDWEV_W_HU : LASX3R_XXX<0x742e8000>;310def XVADDWEV_D_WU : LASX3R_XXX<0x742f0000>;311def XVADDWEV_Q_DU : LASX3R_XXX<0x742f8000>;312def XVADDWOD_H_BU : LASX3R_XXX<0x74320000>;313def XVADDWOD_W_HU : LASX3R_XXX<0x74328000>;314def XVADDWOD_D_WU : LASX3R_XXX<0x74330000>;315def XVADDWOD_Q_DU : LASX3R_XXX<0x74338000>;316 317def XVSUBWEV_H_BU : LASX3R_XXX<0x74300000>;318def XVSUBWEV_W_HU : LASX3R_XXX<0x74308000>;319def XVSUBWEV_D_WU : LASX3R_XXX<0x74310000>;320def XVSUBWEV_Q_DU : LASX3R_XXX<0x74318000>;321def XVSUBWOD_H_BU : LASX3R_XXX<0x74340000>;322def XVSUBWOD_W_HU : LASX3R_XXX<0x74348000>;323def XVSUBWOD_D_WU : LASX3R_XXX<0x74350000>;324def XVSUBWOD_Q_DU : LASX3R_XXX<0x74358000>;325 326def XVADDWEV_H_BU_B : LASX3R_XXX<0x743e0000>;327def XVADDWEV_W_HU_H : LASX3R_XXX<0x743e8000>;328def XVADDWEV_D_WU_W : LASX3R_XXX<0x743f0000>;329def XVADDWEV_Q_DU_D : LASX3R_XXX<0x743f8000>;330def XVADDWOD_H_BU_B : LASX3R_XXX<0x74400000>;331def XVADDWOD_W_HU_H : LASX3R_XXX<0x74408000>;332def XVADDWOD_D_WU_W : LASX3R_XXX<0x74410000>;333def XVADDWOD_Q_DU_D : LASX3R_XXX<0x74418000>;334 335def XVAVG_B : LASX3R_XXX<0x74640000>;336def XVAVG_H : LASX3R_XXX<0x74648000>;337def XVAVG_W : LASX3R_XXX<0x74650000>;338def XVAVG_D : LASX3R_XXX<0x74658000>;339def XVAVG_BU : LASX3R_XXX<0x74660000>;340def XVAVG_HU : LASX3R_XXX<0x74668000>;341def XVAVG_WU : LASX3R_XXX<0x74670000>;342def XVAVG_DU : LASX3R_XXX<0x74678000>;343def XVAVGR_B : LASX3R_XXX<0x74680000>;344def XVAVGR_H : LASX3R_XXX<0x74688000>;345def XVAVGR_W : LASX3R_XXX<0x74690000>;346def XVAVGR_D : LASX3R_XXX<0x74698000>;347def XVAVGR_BU : LASX3R_XXX<0x746a0000>;348def XVAVGR_HU : LASX3R_XXX<0x746a8000>;349def XVAVGR_WU : LASX3R_XXX<0x746b0000>;350def XVAVGR_DU : LASX3R_XXX<0x746b8000>;351 352def XVABSD_B : LASX3R_XXX<0x74600000>;353def XVABSD_H : LASX3R_XXX<0x74608000>;354def XVABSD_W : LASX3R_XXX<0x74610000>;355def XVABSD_D : LASX3R_XXX<0x74618000>;356def XVABSD_BU : LASX3R_XXX<0x74620000>;357def XVABSD_HU : LASX3R_XXX<0x74628000>;358def XVABSD_WU : LASX3R_XXX<0x74630000>;359def XVABSD_DU : LASX3R_XXX<0x74638000>;360 361def XVADDA_B : LASX3R_XXX<0x745c0000>;362def XVADDA_H : LASX3R_XXX<0x745c8000>;363def XVADDA_W : LASX3R_XXX<0x745d0000>;364def XVADDA_D : LASX3R_XXX<0x745d8000>;365 366def XVMAX_B : LASX3R_XXX<0x74700000>;367def XVMAX_H : LASX3R_XXX<0x74708000>;368def XVMAX_W : LASX3R_XXX<0x74710000>;369def XVMAX_D : LASX3R_XXX<0x74718000>;370def XVMAXI_B : LASX2RI5_XXI<0x76900000, simm5>;371def XVMAXI_H : LASX2RI5_XXI<0x76908000, simm5>;372def XVMAXI_W : LASX2RI5_XXI<0x76910000, simm5>;373def XVMAXI_D : LASX2RI5_XXI<0x76918000, simm5>;374def XVMAX_BU : LASX3R_XXX<0x74740000>;375def XVMAX_HU : LASX3R_XXX<0x74748000>;376def XVMAX_WU : LASX3R_XXX<0x74750000>;377def XVMAX_DU : LASX3R_XXX<0x74758000>;378def XVMAXI_BU : LASX2RI5_XXI<0x76940000>;379def XVMAXI_HU : LASX2RI5_XXI<0x76948000>;380def XVMAXI_WU : LASX2RI5_XXI<0x76950000>;381def XVMAXI_DU : LASX2RI5_XXI<0x76958000>;382 383def XVMIN_B : LASX3R_XXX<0x74720000>;384def XVMIN_H : LASX3R_XXX<0x74728000>;385def XVMIN_W : LASX3R_XXX<0x74730000>;386def XVMIN_D : LASX3R_XXX<0x74738000>;387def XVMINI_B : LASX2RI5_XXI<0x76920000, simm5>;388def XVMINI_H : LASX2RI5_XXI<0x76928000, simm5>;389def XVMINI_W : LASX2RI5_XXI<0x76930000, simm5>;390def XVMINI_D : LASX2RI5_XXI<0x76938000, simm5>;391def XVMIN_BU : LASX3R_XXX<0x74760000>;392def XVMIN_HU : LASX3R_XXX<0x74768000>;393def XVMIN_WU : LASX3R_XXX<0x74770000>;394def XVMIN_DU : LASX3R_XXX<0x74778000>;395def XVMINI_BU : LASX2RI5_XXI<0x76960000>;396def XVMINI_HU : LASX2RI5_XXI<0x76968000>;397def XVMINI_WU : LASX2RI5_XXI<0x76970000>;398def XVMINI_DU : LASX2RI5_XXI<0x76978000>;399 400def XVMUL_B : LASX3R_XXX<0x74840000>;401def XVMUL_H : LASX3R_XXX<0x74848000>;402def XVMUL_W : LASX3R_XXX<0x74850000>;403def XVMUL_D : LASX3R_XXX<0x74858000>;404 405def XVMUH_B : LASX3R_XXX<0x74860000>;406def XVMUH_H : LASX3R_XXX<0x74868000>;407def XVMUH_W : LASX3R_XXX<0x74870000>;408def XVMUH_D : LASX3R_XXX<0x74878000>;409def XVMUH_BU : LASX3R_XXX<0x74880000>;410def XVMUH_HU : LASX3R_XXX<0x74888000>;411def XVMUH_WU : LASX3R_XXX<0x74890000>;412def XVMUH_DU : LASX3R_XXX<0x74898000>;413 414def XVMULWEV_H_B : LASX3R_XXX<0x74900000>;415def XVMULWEV_W_H : LASX3R_XXX<0x74908000>;416def XVMULWEV_D_W : LASX3R_XXX<0x74910000>;417def XVMULWEV_Q_D : LASX3R_XXX<0x74918000>;418def XVMULWOD_H_B : LASX3R_XXX<0x74920000>;419def XVMULWOD_W_H : LASX3R_XXX<0x74928000>;420def XVMULWOD_D_W : LASX3R_XXX<0x74930000>;421def XVMULWOD_Q_D : LASX3R_XXX<0x74938000>;422def XVMULWEV_H_BU : LASX3R_XXX<0x74980000>;423def XVMULWEV_W_HU : LASX3R_XXX<0x74988000>;424def XVMULWEV_D_WU : LASX3R_XXX<0x74990000>;425def XVMULWEV_Q_DU : LASX3R_XXX<0x74998000>;426def XVMULWOD_H_BU : LASX3R_XXX<0x749a0000>;427def XVMULWOD_W_HU : LASX3R_XXX<0x749a8000>;428def XVMULWOD_D_WU : LASX3R_XXX<0x749b0000>;429def XVMULWOD_Q_DU : LASX3R_XXX<0x749b8000>;430def XVMULWEV_H_BU_B : LASX3R_XXX<0x74a00000>;431def XVMULWEV_W_HU_H : LASX3R_XXX<0x74a08000>;432def XVMULWEV_D_WU_W : LASX3R_XXX<0x74a10000>;433def XVMULWEV_Q_DU_D : LASX3R_XXX<0x74a18000>;434def XVMULWOD_H_BU_B : LASX3R_XXX<0x74a20000>;435def XVMULWOD_W_HU_H : LASX3R_XXX<0x74a28000>;436def XVMULWOD_D_WU_W : LASX3R_XXX<0x74a30000>;437def XVMULWOD_Q_DU_D : LASX3R_XXX<0x74a38000>;438 439def XVMADD_B : LASX3R_XXXX<0x74a80000>;440def XVMADD_H : LASX3R_XXXX<0x74a88000>;441def XVMADD_W : LASX3R_XXXX<0x74a90000>;442def XVMADD_D : LASX3R_XXXX<0x74a98000>;443 444def XVMSUB_B : LASX3R_XXXX<0x74aa0000>;445def XVMSUB_H : LASX3R_XXXX<0x74aa8000>;446def XVMSUB_W : LASX3R_XXXX<0x74ab0000>;447def XVMSUB_D : LASX3R_XXXX<0x74ab8000>;448 449def XVMADDWEV_H_B : LASX3R_XXXX<0x74ac0000>;450def XVMADDWEV_W_H : LASX3R_XXXX<0x74ac8000>;451def XVMADDWEV_D_W : LASX3R_XXXX<0x74ad0000>;452def XVMADDWEV_Q_D : LASX3R_XXXX<0x74ad8000>;453def XVMADDWOD_H_B : LASX3R_XXXX<0x74ae0000>;454def XVMADDWOD_W_H : LASX3R_XXXX<0x74ae8000>;455def XVMADDWOD_D_W : LASX3R_XXXX<0x74af0000>;456def XVMADDWOD_Q_D : LASX3R_XXXX<0x74af8000>;457def XVMADDWEV_H_BU : LASX3R_XXXX<0x74b40000>;458def XVMADDWEV_W_HU : LASX3R_XXXX<0x74b48000>;459def XVMADDWEV_D_WU : LASX3R_XXXX<0x74b50000>;460def XVMADDWEV_Q_DU : LASX3R_XXXX<0x74b58000>;461def XVMADDWOD_H_BU : LASX3R_XXXX<0x74b60000>;462def XVMADDWOD_W_HU : LASX3R_XXXX<0x74b68000>;463def XVMADDWOD_D_WU : LASX3R_XXXX<0x74b70000>;464def XVMADDWOD_Q_DU : LASX3R_XXXX<0x74b78000>;465def XVMADDWEV_H_BU_B : LASX3R_XXXX<0x74bc0000>;466def XVMADDWEV_W_HU_H : LASX3R_XXXX<0x74bc8000>;467def XVMADDWEV_D_WU_W : LASX3R_XXXX<0x74bd0000>;468def XVMADDWEV_Q_DU_D : LASX3R_XXXX<0x74bd8000>;469def XVMADDWOD_H_BU_B : LASX3R_XXXX<0x74be0000>;470def XVMADDWOD_W_HU_H : LASX3R_XXXX<0x74be8000>;471def XVMADDWOD_D_WU_W : LASX3R_XXXX<0x74bf0000>;472def XVMADDWOD_Q_DU_D : LASX3R_XXXX<0x74bf8000>;473 474def XVDIV_B : LASX3R_XXX<0x74e00000>;475def XVDIV_H : LASX3R_XXX<0x74e08000>;476def XVDIV_W : LASX3R_XXX<0x74e10000>;477def XVDIV_D : LASX3R_XXX<0x74e18000>;478def XVDIV_BU : LASX3R_XXX<0x74e40000>;479def XVDIV_HU : LASX3R_XXX<0x74e48000>;480def XVDIV_WU : LASX3R_XXX<0x74e50000>;481def XVDIV_DU : LASX3R_XXX<0x74e58000>;482 483def XVMOD_B : LASX3R_XXX<0x74e20000>;484def XVMOD_H : LASX3R_XXX<0x74e28000>;485def XVMOD_W : LASX3R_XXX<0x74e30000>;486def XVMOD_D : LASX3R_XXX<0x74e38000>;487def XVMOD_BU : LASX3R_XXX<0x74e60000>;488def XVMOD_HU : LASX3R_XXX<0x74e68000>;489def XVMOD_WU : LASX3R_XXX<0x74e70000>;490def XVMOD_DU : LASX3R_XXX<0x74e78000>;491 492def XVSAT_B : LASX2RI3_XXI<0x77242000>;493def XVSAT_H : LASX2RI4_XXI<0x77244000>;494def XVSAT_W : LASX2RI5_XXI<0x77248000>;495def XVSAT_D : LASX2RI6_XXI<0x77250000>;496def XVSAT_BU : LASX2RI3_XXI<0x77282000>;497def XVSAT_HU : LASX2RI4_XXI<0x77284000>;498def XVSAT_WU : LASX2RI5_XXI<0x77288000>;499def XVSAT_DU : LASX2RI6_XXI<0x77290000>;500 501def XVEXTH_H_B : LASX2R_XX<0x769ee000>;502def XVEXTH_W_H : LASX2R_XX<0x769ee400>;503def XVEXTH_D_W : LASX2R_XX<0x769ee800>;504def XVEXTH_Q_D : LASX2R_XX<0x769eec00>;505def XVEXTH_HU_BU : LASX2R_XX<0x769ef000>;506def XVEXTH_WU_HU : LASX2R_XX<0x769ef400>;507def XVEXTH_DU_WU : LASX2R_XX<0x769ef800>;508def XVEXTH_QU_DU : LASX2R_XX<0x769efc00>;509 510def VEXT2XV_H_B : LASX2R_XX<0x769f1000>;511def VEXT2XV_W_B : LASX2R_XX<0x769f1400>;512def VEXT2XV_D_B : LASX2R_XX<0x769f1800>;513def VEXT2XV_W_H : LASX2R_XX<0x769f1c00>;514def VEXT2XV_D_H : LASX2R_XX<0x769f2000>;515def VEXT2XV_D_W : LASX2R_XX<0x769f2400>;516def VEXT2XV_HU_BU : LASX2R_XX<0x769f2800>;517def VEXT2XV_WU_BU : LASX2R_XX<0x769f2c00>;518def VEXT2XV_DU_BU : LASX2R_XX<0x769f3000>;519def VEXT2XV_WU_HU : LASX2R_XX<0x769f3400>;520def VEXT2XV_DU_HU : LASX2R_XX<0x769f3800>;521def VEXT2XV_DU_WU : LASX2R_XX<0x769f3c00>;522 523def XVHSELI_D : LASX2RI5_XXI<0x769f8000>;524 525def XVSIGNCOV_B : LASX3R_XXX<0x752e0000>;526def XVSIGNCOV_H : LASX3R_XXX<0x752e8000>;527def XVSIGNCOV_W : LASX3R_XXX<0x752f0000>;528def XVSIGNCOV_D : LASX3R_XXX<0x752f8000>;529 530def XVMSKLTZ_B : LASX2R_XX<0x769c4000>;531def XVMSKLTZ_H : LASX2R_XX<0x769c4400>;532def XVMSKLTZ_W : LASX2R_XX<0x769c4800>;533def XVMSKLTZ_D : LASX2R_XX<0x769c4c00>;534 535def XVMSKGEZ_B : LASX2R_XX<0x769c5000>;536 537def XVMSKNZ_B : LASX2R_XX<0x769c6000>;538 539def XVLDI : LASX1RI13_XI<0x77e00000>;540 541def XVAND_V : LASX3R_XXX<0x75260000>;542def XVOR_V : LASX3R_XXX<0x75268000>;543def XVXOR_V : LASX3R_XXX<0x75270000>;544def XVNOR_V : LASX3R_XXX<0x75278000>;545def XVANDN_V : LASX3R_XXX<0x75280000>;546def XVORN_V : LASX3R_XXX<0x75288000>;547 548def XVANDI_B : LASX2RI8_XXI<0x77d00000>;549def XVORI_B : LASX2RI8_XXI<0x77d40000>;550def XVXORI_B : LASX2RI8_XXI<0x77d80000>;551def XVNORI_B : LASX2RI8_XXI<0x77dc0000>;552 553def XVSLL_B : LASX3R_XXX<0x74e80000>;554def XVSLL_H : LASX3R_XXX<0x74e88000>;555def XVSLL_W : LASX3R_XXX<0x74e90000>;556def XVSLL_D : LASX3R_XXX<0x74e98000>;557def XVSLLI_B : LASX2RI3_XXI<0x772c2000>;558def XVSLLI_H : LASX2RI4_XXI<0x772c4000>;559def XVSLLI_W : LASX2RI5_XXI<0x772c8000>;560def XVSLLI_D : LASX2RI6_XXI<0x772d0000>;561 562def XVSRL_B : LASX3R_XXX<0x74ea0000>;563def XVSRL_H : LASX3R_XXX<0x74ea8000>;564def XVSRL_W : LASX3R_XXX<0x74eb0000>;565def XVSRL_D : LASX3R_XXX<0x74eb8000>;566def XVSRLI_B : LASX2RI3_XXI<0x77302000>;567def XVSRLI_H : LASX2RI4_XXI<0x77304000>;568def XVSRLI_W : LASX2RI5_XXI<0x77308000>;569def XVSRLI_D : LASX2RI6_XXI<0x77310000>;570 571def XVSRA_B : LASX3R_XXX<0x74ec0000>;572def XVSRA_H : LASX3R_XXX<0x74ec8000>;573def XVSRA_W : LASX3R_XXX<0x74ed0000>;574def XVSRA_D : LASX3R_XXX<0x74ed8000>;575def XVSRAI_B : LASX2RI3_XXI<0x77342000>;576def XVSRAI_H : LASX2RI4_XXI<0x77344000>;577def XVSRAI_W : LASX2RI5_XXI<0x77348000>;578def XVSRAI_D : LASX2RI6_XXI<0x77350000>;579 580def XVROTR_B : LASX3R_XXX<0x74ee0000>;581def XVROTR_H : LASX3R_XXX<0x74ee8000>;582def XVROTR_W : LASX3R_XXX<0x74ef0000>;583def XVROTR_D : LASX3R_XXX<0x74ef8000>;584def XVROTRI_B : LASX2RI3_XXI<0x76a02000>;585def XVROTRI_H : LASX2RI4_XXI<0x76a04000>;586def XVROTRI_W : LASX2RI5_XXI<0x76a08000>;587def XVROTRI_D : LASX2RI6_XXI<0x76a10000>;588 589def XVSLLWIL_H_B : LASX2RI3_XXI<0x77082000>;590def XVSLLWIL_W_H : LASX2RI4_XXI<0x77084000>;591def XVSLLWIL_D_W : LASX2RI5_XXI<0x77088000>;592def XVEXTL_Q_D : LASX2R_XX<0x77090000>;593def XVSLLWIL_HU_BU : LASX2RI3_XXI<0x770c2000>;594def XVSLLWIL_WU_HU : LASX2RI4_XXI<0x770c4000>;595def XVSLLWIL_DU_WU : LASX2RI5_XXI<0x770c8000>;596def XVEXTL_QU_DU : LASX2R_XX<0x770d0000>;597 598def XVSRLR_B : LASX3R_XXX<0x74f00000>;599def XVSRLR_H : LASX3R_XXX<0x74f08000>;600def XVSRLR_W : LASX3R_XXX<0x74f10000>;601def XVSRLR_D : LASX3R_XXX<0x74f18000>;602def XVSRLRI_B : LASX2RI3_XXI<0x76a42000>;603def XVSRLRI_H : LASX2RI4_XXI<0x76a44000>;604def XVSRLRI_W : LASX2RI5_XXI<0x76a48000>;605def XVSRLRI_D : LASX2RI6_XXI<0x76a50000>;606 607def XVSRAR_B : LASX3R_XXX<0x74f20000>;608def XVSRAR_H : LASX3R_XXX<0x74f28000>;609def XVSRAR_W : LASX3R_XXX<0x74f30000>;610def XVSRAR_D : LASX3R_XXX<0x74f38000>;611def XVSRARI_B : LASX2RI3_XXI<0x76a82000>;612def XVSRARI_H : LASX2RI4_XXI<0x76a84000>;613def XVSRARI_W : LASX2RI5_XXI<0x76a88000>;614def XVSRARI_D : LASX2RI6_XXI<0x76a90000>;615 616def XVSRLN_B_H : LASX3R_XXX<0x74f48000>;617def XVSRLN_H_W : LASX3R_XXX<0x74f50000>;618def XVSRLN_W_D : LASX3R_XXX<0x74f58000>;619def XVSRAN_B_H : LASX3R_XXX<0x74f68000>;620def XVSRAN_H_W : LASX3R_XXX<0x74f70000>;621def XVSRAN_W_D : LASX3R_XXX<0x74f78000>;622 623def XVSRLNI_B_H : LASX2RI4_XXXI<0x77404000>;624def XVSRLNI_H_W : LASX2RI5_XXXI<0x77408000>;625def XVSRLNI_W_D : LASX2RI6_XXXI<0x77410000>;626def XVSRLNI_D_Q : LASX2RI7_XXXI<0x77420000>;627def XVSRANI_B_H : LASX2RI4_XXXI<0x77584000>;628def XVSRANI_H_W : LASX2RI5_XXXI<0x77588000>;629def XVSRANI_W_D : LASX2RI6_XXXI<0x77590000>;630def XVSRANI_D_Q : LASX2RI7_XXXI<0x775a0000>;631 632def XVSRLRN_B_H : LASX3R_XXX<0x74f88000>;633def XVSRLRN_H_W : LASX3R_XXX<0x74f90000>;634def XVSRLRN_W_D : LASX3R_XXX<0x74f98000>;635def XVSRARN_B_H : LASX3R_XXX<0x74fa8000>;636def XVSRARN_H_W : LASX3R_XXX<0x74fb0000>;637def XVSRARN_W_D : LASX3R_XXX<0x74fb8000>;638 639def XVSRLRNI_B_H : LASX2RI4_XXXI<0x77444000>;640def XVSRLRNI_H_W : LASX2RI5_XXXI<0x77448000>;641def XVSRLRNI_W_D : LASX2RI6_XXXI<0x77450000>;642def XVSRLRNI_D_Q : LASX2RI7_XXXI<0x77460000>;643def XVSRARNI_B_H : LASX2RI4_XXXI<0x775c4000>;644def XVSRARNI_H_W : LASX2RI5_XXXI<0x775c8000>;645def XVSRARNI_W_D : LASX2RI6_XXXI<0x775d0000>;646def XVSRARNI_D_Q : LASX2RI7_XXXI<0x775e0000>;647 648def XVSSRLN_B_H : LASX3R_XXX<0x74fc8000>;649def XVSSRLN_H_W : LASX3R_XXX<0x74fd0000>;650def XVSSRLN_W_D : LASX3R_XXX<0x74fd8000>;651def XVSSRAN_B_H : LASX3R_XXX<0x74fe8000>;652def XVSSRAN_H_W : LASX3R_XXX<0x74ff0000>;653def XVSSRAN_W_D : LASX3R_XXX<0x74ff8000>;654def XVSSRLN_BU_H : LASX3R_XXX<0x75048000>;655def XVSSRLN_HU_W : LASX3R_XXX<0x75050000>;656def XVSSRLN_WU_D : LASX3R_XXX<0x75058000>;657def XVSSRAN_BU_H : LASX3R_XXX<0x75068000>;658def XVSSRAN_HU_W : LASX3R_XXX<0x75070000>;659def XVSSRAN_WU_D : LASX3R_XXX<0x75078000>;660 661def XVSSRLNI_B_H : LASX2RI4_XXXI<0x77484000>;662def XVSSRLNI_H_W : LASX2RI5_XXXI<0x77488000>;663def XVSSRLNI_W_D : LASX2RI6_XXXI<0x77490000>;664def XVSSRLNI_D_Q : LASX2RI7_XXXI<0x774a0000>;665def XVSSRANI_B_H : LASX2RI4_XXXI<0x77604000>;666def XVSSRANI_H_W : LASX2RI5_XXXI<0x77608000>;667def XVSSRANI_W_D : LASX2RI6_XXXI<0x77610000>;668def XVSSRANI_D_Q : LASX2RI7_XXXI<0x77620000>;669def XVSSRLNI_BU_H : LASX2RI4_XXXI<0x774c4000>;670def XVSSRLNI_HU_W : LASX2RI5_XXXI<0x774c8000>;671def XVSSRLNI_WU_D : LASX2RI6_XXXI<0x774d0000>;672def XVSSRLNI_DU_Q : LASX2RI7_XXXI<0x774e0000>;673def XVSSRANI_BU_H : LASX2RI4_XXXI<0x77644000>;674def XVSSRANI_HU_W : LASX2RI5_XXXI<0x77648000>;675def XVSSRANI_WU_D : LASX2RI6_XXXI<0x77650000>;676def XVSSRANI_DU_Q : LASX2RI7_XXXI<0x77660000>;677 678def XVSSRLRN_B_H : LASX3R_XXX<0x75008000>;679def XVSSRLRN_H_W : LASX3R_XXX<0x75010000>;680def XVSSRLRN_W_D : LASX3R_XXX<0x75018000>;681def XVSSRARN_B_H : LASX3R_XXX<0x75028000>;682def XVSSRARN_H_W : LASX3R_XXX<0x75030000>;683def XVSSRARN_W_D : LASX3R_XXX<0x75038000>;684def XVSSRLRN_BU_H : LASX3R_XXX<0x75088000>;685def XVSSRLRN_HU_W : LASX3R_XXX<0x75090000>;686def XVSSRLRN_WU_D : LASX3R_XXX<0x75098000>;687def XVSSRARN_BU_H : LASX3R_XXX<0x750a8000>;688def XVSSRARN_HU_W : LASX3R_XXX<0x750b0000>;689def XVSSRARN_WU_D : LASX3R_XXX<0x750b8000>;690 691def XVSSRLRNI_B_H : LASX2RI4_XXXI<0x77504000>;692def XVSSRLRNI_H_W : LASX2RI5_XXXI<0x77508000>;693def XVSSRLRNI_W_D : LASX2RI6_XXXI<0x77510000>;694def XVSSRLRNI_D_Q : LASX2RI7_XXXI<0x77520000>;695def XVSSRARNI_B_H : LASX2RI4_XXXI<0x77684000>;696def XVSSRARNI_H_W : LASX2RI5_XXXI<0x77688000>;697def XVSSRARNI_W_D : LASX2RI6_XXXI<0x77690000>;698def XVSSRARNI_D_Q : LASX2RI7_XXXI<0x776a0000>;699def XVSSRLRNI_BU_H : LASX2RI4_XXXI<0x77544000>;700def XVSSRLRNI_HU_W : LASX2RI5_XXXI<0x77548000>;701def XVSSRLRNI_WU_D : LASX2RI6_XXXI<0x77550000>;702def XVSSRLRNI_DU_Q : LASX2RI7_XXXI<0x77560000>;703def XVSSRARNI_BU_H : LASX2RI4_XXXI<0x776c4000>;704def XVSSRARNI_HU_W : LASX2RI5_XXXI<0x776c8000>;705def XVSSRARNI_WU_D : LASX2RI6_XXXI<0x776d0000>;706def XVSSRARNI_DU_Q : LASX2RI7_XXXI<0x776e0000>;707 708def XVCLO_B : LASX2R_XX<0x769c0000>;709def XVCLO_H : LASX2R_XX<0x769c0400>;710def XVCLO_W : LASX2R_XX<0x769c0800>;711def XVCLO_D : LASX2R_XX<0x769c0c00>;712def XVCLZ_B : LASX2R_XX<0x769c1000>;713def XVCLZ_H : LASX2R_XX<0x769c1400>;714def XVCLZ_W : LASX2R_XX<0x769c1800>;715def XVCLZ_D : LASX2R_XX<0x769c1c00>;716 717def XVPCNT_B : LASX2R_XX<0x769c2000>;718def XVPCNT_H : LASX2R_XX<0x769c2400>;719def XVPCNT_W : LASX2R_XX<0x769c2800>;720def XVPCNT_D : LASX2R_XX<0x769c2c00>;721 722def XVBITCLR_B : LASX3R_XXX<0x750c0000>;723def XVBITCLR_H : LASX3R_XXX<0x750c8000>;724def XVBITCLR_W : LASX3R_XXX<0x750d0000>;725def XVBITCLR_D : LASX3R_XXX<0x750d8000>;726def XVBITCLRI_B : LASX2RI3_XXI<0x77102000>;727def XVBITCLRI_H : LASX2RI4_XXI<0x77104000>;728def XVBITCLRI_W : LASX2RI5_XXI<0x77108000>;729def XVBITCLRI_D : LASX2RI6_XXI<0x77110000>;730 731def XVBITSET_B : LASX3R_XXX<0x750e0000>;732def XVBITSET_H : LASX3R_XXX<0x750e8000>;733def XVBITSET_W : LASX3R_XXX<0x750f0000>;734def XVBITSET_D : LASX3R_XXX<0x750f8000>;735def XVBITSETI_B : LASX2RI3_XXI<0x77142000>;736def XVBITSETI_H : LASX2RI4_XXI<0x77144000>;737def XVBITSETI_W : LASX2RI5_XXI<0x77148000>;738def XVBITSETI_D : LASX2RI6_XXI<0x77150000>;739 740def XVBITREV_B : LASX3R_XXX<0x75100000>;741def XVBITREV_H : LASX3R_XXX<0x75108000>;742def XVBITREV_W : LASX3R_XXX<0x75110000>;743def XVBITREV_D : LASX3R_XXX<0x75118000>;744def XVBITREVI_B : LASX2RI3_XXI<0x77182000>;745def XVBITREVI_H : LASX2RI4_XXI<0x77184000>;746def XVBITREVI_W : LASX2RI5_XXI<0x77188000>;747def XVBITREVI_D : LASX2RI6_XXI<0x77190000>;748 749def XVFRSTP_B : LASX3R_XXXX<0x752b0000>;750def XVFRSTP_H : LASX3R_XXXX<0x752b8000>;751def XVFRSTPI_B : LASX2RI5_XXXI<0x769a0000>;752def XVFRSTPI_H : LASX2RI5_XXXI<0x769a8000>;753 754def XVFADD_S : LASX3R_XXX<0x75308000>;755def XVFADD_D : LASX3R_XXX<0x75310000>;756def XVFSUB_S : LASX3R_XXX<0x75328000>;757def XVFSUB_D : LASX3R_XXX<0x75330000>;758def XVFMUL_S : LASX3R_XXX<0x75388000>;759def XVFMUL_D : LASX3R_XXX<0x75390000>;760def XVFDIV_S : LASX3R_XXX<0x753a8000>;761def XVFDIV_D : LASX3R_XXX<0x753b0000>;762 763def XVFMADD_S : LASX4R_XXXX<0x0a100000>;764def XVFMADD_D : LASX4R_XXXX<0x0a200000>;765def XVFMSUB_S : LASX4R_XXXX<0x0a500000>;766def XVFMSUB_D : LASX4R_XXXX<0x0a600000>;767def XVFNMADD_S : LASX4R_XXXX<0x0a900000>;768def XVFNMADD_D : LASX4R_XXXX<0x0aa00000>;769def XVFNMSUB_S : LASX4R_XXXX<0x0ad00000>;770def XVFNMSUB_D : LASX4R_XXXX<0x0ae00000>;771 772def XVFMAX_S : LASX3R_XXX<0x753c8000>;773def XVFMAX_D : LASX3R_XXX<0x753d0000>;774def XVFMIN_S : LASX3R_XXX<0x753e8000>;775def XVFMIN_D : LASX3R_XXX<0x753f0000>;776 777def XVFMAXA_S : LASX3R_XXX<0x75408000>;778def XVFMAXA_D : LASX3R_XXX<0x75410000>;779def XVFMINA_S : LASX3R_XXX<0x75428000>;780def XVFMINA_D : LASX3R_XXX<0x75430000>;781 782def XVFLOGB_S : LASX2R_XX<0x769cc400>;783def XVFLOGB_D : LASX2R_XX<0x769cc800>;784 785def XVFCLASS_S : LASX2R_XX<0x769cd400>;786def XVFCLASS_D : LASX2R_XX<0x769cd800>;787 788def XVFSQRT_S : LASX2R_XX<0x769ce400>;789def XVFSQRT_D : LASX2R_XX<0x769ce800>;790def XVFRECIP_S : LASX2R_XX<0x769cf400>;791def XVFRECIP_D : LASX2R_XX<0x769cf800>;792def XVFRSQRT_S : LASX2R_XX<0x769d0400>;793def XVFRSQRT_D : LASX2R_XX<0x769d0800>;794def XVFRECIPE_S : LASX2R_XX<0x769d1400>;795def XVFRECIPE_D : LASX2R_XX<0x769d1800>;796def XVFRSQRTE_S : LASX2R_XX<0x769d2400>;797def XVFRSQRTE_D : LASX2R_XX<0x769d2800>;798 799def XVFCVTL_S_H : LASX2R_XX<0x769de800>;800def XVFCVTH_S_H : LASX2R_XX<0x769dec00>;801def XVFCVTL_D_S : LASX2R_XX<0x769df000>;802def XVFCVTH_D_S : LASX2R_XX<0x769df400>;803def XVFCVT_H_S : LASX3R_XXX<0x75460000>;804def XVFCVT_S_D : LASX3R_XXX<0x75468000>;805 806def XVFRINTRNE_S : LASX2R_XX<0x769d7400>;807def XVFRINTRNE_D : LASX2R_XX<0x769d7800>;808def XVFRINTRZ_S : LASX2R_XX<0x769d6400>;809def XVFRINTRZ_D : LASX2R_XX<0x769d6800>;810def XVFRINTRP_S : LASX2R_XX<0x769d5400>;811def XVFRINTRP_D : LASX2R_XX<0x769d5800>;812def XVFRINTRM_S : LASX2R_XX<0x769d4400>;813def XVFRINTRM_D : LASX2R_XX<0x769d4800>;814def XVFRINT_S : LASX2R_XX<0x769d3400>;815def XVFRINT_D : LASX2R_XX<0x769d3800>;816 817def XVFTINTRNE_W_S : LASX2R_XX<0x769e5000>;818def XVFTINTRNE_L_D : LASX2R_XX<0x769e5400>;819def XVFTINTRZ_W_S : LASX2R_XX<0x769e4800>;820def XVFTINTRZ_L_D : LASX2R_XX<0x769e4c00>;821def XVFTINTRP_W_S : LASX2R_XX<0x769e4000>;822def XVFTINTRP_L_D : LASX2R_XX<0x769e4400>;823def XVFTINTRM_W_S : LASX2R_XX<0x769e3800>;824def XVFTINTRM_L_D : LASX2R_XX<0x769e3c00>;825def XVFTINT_W_S : LASX2R_XX<0x769e3000>;826def XVFTINT_L_D : LASX2R_XX<0x769e3400>;827def XVFTINTRZ_WU_S : LASX2R_XX<0x769e7000>;828def XVFTINTRZ_LU_D : LASX2R_XX<0x769e7400>;829def XVFTINT_WU_S : LASX2R_XX<0x769e5800>;830def XVFTINT_LU_D : LASX2R_XX<0x769e5c00>;831 832def XVFTINTRNE_W_D : LASX3R_XXX<0x754b8000>;833def XVFTINTRZ_W_D : LASX3R_XXX<0x754b0000>;834def XVFTINTRP_W_D : LASX3R_XXX<0x754a8000>;835def XVFTINTRM_W_D : LASX3R_XXX<0x754a0000>;836def XVFTINT_W_D : LASX3R_XXX<0x75498000>;837 838def XVFTINTRNEL_L_S : LASX2R_XX<0x769ea000>;839def XVFTINTRNEH_L_S : LASX2R_XX<0x769ea400>;840def XVFTINTRZL_L_S : LASX2R_XX<0x769e9800>;841def XVFTINTRZH_L_S : LASX2R_XX<0x769e9c00>;842def XVFTINTRPL_L_S : LASX2R_XX<0x769e9000>;843def XVFTINTRPH_L_S : LASX2R_XX<0x769e9400>;844def XVFTINTRML_L_S : LASX2R_XX<0x769e8800>;845def XVFTINTRMH_L_S : LASX2R_XX<0x769e8c00>;846def XVFTINTL_L_S : LASX2R_XX<0x769e8000>;847def XVFTINTH_L_S : LASX2R_XX<0x769e8400>;848 849def XVFFINT_S_W : LASX2R_XX<0x769e0000>;850def XVFFINT_D_L : LASX2R_XX<0x769e0800>;851def XVFFINT_S_WU : LASX2R_XX<0x769e0400>;852def XVFFINT_D_LU : LASX2R_XX<0x769e0c00>;853def XVFFINTL_D_W : LASX2R_XX<0x769e1000>;854def XVFFINTH_D_W : LASX2R_XX<0x769e1400>;855def XVFFINT_S_L : LASX3R_XXX<0x75480000>;856 857def XVSEQ_B : LASX3R_XXX<0x74000000>;858def XVSEQ_H : LASX3R_XXX<0x74008000>;859def XVSEQ_W : LASX3R_XXX<0x74010000>;860def XVSEQ_D : LASX3R_XXX<0x74018000>;861def XVSEQI_B : LASX2RI5_XXI<0x76800000, simm5>;862def XVSEQI_H : LASX2RI5_XXI<0x76808000, simm5>;863def XVSEQI_W : LASX2RI5_XXI<0x76810000, simm5>;864def XVSEQI_D : LASX2RI5_XXI<0x76818000, simm5>;865 866def XVSLE_B : LASX3R_XXX<0x74020000>;867def XVSLE_H : LASX3R_XXX<0x74028000>;868def XVSLE_W : LASX3R_XXX<0x74030000>;869def XVSLE_D : LASX3R_XXX<0x74038000>;870def XVSLEI_B : LASX2RI5_XXI<0x76820000, simm5>;871def XVSLEI_H : LASX2RI5_XXI<0x76828000, simm5>;872def XVSLEI_W : LASX2RI5_XXI<0x76830000, simm5>;873def XVSLEI_D : LASX2RI5_XXI<0x76838000, simm5>;874 875def XVSLE_BU : LASX3R_XXX<0x74040000>;876def XVSLE_HU : LASX3R_XXX<0x74048000>;877def XVSLE_WU : LASX3R_XXX<0x74050000>;878def XVSLE_DU : LASX3R_XXX<0x74058000>;879def XVSLEI_BU : LASX2RI5_XXI<0x76840000>;880def XVSLEI_HU : LASX2RI5_XXI<0x76848000>;881def XVSLEI_WU : LASX2RI5_XXI<0x76850000>;882def XVSLEI_DU : LASX2RI5_XXI<0x76858000>;883 884def XVSLT_B : LASX3R_XXX<0x74060000>;885def XVSLT_H : LASX3R_XXX<0x74068000>;886def XVSLT_W : LASX3R_XXX<0x74070000>;887def XVSLT_D : LASX3R_XXX<0x74078000>;888def XVSLTI_B : LASX2RI5_XXI<0x76860000, simm5>;889def XVSLTI_H : LASX2RI5_XXI<0x76868000, simm5>;890def XVSLTI_W : LASX2RI5_XXI<0x76870000, simm5>;891def XVSLTI_D : LASX2RI5_XXI<0x76878000, simm5>;892 893def XVSLT_BU : LASX3R_XXX<0x74080000>;894def XVSLT_HU : LASX3R_XXX<0x74088000>;895def XVSLT_WU : LASX3R_XXX<0x74090000>;896def XVSLT_DU : LASX3R_XXX<0x74098000>;897def XVSLTI_BU : LASX2RI5_XXI<0x76880000>;898def XVSLTI_HU : LASX2RI5_XXI<0x76888000>;899def XVSLTI_WU : LASX2RI5_XXI<0x76890000>;900def XVSLTI_DU : LASX2RI5_XXI<0x76898000>;901 902def XVFCMP_CAF_S : LASX3R_XXX<0x0c900000>;903def XVFCMP_SAF_S : LASX3R_XXX<0x0c908000>;904def XVFCMP_CLT_S : LASX3R_XXX<0x0c910000>;905def XVFCMP_SLT_S : LASX3R_XXX<0x0c918000>;906def XVFCMP_CEQ_S : LASX3R_XXX<0x0c920000>;907def XVFCMP_SEQ_S : LASX3R_XXX<0x0c928000>;908def XVFCMP_CLE_S : LASX3R_XXX<0x0c930000>;909def XVFCMP_SLE_S : LASX3R_XXX<0x0c938000>;910def XVFCMP_CUN_S : LASX3R_XXX<0x0c940000>;911def XVFCMP_SUN_S : LASX3R_XXX<0x0c948000>;912def XVFCMP_CULT_S : LASX3R_XXX<0x0c950000>;913def XVFCMP_SULT_S : LASX3R_XXX<0x0c958000>;914def XVFCMP_CUEQ_S : LASX3R_XXX<0x0c960000>;915def XVFCMP_SUEQ_S : LASX3R_XXX<0x0c968000>;916def XVFCMP_CULE_S : LASX3R_XXX<0x0c970000>;917def XVFCMP_SULE_S : LASX3R_XXX<0x0c978000>;918def XVFCMP_CNE_S : LASX3R_XXX<0x0c980000>;919def XVFCMP_SNE_S : LASX3R_XXX<0x0c988000>;920def XVFCMP_COR_S : LASX3R_XXX<0x0c9a0000>;921def XVFCMP_SOR_S : LASX3R_XXX<0x0c9a8000>;922def XVFCMP_CUNE_S : LASX3R_XXX<0x0c9c0000>;923def XVFCMP_SUNE_S : LASX3R_XXX<0x0c9c8000>;924 925def XVFCMP_CAF_D : LASX3R_XXX<0x0ca00000>;926def XVFCMP_SAF_D : LASX3R_XXX<0x0ca08000>;927def XVFCMP_CLT_D : LASX3R_XXX<0x0ca10000>;928def XVFCMP_SLT_D : LASX3R_XXX<0x0ca18000>;929def XVFCMP_CEQ_D : LASX3R_XXX<0x0ca20000>;930def XVFCMP_SEQ_D : LASX3R_XXX<0x0ca28000>;931def XVFCMP_CLE_D : LASX3R_XXX<0x0ca30000>;932def XVFCMP_SLE_D : LASX3R_XXX<0x0ca38000>;933def XVFCMP_CUN_D : LASX3R_XXX<0x0ca40000>;934def XVFCMP_SUN_D : LASX3R_XXX<0x0ca48000>;935def XVFCMP_CULT_D : LASX3R_XXX<0x0ca50000>;936def XVFCMP_SULT_D : LASX3R_XXX<0x0ca58000>;937def XVFCMP_CUEQ_D : LASX3R_XXX<0x0ca60000>;938def XVFCMP_SUEQ_D : LASX3R_XXX<0x0ca68000>;939def XVFCMP_CULE_D : LASX3R_XXX<0x0ca70000>;940def XVFCMP_SULE_D : LASX3R_XXX<0x0ca78000>;941def XVFCMP_CNE_D : LASX3R_XXX<0x0ca80000>;942def XVFCMP_SNE_D : LASX3R_XXX<0x0ca88000>;943def XVFCMP_COR_D : LASX3R_XXX<0x0caa0000>;944def XVFCMP_SOR_D : LASX3R_XXX<0x0caa8000>;945def XVFCMP_CUNE_D : LASX3R_XXX<0x0cac0000>;946def XVFCMP_SUNE_D : LASX3R_XXX<0x0cac8000>;947 948def XVBITSEL_V : LASX4R_XXXX<0x0d200000>;949 950def XVBITSELI_B : LASX2RI8_XXXI<0x77c40000>;951 952def XVSETEQZ_V : LASX2R_CX<0x769c9800>;953def XVSETNEZ_V : LASX2R_CX<0x769c9c00>;954def XVSETANYEQZ_B : LASX2R_CX<0x769ca000>;955def XVSETANYEQZ_H : LASX2R_CX<0x769ca400>;956def XVSETANYEQZ_W : LASX2R_CX<0x769ca800>;957def XVSETANYEQZ_D : LASX2R_CX<0x769cac00>;958def XVSETALLNEZ_B : LASX2R_CX<0x769cb000>;959def XVSETALLNEZ_H : LASX2R_CX<0x769cb400>;960def XVSETALLNEZ_W : LASX2R_CX<0x769cb800>;961def XVSETALLNEZ_D : LASX2R_CX<0x769cbc00>;962 963def XVINSGR2VR_W : LASX2RI3_XXRI<0x76ebc000>;964def XVINSGR2VR_D : LASX2RI2_XXRI<0x76ebe000>;965def XVPICKVE2GR_W : LASX2RI3_RXI<0x76efc000>;966def XVPICKVE2GR_D : LASX2RI2_RXI<0x76efe000>;967def XVPICKVE2GR_WU : LASX2RI3_RXI<0x76f3c000>;968def XVPICKVE2GR_DU : LASX2RI2_RXI<0x76f3e000>;969 970def XVREPLGR2VR_B : LASX2R_XR<0x769f0000>;971def XVREPLGR2VR_H : LASX2R_XR<0x769f0400>;972def XVREPLGR2VR_W : LASX2R_XR<0x769f0800>;973def XVREPLGR2VR_D : LASX2R_XR<0x769f0c00>;974 975def XVREPLVE_B : LASX3R_XXR<0x75220000>;976def XVREPLVE_H : LASX3R_XXR<0x75228000>;977def XVREPLVE_W : LASX3R_XXR<0x75230000>;978def XVREPLVE_D : LASX3R_XXR<0x75238000>;979def XVREPL128VEI_B : LASX2RI4_XXI<0x76f78000>;980def XVREPL128VEI_H : LASX2RI3_XXI<0x76f7c000>;981def XVREPL128VEI_W : LASX2RI2_XXI<0x76f7e000>;982def XVREPL128VEI_D : LASX2RI1_XXI<0x76f7f000>;983 984def XVREPLVE0_B : LASX2R_XX<0x77070000>;985def XVREPLVE0_H : LASX2R_XX<0x77078000>;986def XVREPLVE0_W : LASX2R_XX<0x7707c000>;987def XVREPLVE0_D : LASX2R_XX<0x7707e000>;988def XVREPLVE0_Q : LASX2R_XX<0x7707f000>;989 990def XVINSVE0_W : LASX2RI3_XXXI<0x76ffc000>;991def XVINSVE0_D : LASX2RI2_XXXI<0x76ffe000>;992 993def XVPICKVE_W : LASX2RI3_XXI<0x7703c000>;994def XVPICKVE_D : LASX2RI2_XXI<0x7703e000>;995 996def XVBSLL_V : LASX2RI5_XXI<0x768e0000>;997def XVBSRL_V : LASX2RI5_XXI<0x768e8000>;998 999def XVPACKEV_B : LASX3R_XXX<0x75160000>;1000def XVPACKEV_H : LASX3R_XXX<0x75168000>;1001def XVPACKEV_W : LASX3R_XXX<0x75170000>;1002def XVPACKEV_D : LASX3R_XXX<0x75178000>;1003def XVPACKOD_B : LASX3R_XXX<0x75180000>;1004def XVPACKOD_H : LASX3R_XXX<0x75188000>;1005def XVPACKOD_W : LASX3R_XXX<0x75190000>;1006def XVPACKOD_D : LASX3R_XXX<0x75198000>;1007 1008def XVPICKEV_B : LASX3R_XXX<0x751e0000>;1009def XVPICKEV_H : LASX3R_XXX<0x751e8000>;1010def XVPICKEV_W : LASX3R_XXX<0x751f0000>;1011def XVPICKEV_D : LASX3R_XXX<0x751f8000>;1012def XVPICKOD_B : LASX3R_XXX<0x75200000>;1013def XVPICKOD_H : LASX3R_XXX<0x75208000>;1014def XVPICKOD_W : LASX3R_XXX<0x75210000>;1015def XVPICKOD_D : LASX3R_XXX<0x75218000>;1016 1017def XVILVL_B : LASX3R_XXX<0x751a0000>;1018def XVILVL_H : LASX3R_XXX<0x751a8000>;1019def XVILVL_W : LASX3R_XXX<0x751b0000>;1020def XVILVL_D : LASX3R_XXX<0x751b8000>;1021def XVILVH_B : LASX3R_XXX<0x751c0000>;1022def XVILVH_H : LASX3R_XXX<0x751c8000>;1023def XVILVH_W : LASX3R_XXX<0x751d0000>;1024def XVILVH_D : LASX3R_XXX<0x751d8000>;1025 1026def XVSHUF_B : LASX4R_XXXX<0x0d600000>;1027 1028def XVSHUF_H : LASX3R_XXXX<0x757a8000>;1029def XVSHUF_W : LASX3R_XXXX<0x757b0000>;1030def XVSHUF_D : LASX3R_XXXX<0x757b8000>;1031 1032def XVPERM_W : LASX3R_XXX<0x757d0000>;1033 1034def XVSHUF4I_B : LASX2RI8_XXI<0x77900000>;1035def XVSHUF4I_H : LASX2RI8_XXI<0x77940000>;1036def XVSHUF4I_W : LASX2RI8_XXI<0x77980000>;1037def XVSHUF4I_D : LASX2RI8_XXXI<0x779c0000>;1038 1039def XVPERMI_W : LASX2RI8_XXXI<0x77e40000>;1040def XVPERMI_D : LASX2RI8_XXI<0x77e80000>;1041def XVPERMI_Q : LASX2RI8_XXXI<0x77ec0000>;1042 1043def XVEXTRINS_D : LASX2RI8_XXXI<0x77800000>;1044def XVEXTRINS_W : LASX2RI8_XXXI<0x77840000>;1045def XVEXTRINS_H : LASX2RI8_XXXI<0x77880000>;1046def XVEXTRINS_B : LASX2RI8_XXXI<0x778c0000>;1047} // mayLoad = 0, mayStore = 01048 1049let mayLoad = 1, mayStore = 0 in {1050def XVLD : LASX2RI12_Load<0x2c800000>;1051def XVLDX : LASX3R_Load<0x38480000>;1052 1053def XVLDREPL_B : LASX2RI12_Load<0x32800000>;1054def XVLDREPL_H : LASX2RI11_Load<0x32400000>;1055def XVLDREPL_W : LASX2RI10_Load<0x32200000>;1056def XVLDREPL_D : LASX2RI9_Load<0x32100000>;1057} // mayLoad = 1, mayStore = 01058 1059let mayLoad = 0, mayStore = 1 in {1060def XVST : LASX2RI12_Store<0x2cc00000>;1061def XVSTX : LASX3R_Store<0x384c0000>;1062 1063def XVSTELM_B : LASX2RI8I5_XRII<0x33800000>;1064def XVSTELM_H : LASX2RI8I4_XRII<0x33400000, simm8_lsl1>;1065def XVSTELM_W : LASX2RI8I3_XRII<0x33200000, simm8_lsl2>;1066def XVSTELM_D : LASX2RI8I2_XRII<0x33100000, simm8_lsl3>;1067} // mayLoad = 0, mayStore = 11068 1069} // hasSideEffects = 0, Predicates = [HasExtLASX]1070 1071/// Pseudo-instructions1072 1073let Predicates = [HasExtLASX] in {1074 1075let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0,1076 isAsmParserOnly = 1 in {1077def PseudoXVREPLI_B : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],1078 "xvrepli.b", "$xd, $imm">;1079def PseudoXVREPLI_H : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],1080 "xvrepli.h", "$xd, $imm">;1081def PseudoXVREPLI_W : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],1082 "xvrepli.w", "$xd, $imm">;1083def PseudoXVREPLI_D : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],1084 "xvrepli.d", "$xd, $imm">;1085}1086 1087def PseudoXVBNZ_B : VecCond<loongarch_vall_nonzero, v32i8, LASX256>;1088def PseudoXVBNZ_H : VecCond<loongarch_vall_nonzero, v16i16, LASX256>;1089def PseudoXVBNZ_W : VecCond<loongarch_vall_nonzero, v8i32, LASX256>;1090def PseudoXVBNZ_D : VecCond<loongarch_vall_nonzero, v4i64, LASX256>;1091def PseudoXVBNZ : VecCond<loongarch_vany_nonzero, v32i8, LASX256>;1092 1093def PseudoXVBZ_B : VecCond<loongarch_vall_zero, v32i8, LASX256>;1094def PseudoXVBZ_H : VecCond<loongarch_vall_zero, v16i16, LASX256>;1095def PseudoXVBZ_W : VecCond<loongarch_vall_zero, v8i32, LASX256>;1096def PseudoXVBZ_D : VecCond<loongarch_vall_zero, v4i64, LASX256>;1097def PseudoXVBZ : VecCond<loongarch_vany_zero, v32i8, LASX256>;1098 1099let usesCustomInserter = 1, Constraints = "$xd = $dst" in {1100def PseudoXVINSGR2VR_B1101 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm5:$imm)>;1102def PseudoXVINSGR2VR_H1103 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm4:$imm)>;1104} // usesCustomInserter = 1, Constraints = "$xd = $dst"1105 1106let usesCustomInserter = 1, hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {1107def PseudoXVMSKLTZ_B : Pseudo<(outs GPR:$rd), (ins LASX256:$vj)>;1108def PseudoXVMSKLTZ_H : Pseudo<(outs GPR:$rd), (ins LASX256:$vj)>;1109def PseudoXVMSKLTZ_W : Pseudo<(outs GPR:$rd), (ins LASX256:$vj)>;1110def PseudoXVMSKLTZ_D : Pseudo<(outs GPR:$rd), (ins LASX256:$vj)>;1111def PseudoXVMSKGEZ_B : Pseudo<(outs GPR:$rd), (ins LASX256:$vj)>;1112def PseudoXVMSKEQZ_B : Pseudo<(outs GPR:$rd), (ins LASX256:$vj)>;1113def PseudoXVMSKNEZ_B : Pseudo<(outs GPR:$rd), (ins LASX256:$vj)>;1114} // usesCustomInserter = 1, hasSideEffects = 0, mayLoad = 0, mayStore = 01115 1116} // Predicates = [HasExtLASX]1117 1118multiclass PatXr<SDPatternOperator OpNode, string Inst> {1119 def : Pat<(v32i8 (OpNode (v32i8 LASX256:$xj))),1120 (!cast<LAInst>(Inst#"_B") LASX256:$xj)>;1121 def : Pat<(v16i16 (OpNode (v16i16 LASX256:$xj))),1122 (!cast<LAInst>(Inst#"_H") LASX256:$xj)>;1123 def : Pat<(v8i32 (OpNode (v8i32 LASX256:$xj))),1124 (!cast<LAInst>(Inst#"_W") LASX256:$xj)>;1125 def : Pat<(v4i64 (OpNode (v4i64 LASX256:$xj))),1126 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>;1127}1128 1129multiclass PatXrF<SDPatternOperator OpNode, string Inst> {1130 def : Pat<(v8f32 (OpNode (v8f32 LASX256:$xj))),1131 (!cast<LAInst>(Inst#"_S") LASX256:$xj)>;1132 def : Pat<(v4f64 (OpNode (v4f64 LASX256:$xj))),1133 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>;1134}1135 1136multiclass PatXrXr<SDPatternOperator OpNode, string Inst> {1137 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),1138 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>;1139 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),1140 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>;1141 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)),1142 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>;1143 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)),1144 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;1145}1146 1147multiclass PatXrXrF<SDPatternOperator OpNode, string Inst> {1148 def : Pat<(OpNode (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)),1149 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>;1150 def : Pat<(OpNode (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)),1151 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;1152}1153 1154multiclass PatXrXrU<SDPatternOperator OpNode, string Inst> {1155 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),1156 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>;1157 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),1158 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>;1159 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)),1160 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>;1161 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)),1162 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>;1163}1164 1165multiclass PatXrSimm5<SDPatternOperator OpNode, string Inst> {1166 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_simm5 simm5:$imm))),1167 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>;1168 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_simm5 simm5:$imm))),1169 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>;1170 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_simm5 simm5:$imm))),1171 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>;1172 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_simm5 simm5:$imm))),1173 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>;1174}1175 1176multiclass PatXrUimm5<SDPatternOperator OpNode, string Inst> {1177 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm5 uimm5:$imm))),1178 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>;1179 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm5 uimm5:$imm))),1180 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>;1181 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))),1182 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>;1183 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm5 uimm5:$imm))),1184 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>;1185}1186 1187multiclass PatXrXrXr<SDPatternOperator OpNode, string Inst> {1188 def : Pat<(OpNode (v32i8 LASX256:$xd), (v32i8 LASX256:$xj),1189 (v32i8 LASX256:$xk)),1190 (!cast<LAInst>(Inst#"_B") LASX256:$xd, LASX256:$xj, LASX256:$xk)>;1191 def : Pat<(OpNode (v16i16 LASX256:$xd), (v16i16 LASX256:$xj),1192 (v16i16 LASX256:$xk)),1193 (!cast<LAInst>(Inst#"_H") LASX256:$xd, LASX256:$xj, LASX256:$xk)>;1194 def : Pat<(OpNode (v8i32 LASX256:$xd), (v8i32 LASX256:$xj),1195 (v8i32 LASX256:$xk)),1196 (!cast<LAInst>(Inst#"_W") LASX256:$xd, LASX256:$xj, LASX256:$xk)>;1197 def : Pat<(OpNode (v4i64 LASX256:$xd), (v4i64 LASX256:$xj),1198 (v4i64 LASX256:$xk)),1199 (!cast<LAInst>(Inst#"_D") LASX256:$xd, LASX256:$xj, LASX256:$xk)>;1200}1201 1202multiclass PatXrXrW<SDPatternOperator OpNode, string Inst> {1203 def : Pat<(OpNode(v32i8 LASX256:$vj), (v32i8 LASX256:$vk)),1204 (!cast<LAInst>(Inst#"_H_B") LASX256:$vj, LASX256:$vk)>;1205 def : Pat<(OpNode(v16i16 LASX256:$vj), (v16i16 LASX256:$vk)),1206 (!cast<LAInst>(Inst#"_W_H") LASX256:$vj, LASX256:$vk)>;1207 def : Pat<(OpNode(v8i32 LASX256:$vj), (v8i32 LASX256:$vk)),1208 (!cast<LAInst>(Inst#"_D_W") LASX256:$vj, LASX256:$vk)>;1209 def : Pat<(OpNode(v4i64 LASX256:$vj), (v4i64 LASX256:$vk)),1210 (!cast<LAInst>(Inst#"_Q_D") LASX256:$vj, LASX256:$vk)>;1211}1212 1213multiclass PatShiftXrXr<SDPatternOperator OpNode, string Inst> {1214 def : Pat<(OpNode (v32i8 LASX256:$xj), (and vsplati8_imm_eq_7,1215 (v32i8 LASX256:$xk))),1216 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>;1217 def : Pat<(OpNode (v16i16 LASX256:$xj), (and vsplati16_imm_eq_15,1218 (v16i16 LASX256:$xk))),1219 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>;1220 def : Pat<(OpNode (v8i32 LASX256:$xj), (and vsplati32_imm_eq_31,1221 (v8i32 LASX256:$xk))),1222 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>;1223 def : Pat<(OpNode (v4i64 LASX256:$xj), (and vsplati64_imm_eq_63,1224 (v4i64 LASX256:$xk))),1225 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;1226}1227 1228multiclass PatShiftXrSplatUimm<SDPatternOperator OpNode, string Inst> {1229 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm3 uimm3:$imm))),1230 (!cast<LAInst>(Inst#"_B") LASX256:$xj, uimm3:$imm)>;1231 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm4 uimm4:$imm))),1232 (!cast<LAInst>(Inst#"_H") LASX256:$xj, uimm4:$imm)>;1233 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))),1234 (!cast<LAInst>(Inst#"_W") LASX256:$xj, uimm5:$imm)>;1235 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm6 uimm6:$imm))),1236 (!cast<LAInst>(Inst#"_D") LASX256:$xj, uimm6:$imm)>;1237}1238 1239multiclass PatShiftXrUimm<SDPatternOperator OpNode, string Inst> {1240 def : Pat<(OpNode(v32i8 LASX256:$vj), uimm3:$imm),1241 (!cast<LAInst>(Inst#"_B") LASX256:$vj, uimm3:$imm)>;1242 def : Pat<(OpNode(v16i16 LASX256:$vj), uimm4:$imm),1243 (!cast<LAInst>(Inst#"_H") LASX256:$vj, uimm4:$imm)>;1244 def : Pat<(OpNode(v8i32 LASX256:$vj), uimm5:$imm),1245 (!cast<LAInst>(Inst#"_W") LASX256:$vj, uimm5:$imm)>;1246 def : Pat<(OpNode(v4i64 LASX256:$vj), uimm6:$imm),1247 (!cast<LAInst>(Inst#"_D") LASX256:$vj, uimm6:$imm)>;1248}1249 1250multiclass PatCCXrSimm5<CondCode CC, string Inst> {1251 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj),1252 (v32i8 (SplatPat_simm5 simm5:$imm)), CC)),1253 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>;1254 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj),1255 (v16i16 (SplatPat_simm5 simm5:$imm)), CC)),1256 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>;1257 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj),1258 (v8i32 (SplatPat_simm5 simm5:$imm)), CC)),1259 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>;1260 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj),1261 (v4i64 (SplatPat_simm5 simm5:$imm)), CC)),1262 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>;1263}1264 1265multiclass PatCCXrUimm5<CondCode CC, string Inst> {1266 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj),1267 (v32i8 (SplatPat_uimm5 uimm5:$imm)), CC)),1268 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>;1269 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj),1270 (v16i16 (SplatPat_uimm5 uimm5:$imm)), CC)),1271 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>;1272 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj),1273 (v8i32 (SplatPat_uimm5 uimm5:$imm)), CC)),1274 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>;1275 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj),1276 (v4i64 (SplatPat_uimm5 uimm5:$imm)), CC)),1277 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>;1278}1279 1280multiclass PatCCXrXr<CondCode CC, string Inst> {1281 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)),1282 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>;1283 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)),1284 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>;1285 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)),1286 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>;1287 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)),1288 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;1289}1290 1291multiclass PatCCXrXrU<CondCode CC, string Inst> {1292 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)),1293 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>;1294 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)),1295 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>;1296 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)),1297 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>;1298 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)),1299 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>;1300}1301 1302multiclass PatCCXrXrF<CondCode CC, string Inst> {1303 def : Pat<(v8i32 (setcc (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), CC)),1304 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>;1305 def : Pat<(v4i64 (setcc (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), CC)),1306 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;1307}1308 1309multiclass PairInsertExtractPatV8<ValueType vecty, ValueType elemty> {1310 foreach imm1 = 0...3 in {1311 foreach imm2 = 0...3 in {1312 defvar Imm = !or(!shl(imm2, 4), imm1);1313 def : Pat<(vector_insert (vector_insert vecty:$xd,1314 (elemty (vector_extract vecty:$xj, imm1)), imm2),1315 (elemty (vector_extract vecty:$xj, !add(imm1, 4))),1316 !add(imm2, 4)),1317 (XVEXTRINS_W $xd, $xj, Imm)>;1318 }1319 }1320}1321 1322multiclass PairInsertExtractPatV4<ValueType vecty, ValueType elemty> {1323 foreach imm1 = 0...1 in {1324 foreach imm2 = 0...1 in {1325 defvar Imm = !or(!shl(imm2, 4), imm1);1326 def : Pat<(vector_insert (vector_insert vecty:$xd,1327 (elemty (vector_extract vecty:$xj, imm1)), imm2),1328 (elemty (vector_extract vecty:$xj, !add(imm1, 2))),1329 !add(imm2, 2)),1330 (XVEXTRINS_D $xd, $xj, Imm)>;1331 }1332 }1333}1334 1335let Predicates = [HasExtLASX] in {1336 1337// XVADD_{B/H/W/D}1338defm : PatXrXr<add, "XVADD">;1339// XVSUB_{B/H/W/D}1340defm : PatXrXr<sub, "XVSUB">;1341 1342// XVADDI_{B/H/W/D}U1343defm : PatXrUimm5<add, "XVADDI">;1344// XVSUBI_{B/H/W/D}U1345defm : PatXrUimm5<sub, "XVSUBI">;1346 1347// XVNEG_{B/H/W/D}1348def : Pat<(sub immAllZerosV, (v32i8 LASX256:$xj)), (XVNEG_B LASX256:$xj)>;1349def : Pat<(sub immAllZerosV, (v16i16 LASX256:$xj)), (XVNEG_H LASX256:$xj)>;1350def : Pat<(sub immAllZerosV, (v8i32 LASX256:$xj)), (XVNEG_W LASX256:$xj)>;1351def : Pat<(sub immAllZerosV, (v4i64 LASX256:$xj)), (XVNEG_D LASX256:$xj)>;1352 1353// XVMAX[I]_{B/H/W/D}[U]1354defm : PatXrXr<smax, "XVMAX">;1355defm : PatXrXrU<umax, "XVMAX">;1356defm : PatXrSimm5<smax, "XVMAXI">;1357defm : PatXrUimm5<umax, "XVMAXI">;1358 1359// XVMIN[I]_{B/H/W/D}[U]1360defm : PatXrXr<smin, "XVMIN">;1361defm : PatXrXrU<umin, "XVMIN">;1362defm : PatXrSimm5<smin, "XVMINI">;1363defm : PatXrUimm5<umin, "XVMINI">;1364 1365// XVMUL_{B/H/W/D}1366defm : PatXrXr<mul, "XVMUL">;1367 1368// XVMUH_{B/H/W/D}[U]1369defm : PatXrXr<mulhs, "XVMUH">;1370defm : PatXrXrU<mulhu, "XVMUH">;1371 1372// XVMADD_{B/H/W/D}1373defm : PatXrXrXr<muladd, "XVMADD">;1374// XVMSUB_{B/H/W/D}1375defm : PatXrXrXr<mulsub, "XVMSUB">;1376 1377// XVDIV_{B/H/W/D}[U]1378defm : PatXrXr<sdiv, "XVDIV">;1379defm : PatXrXrU<udiv, "XVDIV">;1380 1381// XVMOD_{B/H/W/D}[U]1382defm : PatXrXr<srem, "XVMOD">;1383defm : PatXrXrU<urem, "XVMOD">;1384 1385// XVAND_V1386foreach vt = [v32i8, v16i16, v8i32, v4i64] in1387def : Pat<(and (vt LASX256:$xj), (vt LASX256:$xk)),1388 (XVAND_V LASX256:$xj, LASX256:$xk)>;1389// XVOR_V1390foreach vt = [v32i8, v16i16, v8i32, v4i64] in1391def : Pat<(or (vt LASX256:$xj), (vt LASX256:$xk)),1392 (XVOR_V LASX256:$xj, LASX256:$xk)>;1393// XVXOR_V1394foreach vt = [v32i8, v16i16, v8i32, v4i64] in1395def : Pat<(xor (vt LASX256:$xj), (vt LASX256:$xk)),1396 (XVXOR_V LASX256:$xj, LASX256:$xk)>;1397// XVNOR_V1398foreach vt = [v32i8, v16i16, v8i32, v4i64] in1399def : Pat<(vnot (or (vt LASX256:$xj), (vt LASX256:$xk))),1400 (XVNOR_V LASX256:$xj, LASX256:$xk)>;1401// XVANDN_V1402foreach vt = [v32i8, v16i16, v8i32, v4i64] in1403def : Pat<(loongarch_vandn (vt LASX256:$xj), (vt LASX256:$xk)),1404 (XVANDN_V LASX256:$xj, LASX256:$xk)>;1405// XVORN_V1406foreach vt = [v32i8, v16i16, v8i32, v4i64] in1407def : Pat<(or (vt LASX256:$xj), (vt (vnot LASX256:$xk))),1408 (XVORN_V LASX256:$xj, LASX256:$xk)>;1409 1410// XVANDI_B1411def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))),1412 (XVANDI_B LASX256:$xj, uimm8:$imm)>;1413// XVORI_B1414def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))),1415 (XVORI_B LASX256:$xj, uimm8:$imm)>;1416// XVXORI_B1417def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))),1418 (XVXORI_B LASX256:$xj, uimm8:$imm)>;1419// XVNORI_B1420def : Pat<(vnot (or (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm)))),1421 (XVNORI_B LASX256:$xj, uimm8:$imm)>;1422 1423// XVBSLL_V1424foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32,1425 v4f64] in def : Pat<(loongarch_vbsll(vt LASX256:$xj), uimm5:$imm),1426 (XVBSLL_V LASX256:$xj, uimm5:$imm)>;1427 1428// XVBSRL_V1429foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32,1430 v4f64] in def : Pat<(loongarch_vbsrl(vt LASX256:$xj), uimm5:$imm),1431 (XVBSRL_V LASX256:$xj, uimm5:$imm)>;1432 1433// XVSLL[I]_{B/H/W/D}1434defm : PatXrXr<shl, "XVSLL">;1435defm : PatShiftXrXr<shl, "XVSLL">;1436defm : PatShiftXrSplatUimm<shl, "XVSLLI">;1437defm : PatShiftXrUimm<loongarch_vslli, "XVSLLI">;1438 1439// XVSRL[I]_{B/H/W/D}1440defm : PatXrXr<srl, "XVSRL">;1441defm : PatShiftXrXr<srl, "XVSRL">;1442defm : PatShiftXrSplatUimm<srl, "XVSRLI">;1443defm : PatShiftXrUimm<loongarch_vsrli, "XVSRLI">;1444 1445// XVSRA[I]_{B/H/W/D}1446defm : PatXrXr<sra, "XVSRA">;1447defm : PatShiftXrXr<sra, "XVSRA">;1448defm : PatShiftXrSplatUimm<sra, "XVSRAI">;1449 1450// XVROTR[I]_{B/H/W/D}1451defm : PatXrXr<rotr, "XVROTR">;1452defm : PatShiftXrXr<rotr, "XVROTR">;1453defm : PatShiftXrSplatUimm<rotr, "XVROTRI">;1454 1455// XVCLZ_{B/H/W/D}1456defm : PatXr<ctlz, "XVCLZ">;1457 1458// XVPCNT_{B/H/W/D}1459defm : PatXr<ctpop, "XVPCNT">;1460 1461// XVBITCLR_{B/H/W/D}1462def : Pat<(loongarch_vandn (v32i8 (shl vsplat_imm_eq_1, v32i8:$xk)), v32i8:$xj),1463 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>;1464def : Pat<(loongarch_vandn (v16i16 (shl vsplat_imm_eq_1, v16i16:$xk)), v16i16:$xj),1465 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>;1466def : Pat<(loongarch_vandn (v8i32 (shl vsplat_imm_eq_1, v8i32:$xk)), v8i32:$xj),1467 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>;1468def : Pat<(loongarch_vandn (v4i64 (shl vsplat_imm_eq_1, v4i64:$xk)), v4i64:$xj),1469 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>;1470def : Pat<(loongarch_vandn (v32i8 (shl vsplat_imm_eq_1,1471 (vsplati8imm7 v32i8:$xk))), v32i8:$xj),1472 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>;1473def : Pat<(loongarch_vandn (v16i16 (shl vsplat_imm_eq_1,1474 (vsplati16imm15 v16i16:$xk))), v16i16:$xj),1475 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>;1476def : Pat<(loongarch_vandn (v8i32 (shl vsplat_imm_eq_1,1477 (vsplati32imm31 v8i32:$xk))), v8i32:$xj),1478 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>;1479def : Pat<(loongarch_vandn (v4i64 (shl vsplat_imm_eq_1,1480 (vsplati64imm63 v4i64:$xk))), v4i64:$xj),1481 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>;1482 1483// XVBITCLRI_{B/H/W/D}1484def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_inv_pow2 uimm3:$imm))),1485 (XVBITCLRI_B LASX256:$xj, uimm3:$imm)>;1486def : Pat<(and (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_inv_pow2 uimm4:$imm))),1487 (XVBITCLRI_H LASX256:$xj, uimm4:$imm)>;1488def : Pat<(and (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_inv_pow2 uimm5:$imm))),1489 (XVBITCLRI_W LASX256:$xj, uimm5:$imm)>;1490def : Pat<(and (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_inv_pow2 uimm6:$imm))),1491 (XVBITCLRI_D LASX256:$xj, uimm6:$imm)>;1492 1493// XVBITSET_{B/H/W/D}1494def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)),1495 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>;1496def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)),1497 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>;1498def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)),1499 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>;1500def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)),1501 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>;1502def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))),1503 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>;1504def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))),1505 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>;1506def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))),1507 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>;1508def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))),1509 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>;1510 1511// XVBITSETI_{B/H/W/D}1512def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))),1513 (XVBITSETI_B LASX256:$xj, uimm3:$imm)>;1514def : Pat<(or (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))),1515 (XVBITSETI_H LASX256:$xj, uimm4:$imm)>;1516def : Pat<(or (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))),1517 (XVBITSETI_W LASX256:$xj, uimm5:$imm)>;1518def : Pat<(or (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))),1519 (XVBITSETI_D LASX256:$xj, uimm6:$imm)>;1520 1521// XVBITREV_{B/H/W/D}1522def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)),1523 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>;1524def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)),1525 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>;1526def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)),1527 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>;1528def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)),1529 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>;1530def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))),1531 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>;1532def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))),1533 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>;1534def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))),1535 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>;1536def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))),1537 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>;1538 1539// XVBITREVI_{B/H/W/D}1540def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))),1541 (XVBITREVI_B LASX256:$xj, uimm3:$imm)>;1542def : Pat<(xor (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))),1543 (XVBITREVI_H LASX256:$xj, uimm4:$imm)>;1544def : Pat<(xor (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))),1545 (XVBITREVI_W LASX256:$xj, uimm5:$imm)>;1546def : Pat<(xor (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))),1547 (XVBITREVI_D LASX256:$xj, uimm6:$imm)>;1548 1549// Vector bswaps1550def : Pat<(bswap (v16i16 LASX256:$xj)), (XVSHUF4I_B LASX256:$xj, 0b10110001)>;1551def : Pat<(bswap (v8i32 LASX256:$xj)), (XVSHUF4I_B LASX256:$xj, 0b00011011)>;1552def : Pat<(bswap (v4i64 LASX256:$xj)),1553 (XVSHUF4I_W (XVSHUF4I_B LASX256:$xj, 0b00011011), 0b10110001)>;1554 1555// XVHADDW_{H_B/W_H/D_W/Q_D}1556defm : PatXrXrW<loongarch_vhaddw, "XVHADDW">;1557 1558// XVFADD_{S/D}1559defm : PatXrXrF<fadd, "XVFADD">;1560 1561// XVFSUB_{S/D}1562defm : PatXrXrF<fsub, "XVFSUB">;1563 1564// XVFMUL_{S/D}1565defm : PatXrXrF<fmul, "XVFMUL">;1566 1567// XVFDIV_{S/D}1568defm : PatXrXrF<fdiv, "XVFDIV">;1569 1570// XVFMAX_{S/D}, XVFMIN_{S/D}1571defm : PatXrXrF<fmaxnum, "XVFMAX">;1572defm : PatXrXrF<fminnum, "XVFMIN">;1573 1574// XVFMADD_{S/D}1575def : Pat<(fma v8f32:$xj, v8f32:$xk, v8f32:$xa),1576 (XVFMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>;1577def : Pat<(fma v4f64:$xj, v4f64:$xk, v4f64:$xa),1578 (XVFMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>;1579 1580// XVFMSUB_{S/D}1581def : Pat<(fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa)),1582 (XVFMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>;1583def : Pat<(fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa)),1584 (XVFMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>;1585 1586// XVFNMADD_{S/D}1587def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, v8f32:$xa)),1588 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>;1589def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, v4f64:$xa)),1590 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>;1591def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, (fneg v8f32:$xa)),1592 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>;1593def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, (fneg v4f64:$xa)),1594 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>;1595 1596// XVFNMSUB_{S/D}1597def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa))),1598 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>;1599def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa))),1600 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>;1601def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, v8f32:$xa),1602 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>;1603def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, v4f64:$xa),1604 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>;1605 1606// XVFSQRT_{S/D}1607defm : PatXrF<fsqrt, "XVFSQRT">;1608 1609// XVFLOGB_{S/D}1610defm : PatXrF<flog2, "XVFLOGB">;1611 1612// XVRECIP_{S/D}1613def : Pat<(fdiv vsplatf32_fpimm_eq_1, v8f32:$xj),1614 (XVFRECIP_S v8f32:$xj)>;1615def : Pat<(fdiv vsplatf64_fpimm_eq_1, v4f64:$xj),1616 (XVFRECIP_D v4f64:$xj)>;1617 1618// XVFRSQRT_{S/D}1619def : Pat<(fdiv vsplatf32_fpimm_eq_1, (fsqrt v8f32:$xj)),1620 (XVFRSQRT_S v8f32:$xj)>;1621def : Pat<(fdiv vsplatf64_fpimm_eq_1, (fsqrt v4f64:$xj)),1622 (XVFRSQRT_D v4f64:$xj)>;1623 1624// XVSEQ[I]_{B/H/W/D}1625defm : PatCCXrSimm5<SETEQ, "XVSEQI">;1626defm : PatCCXrXr<SETEQ, "XVSEQ">;1627 1628// XVSLE[I]_{B/H/W/D}[U]1629defm : PatCCXrSimm5<SETLE, "XVSLEI">;1630defm : PatCCXrUimm5<SETULE, "XVSLEI">;1631defm : PatCCXrXr<SETLE, "XVSLE">;1632defm : PatCCXrXrU<SETULE, "XVSLE">;1633 1634// XVSLT[I]_{B/H/W/D}[U]1635defm : PatCCXrSimm5<SETLT, "XVSLTI">;1636defm : PatCCXrUimm5<SETULT, "XVSLTI">;1637defm : PatCCXrXr<SETLT, "XVSLT">;1638defm : PatCCXrXrU<SETULT, "XVSLT">;1639 1640// XVFCMP.cond.{S/D}1641defm : PatCCXrXrF<SETEQ, "XVFCMP_CEQ">;1642defm : PatCCXrXrF<SETOEQ, "XVFCMP_CEQ">;1643defm : PatCCXrXrF<SETUEQ, "XVFCMP_CUEQ">;1644 1645defm : PatCCXrXrF<SETLE, "XVFCMP_CLE">;1646defm : PatCCXrXrF<SETOLE, "XVFCMP_CLE">;1647defm : PatCCXrXrF<SETULE, "XVFCMP_CULE">;1648 1649defm : PatCCXrXrF<SETLT, "XVFCMP_CLT">;1650defm : PatCCXrXrF<SETOLT, "XVFCMP_CLT">;1651defm : PatCCXrXrF<SETULT, "XVFCMP_CULT">;1652 1653defm : PatCCXrXrF<SETNE, "XVFCMP_CNE">;1654defm : PatCCXrXrF<SETONE, "XVFCMP_CNE">;1655defm : PatCCXrXrF<SETUNE, "XVFCMP_CUNE">;1656 1657defm : PatCCXrXrF<SETO, "XVFCMP_COR">;1658defm : PatCCXrXrF<SETUO, "XVFCMP_CUN">;1659 1660// Insert two elements extracted from vector into vector. (The positions1661// of the two elements must be same in the source or destination vector's1662// front and back 128bits.)1663// 2*XVPICKVE2GR_{W/D} + 2*XVINSGR2VR_{W/D} -> XVEXTRINS_{W/D}1664// XVPERMI_D + 2*XVPICKVE2GR_{B/H} + 2*PseudoXVINSGR2VR_{B/H} -> XVEXTRINS_{W/D}1665foreach imm1 = 0...15 in {1666 foreach imm2 = 0...15 in {1667 defvar Imm = !or(!shl(imm2, 4), imm1);1668 def : Pat<(vector_insert (vector_insert v32i8:$xd,1669 (GRLenVT (vector_extract v32i8:$xj, imm1)), imm2),1670 (GRLenVT (vector_extract v32i8:$xj, !add(imm1, 16))),1671 !add(imm2, 16)),1672 (XVEXTRINS_B $xd, $xj, Imm)>;1673 }1674}1675 1676foreach imm1 = 0...7 in {1677 foreach imm2 = 0...7 in {1678 defvar Imm = !or(!shl(imm2, 4), imm1);1679 def : Pat<(vector_insert (vector_insert v16i16:$xd,1680 (GRLenVT (vector_extract v16i16:$xj, imm1)), imm2),1681 (GRLenVT (vector_extract v16i16:$xj, !add(imm1, 8))),1682 !add(imm2, 8)),1683 (XVEXTRINS_H $xd, $xj, Imm)>;1684 }1685}1686 1687defm : PairInsertExtractPatV8<v8i32, GRLenVT>;1688defm : PairInsertExtractPatV8<v8f32, f32>;1689defm : PairInsertExtractPatV4<v4i64, GRLenVT>;1690defm : PairInsertExtractPatV4<v4f64, f64>;1691 1692def : Pat<(vector_insert v8i32:$xd, (GRLenVT(vector_extract v8i32:$xj, 0)),1693 uimm3:$imm),1694 (XVINSVE0_W v8i32:$xd, v8i32:$xj, uimm3:$imm)>;1695 1696def : Pat<(vector_insert v4i64:$xd, (GRLenVT(vector_extract v4i64:$xj, 0)),1697 uimm2:$imm),1698 (XVINSVE0_D v4i64:$xd, v4i64:$xj, uimm2:$imm)>;1699 1700def : Pat<(vector_insert v8i32:$xd,1701 (GRLenVT(vector_extract v8i32:$xj, uimm3:$imm1)), uimm3:$imm2),1702 (XVINSVE0_W v8i32:$xd, (XVPICKVE_W v8i32:$xj, uimm3:$imm1),1703 uimm3:$imm2)>;1704 1705def : Pat<(vector_insert v4i64:$xd,1706 (GRLenVT(vector_extract v4i64:$xj, uimm2:$imm1)), uimm2:$imm2),1707 (XVINSVE0_D v4i64:$xd, (XVPICKVE_D v4i64:$xj, uimm2:$imm1),1708 uimm2:$imm2)>;1709 1710// PseudoXVINSGR2VR_{B/H}1711def : Pat<(vector_insert v32i8:$xd, GRLenVT:$rj, uimm5:$imm),1712 (PseudoXVINSGR2VR_B v32i8:$xd, GRLenVT:$rj, uimm5:$imm)>;1713def : Pat<(vector_insert v16i16:$xd, GRLenVT:$rj, uimm4:$imm),1714 (PseudoXVINSGR2VR_H v16i16:$xd, GRLenVT:$rj, uimm4:$imm)>;1715 1716// XVINSGR2VR_{W/D}1717def : Pat<(vector_insert v8i32:$xd, GRLenVT:$rj, uimm3:$imm),1718 (XVINSGR2VR_W v8i32:$xd, GRLenVT:$rj, uimm3:$imm)>;1719def : Pat<(vector_insert v4i64:$xd, GRLenVT:$rj, uimm2:$imm),1720 (XVINSGR2VR_D v4i64:$xd, GRLenVT:$rj, uimm2:$imm)>;1721def : Pat<(vector_insert v8f32:$xd, (loongarch_movgr2fr_w_la64 GPR:$rj),1722 uimm3:$imm),1723 (XVINSGR2VR_W v8f32:$xd, GPR:$rj, uimm3:$imm)>;1724def : Pat<(vector_insert v4f64:$xd, (f64(bitconvert i64:$rj)), uimm2:$imm),1725 (XVINSGR2VR_D v4f64:$xd, GPR:$rj, uimm2:$imm)>;1726 1727// XVINSVE0_{W/D}1728def : Pat<(loongarch_xvinsve0 v8i32:$xd, v8i32:$xj, uimm3:$imm),1729 (XVINSVE0_W v8i32:$xd, v8i32:$xj, uimm3:$imm)>;1730def : Pat<(loongarch_xvinsve0 v4i64:$xd, v4i64:$xj, uimm2:$imm),1731 (XVINSVE0_D v4i64:$xd, v4i64:$xj, uimm2:$imm)>;1732def : Pat<(loongarch_xvinsve0 v8f32:$xd, v8f32:$xj, uimm3:$imm),1733 (XVINSVE0_W v8f32:$xd, v8f32:$xj, uimm3:$imm)>;1734def : Pat<(loongarch_xvinsve0 v4f64:$xd, v4f64:$xj, uimm2:$imm),1735 (XVINSVE0_D v4f64:$xd, v4f64:$xj, uimm2:$imm)>;1736def : Pat<(vector_insert v8f32:$xd, FPR32:$fj, uimm3:$imm),1737 (XVINSVE0_W v8f32:$xd, (SUBREG_TO_REG(i64 0), FPR32:$fj, sub_32),1738 uimm3:$imm)>;1739def : Pat<(vector_insert v4f64:$xd, FPR64:$fj, uimm2:$imm),1740 (XVINSVE0_D v4f64:$xd, (SUBREG_TO_REG(i64 0), FPR64:$fj, sub_64),1741 uimm2:$imm)>;1742 1743// scalar_to_vector1744def : Pat<(v8f32 (scalar_to_vector FPR32:$fj)),1745 (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32)>;1746def : Pat<(v4f64 (scalar_to_vector FPR64:$fj)),1747 (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64)>; 1748 1749// XVPICKVE2GR_W[U]1750def : Pat<(loongarch_vpick_sext_elt v8i32:$xd, uimm3:$imm, i32),1751 (XVPICKVE2GR_W v8i32:$xd, uimm3:$imm)>;1752def : Pat<(loongarch_vpick_zext_elt v8i32:$xd, uimm3:$imm, i32),1753 (XVPICKVE2GR_WU v8i32:$xd, uimm3:$imm)>;1754 1755// XVREPLGR2VR_{B/H/W/D}1756def : Pat<(lasxsplati8 GPR:$rj), (XVREPLGR2VR_B GPR:$rj)>;1757def : Pat<(lasxsplati16 GPR:$rj), (XVREPLGR2VR_H GPR:$rj)>;1758def : Pat<(lasxsplati32 GPR:$rj), (XVREPLGR2VR_W GPR:$rj)>;1759def : Pat<(lasxsplati64 GPR:$rj), (XVREPLGR2VR_D GPR:$rj)>;1760 1761def : Pat<(v32i8 (loongarch_vreplgr2vr GRLenVT:$rj)),1762 (v32i8 (XVREPLGR2VR_B GRLenVT:$rj))>;1763def : Pat<(v16i16 (loongarch_vreplgr2vr GRLenVT:$rj)),1764 (v16i16 (XVREPLGR2VR_H GRLenVT:$rj))>;1765def : Pat<(v8i32 (loongarch_vreplgr2vr GRLenVT:$rj)),1766 (v8i32 (XVREPLGR2VR_W GRLenVT:$rj))>;1767def : Pat<(v4i64 (loongarch_vreplgr2vr GRLenVT:$rj)),1768 (v4i64 (XVREPLGR2VR_D GRLenVT:$rj))>;1769 1770// XVREPLVE_{B/H/W/D}1771def : Pat<(loongarch_vreplve v32i8:$xj, GRLenVT:$rk),1772 (XVREPLVE_B v32i8:$xj, GRLenVT:$rk)>;1773def : Pat<(loongarch_vreplve v16i16:$xj, GRLenVT:$rk),1774 (XVREPLVE_H v16i16:$xj, GRLenVT:$rk)>;1775def : Pat<(loongarch_vreplve v8i32:$xj, GRLenVT:$rk),1776 (XVREPLVE_W v8i32:$xj, GRLenVT:$rk)>;1777def : Pat<(loongarch_vreplve v4i64:$xj, GRLenVT:$rk),1778 (XVREPLVE_D v4i64:$xj, GRLenVT:$rk)>;1779 1780// XVSHUF_{B/H/W/D}1781def : Pat<(loongarch_vshuf v32i8:$xa, v32i8:$xj, v32i8:$xk),1782 (XVSHUF_B v32i8:$xj, v32i8:$xk, v32i8:$xa)>;1783def : Pat<(loongarch_vshuf v16i16:$xd, v16i16:$xj, v16i16:$xk),1784 (XVSHUF_H v16i16:$xd, v16i16:$xj, v16i16:$xk)>;1785def : Pat<(loongarch_vshuf v8i32:$xd, v8i32:$xj, v8i32:$xk),1786 (XVSHUF_W v8i32:$xd, v8i32:$xj, v8i32:$xk)>;1787def : Pat<(loongarch_vshuf v4i64:$xd, v4i64:$xj, v4i64:$xk),1788 (XVSHUF_D v4i64:$xd, v4i64:$xj, v4i64:$xk)>;1789def : Pat<(loongarch_vshuf v8i32:$xd, v8f32:$xj, v8f32:$xk),1790 (XVSHUF_W v8i32:$xd, v8f32:$xj, v8f32:$xk)>;1791def : Pat<(loongarch_vshuf v4i64:$xd, v4f64:$xj, v4f64:$xk),1792 (XVSHUF_D v4i64:$xd, v4f64:$xj, v4f64:$xk)>;1793 1794// XVPICKEV_{B/H/W/D}1795def : Pat<(loongarch_vpickev v32i8:$xj, v32i8:$xk),1796 (XVPICKEV_B v32i8:$xj, v32i8:$xk)>;1797def : Pat<(loongarch_vpickev v16i16:$xj, v16i16:$xk),1798 (XVPICKEV_H v16i16:$xj, v16i16:$xk)>;1799def : Pat<(loongarch_vpickev v8i32:$xj, v8i32:$xk),1800 (XVPICKEV_W v8i32:$xj, v8i32:$xk)>;1801def : Pat<(loongarch_vpickev v4i64:$xj, v4i64:$xk),1802 (XVPICKEV_D v4i64:$xj, v4i64:$xk)>;1803def : Pat<(loongarch_vpickev v8f32:$xj, v8f32:$xk),1804 (XVPICKEV_W v8f32:$xj, v8f32:$xk)>;1805def : Pat<(loongarch_vpickev v4f64:$xj, v4f64:$xk),1806 (XVPICKEV_D v4f64:$xj, v4f64:$xk)>;1807 1808// XVPICKOD_{B/H/W/D}1809def : Pat<(loongarch_vpickod v32i8:$xj, v32i8:$xk),1810 (XVPICKOD_B v32i8:$xj, v32i8:$xk)>;1811def : Pat<(loongarch_vpickod v16i16:$xj, v16i16:$xk),1812 (XVPICKOD_H v16i16:$xj, v16i16:$xk)>;1813def : Pat<(loongarch_vpickod v8i32:$xj, v8i32:$xk),1814 (XVPICKOD_W v8i32:$xj, v8i32:$xk)>;1815def : Pat<(loongarch_vpickod v4i64:$xj, v4i64:$xk),1816 (XVPICKOD_D v4i64:$xj, v4i64:$xk)>;1817def : Pat<(loongarch_vpickod v8f32:$xj, v8f32:$xk),1818 (XVPICKOD_W v8f32:$xj, v8f32:$xk)>;1819def : Pat<(loongarch_vpickod v4f64:$xj, v4f64:$xk),1820 (XVPICKOD_D v4f64:$xj, v4f64:$xk)>;1821 1822// XVPACKEV_{B/H/W/D}1823def : Pat<(loongarch_vpackev v32i8:$xj, v32i8:$xk),1824 (XVPACKEV_B v32i8:$xj, v32i8:$xk)>;1825def : Pat<(loongarch_vpackev v16i16:$xj, v16i16:$xk),1826 (XVPACKEV_H v16i16:$xj, v16i16:$xk)>;1827def : Pat<(loongarch_vpackev v8i32:$xj, v8i32:$xk),1828 (XVPACKEV_W v8i32:$xj, v8i32:$xk)>;1829def : Pat<(loongarch_vpackev v4i64:$xj, v4i64:$xk),1830 (XVPACKEV_D v4i64:$xj, v4i64:$xk)>;1831def : Pat<(loongarch_vpackev v8f32:$xj, v8f32:$xk),1832 (XVPACKEV_W v8f32:$xj, v8f32:$xk)>;1833def : Pat<(loongarch_vpackev v4f64:$xj, v4f64:$xk),1834 (XVPACKEV_D v4f64:$xj, v4f64:$xk)>;1835 1836// XVPACKOD_{B/H/W/D}1837def : Pat<(loongarch_vpackod v32i8:$xj, v32i8:$xk),1838 (XVPACKOD_B v32i8:$xj, v32i8:$xk)>;1839def : Pat<(loongarch_vpackod v16i16:$xj, v16i16:$xk),1840 (XVPACKOD_H v16i16:$xj, v16i16:$xk)>;1841def : Pat<(loongarch_vpackod v8i32:$xj, v8i32:$xk),1842 (XVPACKOD_W v8i32:$xj, v8i32:$xk)>;1843def : Pat<(loongarch_vpackod v4i64:$xj, v4i64:$xk),1844 (XVPACKOD_D v4i64:$xj, v4i64:$xk)>;1845def : Pat<(loongarch_vpackod v8f32:$xj, v8f32:$xk),1846 (XVPACKOD_W v8f32:$xj, v8f32:$xk)>;1847def : Pat<(loongarch_vpackod v4f64:$xj, v4f64:$xk),1848 (XVPACKOD_D v4f64:$xj, v4f64:$xk)>;1849 1850// XVILVL_{B/H/W/D}1851def : Pat<(loongarch_vilvl v32i8:$xj, v32i8:$xk),1852 (XVILVL_B v32i8:$xj, v32i8:$xk)>;1853def : Pat<(loongarch_vilvl v16i16:$xj, v16i16:$xk),1854 (XVILVL_H v16i16:$xj, v16i16:$xk)>;1855def : Pat<(loongarch_vilvl v8i32:$xj, v8i32:$xk),1856 (XVILVL_W v8i32:$xj, v8i32:$xk)>;1857def : Pat<(loongarch_vilvl v4i64:$xj, v4i64:$xk),1858 (XVILVL_D v4i64:$xj, v4i64:$xk)>;1859def : Pat<(loongarch_vilvl v8f32:$xj, v8f32:$xk),1860 (XVILVL_W v8f32:$xj, v8f32:$xk)>;1861def : Pat<(loongarch_vilvl v4f64:$xj, v4f64:$xk),1862 (XVILVL_D v4f64:$xj, v4f64:$xk)>;1863 1864// XVILVH_{B/H/W/D}1865def : Pat<(loongarch_vilvh v32i8:$xj, v32i8:$xk),1866 (XVILVH_B v32i8:$xj, v32i8:$xk)>;1867def : Pat<(loongarch_vilvh v16i16:$xj, v16i16:$xk),1868 (XVILVH_H v16i16:$xj, v16i16:$xk)>;1869def : Pat<(loongarch_vilvh v8i32:$xj, v8i32:$xk),1870 (XVILVH_W v8i32:$xj, v8i32:$xk)>;1871def : Pat<(loongarch_vilvh v4i64:$xj, v4i64:$xk),1872 (XVILVH_D v4i64:$xj, v4i64:$xk)>;1873def : Pat<(loongarch_vilvh v8f32:$xj, v8f32:$xk),1874 (XVILVH_W v8f32:$xj, v8f32:$xk)>;1875def : Pat<(loongarch_vilvh v4f64:$xj, v4f64:$xk),1876 (XVILVH_D v4f64:$xj, v4f64:$xk)>;1877 1878// XVSHUF4I_{B/H/W}1879def : Pat<(loongarch_vshuf4i v32i8:$xj, immZExt8:$ui8),1880 (XVSHUF4I_B v32i8:$xj, immZExt8:$ui8)>;1881def : Pat<(loongarch_vshuf4i v16i16:$xj, immZExt8:$ui8),1882 (XVSHUF4I_H v16i16:$xj, immZExt8:$ui8)>;1883def : Pat<(loongarch_vshuf4i v8i32:$xj, immZExt8:$ui8),1884 (XVSHUF4I_W v8i32:$xj, immZExt8:$ui8)>;1885def : Pat<(loongarch_vshuf4i v8f32:$xj, immZExt8:$ui8),1886 (XVSHUF4I_W v8f32:$xj, immZExt8:$ui8)>;1887def : Pat<(loongarch_vshuf4i_d v4i64:$xj, v4i64:$xk, immZExt8:$ui8),1888 (XVSHUF4I_D v4i64:$xj, v4i64:$xk, immZExt8:$ui8)>;1889def : Pat<(loongarch_vshuf4i_d v4f64:$xj, v4f64:$xk, immZExt8:$ui8),1890 (XVSHUF4I_D v4f64:$xj, v4f64:$xk, immZExt8:$ui8)>;1891 1892// XVREPL128VEI_{B/H/W/D}1893def : Pat<(loongarch_vreplvei v32i8:$xj, immZExt4:$ui4),1894 (XVREPL128VEI_B v32i8:$xj, immZExt4:$ui4)>;1895def : Pat<(loongarch_vreplvei v16i16:$xj, immZExt3:$ui3),1896 (XVREPL128VEI_H v16i16:$xj, immZExt3:$ui3)>;1897def : Pat<(loongarch_vreplvei v8i32:$xj, immZExt2:$ui2),1898 (XVREPL128VEI_W v8i32:$xj, immZExt2:$ui2)>;1899def : Pat<(loongarch_vreplvei v4i64:$xj, immZExt1:$ui1),1900 (XVREPL128VEI_D v4i64:$xj, immZExt1:$ui1)>;1901def : Pat<(loongarch_vreplvei v8f32:$xj, immZExt2:$ui2),1902 (XVREPL128VEI_W v8f32:$xj, immZExt2:$ui2)>;1903def : Pat<(loongarch_vreplvei v4f64:$xj, immZExt1:$ui1),1904 (XVREPL128VEI_D v4f64:$xj, immZExt1:$ui1)>;1905 1906// XVPERMI_D1907def : Pat<(loongarch_xvpermi v4i64:$xj, immZExt8: $ui8),1908 (XVPERMI_D v4i64:$xj, immZExt8: $ui8)>;1909def : Pat<(loongarch_xvpermi v4f64:$xj, immZExt8: $ui8),1910 (XVPERMI_D v4f64:$xj, immZExt8: $ui8)>;1911 1912// XVPERM_W1913def : Pat<(loongarch_xvperm v8i32:$xj, v8i32:$xk),1914 (XVPERM_W v8i32:$xj, v8i32:$xk)>;1915def : Pat<(loongarch_xvperm v8f32:$xj, v8i32:$xk),1916 (XVPERM_W v8f32:$xj, v8i32:$xk)>;1917 1918// XVREPLVE0_{B/H/W/D/Q}1919def : Pat<(loongarch_xvreplve0 v32i8:$xj),1920 (XVREPLVE0_B v32i8:$xj)>;1921def : Pat<(loongarch_xvreplve0 v16i16:$xj),1922 (XVREPLVE0_H v16i16:$xj)>;1923def : Pat<(loongarch_xvreplve0 v8i32:$xj),1924 (XVREPLVE0_W v8i32:$xj)>;1925def : Pat<(loongarch_xvreplve0 v4i64:$xj),1926 (XVREPLVE0_D v4i64:$xj)>;1927def : Pat<(loongarch_xvreplve0 v8f32:$xj),1928 (XVREPLVE0_W v8f32:$xj)>;1929def : Pat<(loongarch_xvreplve0 v4f64:$xj),1930 (XVREPLVE0_D v4f64:$xj)>;1931def : Pat<(lasxsplatf32 FPR32:$fj),1932 (XVREPLVE0_W (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32))>;1933def : Pat<(lasxsplatf64 FPR64:$fj),1934 (XVREPLVE0_D (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64))>;1935foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in1936 def : Pat<(vt (loongarch_xvreplve0q LASX256:$xj)),1937 (XVREPLVE0_Q LASX256:$xj)>;1938 1939// VSTELM1940defm : VstelmPat<truncstorei8, v32i8, XVSTELM_B, simm8, uimm5>;1941defm : VstelmPat<truncstorei16, v16i16, XVSTELM_H, simm8_lsl1, uimm4>;1942defm : VstelmPat<truncstorei32, v8i32, XVSTELM_W, simm8_lsl2, uimm3>;1943defm : VstelmPat<store, v4i64, XVSTELM_D, simm8_lsl3, uimm2>;1944defm : VstelmPat<store, v8f32, XVSTELM_W, simm8_lsl2, uimm3, f32>;1945defm : VstelmPat<store, v4f64, XVSTELM_D, simm8_lsl3, uimm2, f64>;1946 1947// Loads/Stores1948foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in {1949 defm : LdPat<load, XVLD, vt>;1950 def : RegRegLdPat<load, XVLDX, vt>;1951 defm : StPat<store, XVST, LASX256, vt>;1952 def : RegRegStPat<store, XVSTX, LASX256, vt>;1953}1954 1955// Bitcast float/double element extracted from vector to integer.1956def : Pat<(loongarch_movfr2gr_s_la64 (f32 (vector_extract v8f32:$xj, uimm3:$imm))),1957 (XVPICKVE2GR_W v8f32:$xj, uimm3:$imm)>;1958def : Pat<(i64 (bitconvert (f64 (vector_extract v4f64:$xj, uimm2:$imm)))),1959 (XVPICKVE2GR_D v4f64:$xj, uimm2:$imm)>;1960 1961// Vector extraction with constant index.1962foreach imm = 16...31 in {1963 defvar Imm = !and(imm, 15);1964 def : Pat<(GRLenVT (vector_extract v32i8:$xj, imm)),1965 (VPICKVE2GR_B (EXTRACT_SUBREG (XVPERMI_D v32i8:$xj, 14), sub_128),1966 Imm)>;1967}1968foreach imm = 8...15 in {1969 defvar Imm = !and(imm, 7);1970 def : Pat<(GRLenVT (vector_extract v16i16:$xj, imm)),1971 (VPICKVE2GR_H (EXTRACT_SUBREG (XVPERMI_D v16i16:$xj, 14), sub_128),1972 Imm)>;1973}1974def : Pat<(GRLenVT (vector_extract v32i8:$xj, uimm4:$imm)),1975 (VPICKVE2GR_B (EXTRACT_SUBREG v32i8:$xj, sub_128), uimm4:$imm)>;1976def : Pat<(GRLenVT (vector_extract v16i16:$xj, uimm3:$imm)),1977 (VPICKVE2GR_H (EXTRACT_SUBREG v16i16:$xj, sub_128), uimm3:$imm)>;1978def : Pat<(GRLenVT (vector_extract v8i32:$xj, uimm3:$imm)),1979 (XVPICKVE2GR_W v8i32:$xj, uimm3:$imm)>;1980def : Pat<(i64 (vector_extract v4i64:$xj, uimm2:$imm)),1981 (XVPICKVE2GR_D v4i64:$xj, uimm2:$imm)>;1982def : Pat<(f32(vector_extract v8f32:$xj, uimm3:$imm)),1983 (EXTRACT_SUBREG(XVPICKVE_W v8f32:$xj, uimm3:$imm), sub_32)>;1984def : Pat<(f64(vector_extract v4f64:$xj, uimm2:$imm)),1985 (EXTRACT_SUBREG(XVPICKVE_D v4f64:$xj, uimm2:$imm), sub_64)>;1986 1987// vselect1988def : Pat<(v32i8 (vselect LASX256:$xd, (v32i8 (SplatPat_uimm8 uimm8:$imm)),1989 LASX256:$xj)),1990 (XVBITSELI_B LASX256:$xd, LASX256:$xj, uimm8:$imm)>;1991foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in1992 def : Pat<(vt (vselect LASX256:$xa, LASX256:$xk, LASX256:$xj)),1993 (XVBITSEL_V LASX256:$xj, LASX256:$xk, LASX256:$xa)>;1994 1995// fneg1996def : Pat<(fneg (v8f32 LASX256:$xj)), (XVBITREVI_W LASX256:$xj, 31)>;1997def : Pat<(fneg (v4f64 LASX256:$xj)), (XVBITREVI_D LASX256:$xj, 63)>;1998 1999// XVFFINT_{S_W/D_L}2000def : Pat<(v8f32 (sint_to_fp v8i32:$vj)), (XVFFINT_S_W v8i32:$vj)>;2001def : Pat<(v4f64 (sint_to_fp v4i64:$vj)), (XVFFINT_D_L v4i64:$vj)>;2002def : Pat<(v4f64 (sint_to_fp v4i32:$vj)),2003 (XVFFINT_D_L (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), v4i32:$vj,2004 sub_128)))>;2005def : Pat<(v4f32 (sint_to_fp v4i64:$vj)),2006 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_L v4i64:$vj), 238),2007 (XVFFINT_D_L v4i64:$vj)),2008 sub_128)>;2009 2010// XVFFINT_{S_WU/D_LU}2011def : Pat<(v8f32 (uint_to_fp v8i32:$vj)), (XVFFINT_S_WU v8i32:$vj)>;2012def : Pat<(v4f64 (uint_to_fp v4i64:$vj)), (XVFFINT_D_LU v4i64:$vj)>;2013def : Pat<(v4f64 (uint_to_fp v4i32:$vj)),2014 (XVFFINT_D_LU (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), v4i32:$vj,2015 sub_128)))>;2016def : Pat<(v4f32 (uint_to_fp v4i64:$vj)),2017 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_LU v4i64:$vj), 238),2018 (XVFFINT_D_LU v4i64:$vj)),2019 sub_128)>;2020 2021// XVFTINTRZ_{W_S/L_D}2022def : Pat<(v8i32 (fp_to_sint v8f32:$vj)), (XVFTINTRZ_W_S v8f32:$vj)>;2023def : Pat<(v4i64 (fp_to_sint v4f64:$vj)), (XVFTINTRZ_L_D v4f64:$vj)>;2024def : Pat<(v4i64(fp_to_sint v4f32:$vj)), (VEXT2XV_D_W(SUBREG_TO_REG(i64 0),2025 (VFTINTRZ_W_S v4f32:$vj),2026 sub_128))>;2027def : Pat<(v4i32(fp_to_sint v4f64:$vj)),2028 (EXTRACT_SUBREG(XVPICKEV_W(XVPERMI_D(XVFTINTRZ_L_D v4f64:$vj), 238),2029 (XVFTINTRZ_L_D v4f64:$vj)),2030 sub_128)>;2031 2032// XVFTINTRZ_{W_SU/L_DU}2033def : Pat<(v8i32 (fp_to_uint v8f32:$vj)), (XVFTINTRZ_WU_S v8f32:$vj)>;2034def : Pat<(v4i64 (fp_to_uint v4f64:$vj)), (XVFTINTRZ_LU_D v4f64:$vj)>;2035def : Pat<(v4i64(fp_to_uint v4f32:$vj)), (VEXT2XV_DU_WU(SUBREG_TO_REG(i64 0),2036 (VFTINTRZ_WU_S v4f32:$vj),2037 sub_128))>;2038def : Pat<(v4i32(fp_to_uint v4f64:$vj)),2039 (EXTRACT_SUBREG(XVPICKEV_W(XVPERMI_D(XVFTINTRZ_LU_D v4f64:$vj), 238),2040 (XVFTINTRZ_LU_D v4f64:$vj)),2041 sub_128)>;2042 2043// XVAVG_{B/H/W/D/BU/HU/WU/DU}, XVAVGR_{B/H/W/D/BU/HU/WU/DU}2044defm : VAvgPat<sra, "XVAVG_B", v32i8>;2045defm : VAvgPat<sra, "XVAVG_H", v16i16>;2046defm : VAvgPat<sra, "XVAVG_W", v8i32>;2047defm : VAvgPat<sra, "XVAVG_D", v4i64>;2048defm : VAvgPat<srl, "XVAVG_BU", v32i8>;2049defm : VAvgPat<srl, "XVAVG_HU", v16i16>;2050defm : VAvgPat<srl, "XVAVG_WU", v8i32>;2051defm : VAvgPat<srl, "XVAVG_DU", v4i64>;2052defm : VAvgrPat<sra, "XVAVGR_B", v32i8>;2053defm : VAvgrPat<sra, "XVAVGR_H", v16i16>;2054defm : VAvgrPat<sra, "XVAVGR_W", v8i32>;2055defm : VAvgrPat<sra, "XVAVGR_D", v4i64>;2056defm : VAvgrPat<srl, "XVAVGR_BU", v32i8>;2057defm : VAvgrPat<srl, "XVAVGR_HU", v16i16>;2058defm : VAvgrPat<srl, "XVAVGR_WU", v8i32>;2059defm : VAvgrPat<srl, "XVAVGR_DU", v4i64>;2060 2061// abs2062def : Pat<(abs v32i8:$xj), (XVSIGNCOV_B v32i8:$xj, v32i8:$xj)>;2063def : Pat<(abs v16i16:$xj), (XVSIGNCOV_H v16i16:$xj, v16i16:$xj)>;2064def : Pat<(abs v8i32:$xj), (XVSIGNCOV_W v8i32:$xj, v8i32:$xj)>;2065def : Pat<(abs v4i64:$xj), (XVSIGNCOV_D v4i64:$xj, v4i64:$xj)>;2066 2067// XVABSD_{B/H/W/D}[U]2068defm : PatXrXr<abds, "XVABSD">;2069defm : PatXrXrU<abdu, "XVABSD">;2070 2071// XVADDA_{B/H/W/D}2072def : Pat<(add (v32i8 (abs v32i8:$xj)), (v32i8 (abs v32i8:$xk))),2073 (XVADDA_B v32i8:$xj, v32i8:$xk)>;2074def : Pat<(add (v16i16 (abs v16i16:$xj)), (v16i16 (abs v16i16:$xk))),2075 (XVADDA_H v16i16:$xj, v16i16:$xk)>;2076def : Pat<(add (v8i32 (abs v8i32:$xj)), (v8i32 (abs v8i32:$xk))),2077 (XVADDA_W v8i32:$xj, v8i32:$xk)>;2078def : Pat<(add (v4i64 (abs v4i64:$xj)), (v4i64 (abs v4i64:$xk))),2079 (XVADDA_D v4i64:$xj, v4i64:$xk)>;2080 2081// XVSADD_{B/H/W/D}[U], XVSSUB_{B/H/W/D}[U]2082defm : PatXrXr<saddsat, "XVSADD">;2083defm : PatXrXr<ssubsat, "XVSSUB">;2084defm : PatXrXrU<uaddsat, "XVSADD">;2085defm : PatXrXrU<usubsat, "XVSSUB">;2086 2087// Vector mask set by condition2088def : Pat<(loongarch_xvmskltz (v32i8 LASX256:$vj)), (PseudoXVMSKLTZ_B LASX256:$vj)>;2089def : Pat<(loongarch_xvmskltz (v16i16 LASX256:$vj)), (PseudoXVMSKLTZ_H LASX256:$vj)>;2090def : Pat<(loongarch_xvmskltz (v8i32 LASX256:$vj)), (PseudoXVMSKLTZ_W LASX256:$vj)>;2091def : Pat<(loongarch_xvmskltz (v4i64 LASX256:$vj)), (PseudoXVMSKLTZ_D LASX256:$vj)>;2092def : Pat<(loongarch_xvmskgez (v32i8 LASX256:$vj)), (PseudoXVMSKGEZ_B LASX256:$vj)>;2093def : Pat<(loongarch_xvmskeqz (v32i8 LASX256:$vj)), (PseudoXVMSKEQZ_B LASX256:$vj)>;2094def : Pat<(loongarch_xvmsknez (v32i8 LASX256:$vj)), (PseudoXVMSKNEZ_B LASX256:$vj)>;2095 2096// Subvector tricks2097// Patterns for insert_subvector/extract_subvector2098multiclass subvector_subreg_lowering<RegisterClass subRC, ValueType subVT,2099 RegisterClass RC, ValueType VT,2100 int hiIdx, SubRegIndex subIdx> {2101 // A 128-bit subvector extract from the first 256-bit vector position is a2102 // subregister copy that needs no instruction. Likewise, a 128-bit subvector2103 // insert to the first 256-bit vector position is a subregister copy that needs2104 // no instruction.2105 def : Pat<(subVT (extract_subvector (VT RC:$src), (iPTR 0))),2106 (subVT (EXTRACT_SUBREG RC:$src, subIdx))>;2107 def : Pat<(VT (insert_subvector undef_or_freeze_undef, subRC:$src, (iPTR 0))),2108 (VT (INSERT_SUBREG (IMPLICIT_DEF), subRC:$src, subIdx))>;2109 2110 def : Pat<(subVT (extract_subvector (VT RC:$src), (iPTR hiIdx))),2111 (subVT (EXTRACT_SUBREG (XVPERMI_Q (IMPLICIT_DEF), RC:$src, 1), subIdx))>;2112 def : Pat<(VT (insert_subvector RC:$vd, subRC:$vj, (iPTR 0))),2113 (VT (XVPERMI_Q RC:$vd, (INSERT_SUBREG (IMPLICIT_DEF), subRC:$vj, subIdx), 48))>;2114 def : Pat<(VT (insert_subvector RC:$vd, subRC:$vj, (iPTR hiIdx))),2115 (VT (XVPERMI_Q RC:$vd, (INSERT_SUBREG (IMPLICIT_DEF), subRC:$vj, subIdx), 2))>;2116}2117 2118defm : subvector_subreg_lowering<LSX128, v4i32, LASX256, v8i32, 4, sub_128>;2119defm : subvector_subreg_lowering<LSX128, v4f32, LASX256, v8f32, 4, sub_128>;2120defm : subvector_subreg_lowering<LSX128, v2i64, LASX256, v4i64, 2, sub_128>;2121defm : subvector_subreg_lowering<LSX128, v2f64, LASX256, v4f64, 2, sub_128>;2122defm : subvector_subreg_lowering<LSX128, v8i16, LASX256, v16i16, 8, sub_128>;2123defm : subvector_subreg_lowering<LSX128, v16i8, LASX256, v32i8, 16, sub_128>;2124 2125// LASX and LSX conversion2126def : Pat<(int_loongarch_lasx_cast_128_s (v4f32 LSX128:$src)),2127 (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$src, sub_128)>;2128def : Pat<(int_loongarch_lasx_cast_128_d (v2f64 LSX128:$src)),2129 (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$src, sub_128)>;2130def : Pat<(int_loongarch_lasx_cast_128 (v2i64 LSX128:$src)),2131 (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$src, sub_128)>;2132def : Pat<(int_loongarch_lasx_extract_128_lo_s (v8f32 LASX256:$src)),2133 (EXTRACT_SUBREG LASX256:$src, sub_128)>;2134def : Pat<(int_loongarch_lasx_extract_128_lo_d (v4f64 LASX256:$src)),2135 (EXTRACT_SUBREG LASX256:$src, sub_128)>;2136def : Pat<(int_loongarch_lasx_extract_128_lo (v4i64 LASX256:$src)),2137 (EXTRACT_SUBREG LASX256:$src, sub_128)>;2138def : Pat<(int_loongarch_lasx_extract_128_hi_s (v8f32 LASX256:$src)),2139 (EXTRACT_SUBREG (XVPERMI_Q (IMPLICIT_DEF), LASX256:$src, 1), sub_128)>;2140def : Pat<(int_loongarch_lasx_extract_128_hi_d (v4f64 LASX256:$src)),2141 (EXTRACT_SUBREG (XVPERMI_Q (IMPLICIT_DEF), LASX256:$src, 1), sub_128)>;2142def : Pat<(int_loongarch_lasx_extract_128_hi (v4i64 LASX256:$src)),2143 (EXTRACT_SUBREG (XVPERMI_Q (IMPLICIT_DEF), LASX256:$src, 1), sub_128)>;2144def : Pat<(int_loongarch_lasx_insert_128_lo_s (v8f32 LASX256:$src), (v4f32 LSX128:$lo)),2145 (XVPERMI_Q LASX256:$src, (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$lo, sub_128), 48)>;2146def : Pat<(int_loongarch_lasx_insert_128_lo_d (v4f64 LASX256:$src), (v2f64 LSX128:$lo)),2147 (XVPERMI_Q LASX256:$src, (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$lo, sub_128), 48)>;2148def : Pat<(int_loongarch_lasx_insert_128_lo (v4i64 LASX256:$src), (v2i64 LSX128:$lo)),2149 (XVPERMI_Q LASX256:$src, (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$lo, sub_128), 48)>;2150def : Pat<(int_loongarch_lasx_insert_128_hi_s (v8f32 LASX256:$src), (v4f32 LSX128:$lo)),2151 (XVPERMI_Q LASX256:$src, (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$lo, sub_128), 2)>;2152def : Pat<(int_loongarch_lasx_insert_128_hi_d (v4f64 LASX256:$src), (v2f64 LSX128:$lo)),2153 (XVPERMI_Q LASX256:$src, (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$lo, sub_128), 2)>;2154def : Pat<(int_loongarch_lasx_insert_128_hi (v4i64 LASX256:$src), (v2i64 LSX128:$lo)),2155 (XVPERMI_Q LASX256:$src, (INSERT_SUBREG (IMPLICIT_DEF), LSX128:$lo, sub_128), 2)>;2156} // Predicates = [HasExtLASX]2157 2158/// Intrinsic pattern2159 2160class deriveLASXIntrinsic<string Inst> {2161 Intrinsic ret = !cast<Intrinsic>(!tolower("int_loongarch_lasx_"#Inst));2162}2163 2164let Predicates = [HasExtLASX] in {2165 2166// vty: v32i8/v16i16/v8i32/v4i642167// Pat<(Intrinsic vty:$xj, vty:$xk),2168// (LAInst vty:$xj, vty:$xk)>;2169foreach Inst = ["XVSADD_B", "XVSADD_BU", "XVSSUB_B", "XVSSUB_BU",2170 "XVHADDW_H_B", "XVHADDW_HU_BU", "XVHSUBW_H_B", "XVHSUBW_HU_BU",2171 "XVADDWEV_H_B", "XVADDWOD_H_B", "XVSUBWEV_H_B", "XVSUBWOD_H_B",2172 "XVADDWEV_H_BU", "XVADDWOD_H_BU", "XVSUBWEV_H_BU", "XVSUBWOD_H_BU",2173 "XVADDWEV_H_BU_B", "XVADDWOD_H_BU_B",2174 "XVAVG_B", "XVAVG_BU", "XVAVGR_B", "XVAVGR_BU",2175 "XVABSD_B", "XVABSD_BU", "XVADDA_B", "XVMUH_B", "XVMUH_BU",2176 "XVMULWEV_H_B", "XVMULWOD_H_B", "XVMULWEV_H_BU", "XVMULWOD_H_BU",2177 "XVMULWEV_H_BU_B", "XVMULWOD_H_BU_B", "XVSIGNCOV_B",2178 "XVANDN_V", "XVORN_V", "XVROTR_B", "XVSRLR_B", "XVSRAR_B",2179 "XVSEQ_B", "XVSLE_B", "XVSLE_BU", "XVSLT_B", "XVSLT_BU",2180 "XVPACKEV_B", "XVPACKOD_B", "XVPICKEV_B", "XVPICKOD_B",2181 "XVILVL_B", "XVILVH_B"] in2182 def : Pat<(deriveLASXIntrinsic<Inst>.ret2183 (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),2184 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>;2185foreach Inst = ["XVSADD_H", "XVSADD_HU", "XVSSUB_H", "XVSSUB_HU",2186 "XVHADDW_W_H", "XVHADDW_WU_HU", "XVHSUBW_W_H", "XVHSUBW_WU_HU",2187 "XVADDWEV_W_H", "XVADDWOD_W_H", "XVSUBWEV_W_H", "XVSUBWOD_W_H",2188 "XVADDWEV_W_HU", "XVADDWOD_W_HU", "XVSUBWEV_W_HU", "XVSUBWOD_W_HU",2189 "XVADDWEV_W_HU_H", "XVADDWOD_W_HU_H",2190 "XVAVG_H", "XVAVG_HU", "XVAVGR_H", "XVAVGR_HU",2191 "XVABSD_H", "XVABSD_HU", "XVADDA_H", "XVMUH_H", "XVMUH_HU",2192 "XVMULWEV_W_H", "XVMULWOD_W_H", "XVMULWEV_W_HU", "XVMULWOD_W_HU",2193 "XVMULWEV_W_HU_H", "XVMULWOD_W_HU_H", "XVSIGNCOV_H", "XVROTR_H",2194 "XVSRLR_H", "XVSRAR_H", "XVSRLN_B_H", "XVSRAN_B_H", "XVSRLRN_B_H",2195 "XVSRARN_B_H", "XVSSRLN_B_H", "XVSSRAN_B_H", "XVSSRLN_BU_H",2196 "XVSSRAN_BU_H", "XVSSRLRN_B_H", "XVSSRARN_B_H", "XVSSRLRN_BU_H",2197 "XVSSRARN_BU_H",2198 "XVSEQ_H", "XVSLE_H", "XVSLE_HU", "XVSLT_H", "XVSLT_HU",2199 "XVPACKEV_H", "XVPACKOD_H", "XVPICKEV_H", "XVPICKOD_H",2200 "XVILVL_H", "XVILVH_H"] in2201 def : Pat<(deriveLASXIntrinsic<Inst>.ret2202 (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),2203 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>;2204foreach Inst = ["XVSADD_W", "XVSADD_WU", "XVSSUB_W", "XVSSUB_WU",2205 "XVHADDW_D_W", "XVHADDW_DU_WU", "XVHSUBW_D_W", "XVHSUBW_DU_WU",2206 "XVADDWEV_D_W", "XVADDWOD_D_W", "XVSUBWEV_D_W", "XVSUBWOD_D_W",2207 "XVADDWEV_D_WU", "XVADDWOD_D_WU", "XVSUBWEV_D_WU", "XVSUBWOD_D_WU",2208 "XVADDWEV_D_WU_W", "XVADDWOD_D_WU_W",2209 "XVAVG_W", "XVAVG_WU", "XVAVGR_W", "XVAVGR_WU",2210 "XVABSD_W", "XVABSD_WU", "XVADDA_W", "XVMUH_W", "XVMUH_WU",2211 "XVMULWEV_D_W", "XVMULWOD_D_W", "XVMULWEV_D_WU", "XVMULWOD_D_WU",2212 "XVMULWEV_D_WU_W", "XVMULWOD_D_WU_W", "XVSIGNCOV_W", "XVROTR_W",2213 "XVSRLR_W", "XVSRAR_W", "XVSRLN_H_W", "XVSRAN_H_W", "XVSRLRN_H_W",2214 "XVSRARN_H_W", "XVSSRLN_H_W", "XVSSRAN_H_W", "XVSSRLN_HU_W",2215 "XVSSRAN_HU_W", "XVSSRLRN_H_W", "XVSSRARN_H_W", "XVSSRLRN_HU_W",2216 "XVSSRARN_HU_W",2217 "XVSEQ_W", "XVSLE_W", "XVSLE_WU", "XVSLT_W", "XVSLT_WU",2218 "XVPACKEV_W", "XVPACKOD_W", "XVPICKEV_W", "XVPICKOD_W",2219 "XVILVL_W", "XVILVH_W", "XVPERM_W"] in2220 def : Pat<(deriveLASXIntrinsic<Inst>.ret2221 (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)),2222 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>;2223foreach Inst = ["XVADD_Q", "XVSUB_Q",2224 "XVSADD_D", "XVSADD_DU", "XVSSUB_D", "XVSSUB_DU",2225 "XVHADDW_Q_D", "XVHADDW_QU_DU", "XVHSUBW_Q_D", "XVHSUBW_QU_DU",2226 "XVADDWEV_Q_D", "XVADDWOD_Q_D", "XVSUBWEV_Q_D", "XVSUBWOD_Q_D",2227 "XVADDWEV_Q_DU", "XVADDWOD_Q_DU", "XVSUBWEV_Q_DU", "XVSUBWOD_Q_DU",2228 "XVADDWEV_Q_DU_D", "XVADDWOD_Q_DU_D",2229 "XVAVG_D", "XVAVG_DU", "XVAVGR_D", "XVAVGR_DU",2230 "XVABSD_D", "XVABSD_DU", "XVADDA_D", "XVMUH_D", "XVMUH_DU",2231 "XVMULWEV_Q_D", "XVMULWOD_Q_D", "XVMULWEV_Q_DU", "XVMULWOD_Q_DU",2232 "XVMULWEV_Q_DU_D", "XVMULWOD_Q_DU_D", "XVSIGNCOV_D", "XVROTR_D",2233 "XVSRLR_D", "XVSRAR_D", "XVSRLN_W_D", "XVSRAN_W_D", "XVSRLRN_W_D",2234 "XVSRARN_W_D", "XVSSRLN_W_D", "XVSSRAN_W_D", "XVSSRLN_WU_D",2235 "XVSSRAN_WU_D", "XVSSRLRN_W_D", "XVSSRARN_W_D", "XVSSRLRN_WU_D",2236 "XVSSRARN_WU_D", "XVFFINT_S_L",2237 "XVSEQ_D", "XVSLE_D", "XVSLE_DU", "XVSLT_D", "XVSLT_DU",2238 "XVPACKEV_D", "XVPACKOD_D", "XVPICKEV_D", "XVPICKOD_D",2239 "XVILVL_D", "XVILVH_D"] in2240 def : Pat<(deriveLASXIntrinsic<Inst>.ret2241 (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)),2242 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>;2243 2244// vty: v32i8/v16i16/v8i32/v4i642245// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk),2246// (LAInst vty:$xd, vty:$xj, vty:$xk)>;2247foreach Inst = ["XVMADDWEV_H_B", "XVMADDWOD_H_B", "XVMADDWEV_H_BU",2248 "XVMADDWOD_H_BU", "XVMADDWEV_H_BU_B", "XVMADDWOD_H_BU_B"] in2249 def : Pat<(deriveLASXIntrinsic<Inst>.ret2250 (v16i16 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),2251 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2252foreach Inst = ["XVMADDWEV_W_H", "XVMADDWOD_W_H", "XVMADDWEV_W_HU",2253 "XVMADDWOD_W_HU", "XVMADDWEV_W_HU_H", "XVMADDWOD_W_HU_H"] in2254 def : Pat<(deriveLASXIntrinsic<Inst>.ret2255 (v8i32 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),2256 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2257foreach Inst = ["XVMADDWEV_D_W", "XVMADDWOD_D_W", "XVMADDWEV_D_WU",2258 "XVMADDWOD_D_WU", "XVMADDWEV_D_WU_W", "XVMADDWOD_D_WU_W"] in2259 def : Pat<(deriveLASXIntrinsic<Inst>.ret2260 (v4i64 LASX256:$xd), (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)),2261 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2262foreach Inst = ["XVMADDWEV_Q_D", "XVMADDWOD_Q_D", "XVMADDWEV_Q_DU",2263 "XVMADDWOD_Q_DU", "XVMADDWEV_Q_DU_D", "XVMADDWOD_Q_DU_D"] in2264 def : Pat<(deriveLASXIntrinsic<Inst>.ret2265 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)),2266 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2267 2268// vty: v32i8/v16i16/v8i32/v4i642269// Pat<(Intrinsic vty:$xj),2270// (LAInst vty:$xj)>;2271foreach Inst = ["XVEXTH_H_B", "XVEXTH_HU_BU",2272 "XVMSKLTZ_B", "XVMSKGEZ_B", "XVMSKNZ_B",2273 "XVCLO_B", "VEXT2XV_H_B", "VEXT2XV_HU_BU",2274 "VEXT2XV_W_B", "VEXT2XV_WU_BU", "VEXT2XV_D_B",2275 "VEXT2XV_DU_BU", "XVREPLVE0_B", "XVREPLVE0_Q"] in2276 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj)),2277 (!cast<LAInst>(Inst) LASX256:$xj)>;2278foreach Inst = ["XVEXTH_W_H", "XVEXTH_WU_HU", "XVMSKLTZ_H",2279 "XVCLO_H", "XVFCVTL_S_H", "XVFCVTH_S_H",2280 "VEXT2XV_W_H", "VEXT2XV_WU_HU", "VEXT2XV_D_H",2281 "VEXT2XV_DU_HU", "XVREPLVE0_H"] in2282 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj)),2283 (!cast<LAInst>(Inst) LASX256:$xj)>;2284foreach Inst = ["XVEXTH_D_W", "XVEXTH_DU_WU", "XVMSKLTZ_W",2285 "XVCLO_W", "XVFFINT_S_W", "XVFFINT_S_WU",2286 "XVFFINTL_D_W", "XVFFINTH_D_W",2287 "VEXT2XV_D_W", "VEXT2XV_DU_WU", "XVREPLVE0_W"] in2288 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj)),2289 (!cast<LAInst>(Inst) LASX256:$xj)>;2290foreach Inst = ["XVEXTH_Q_D", "XVEXTH_QU_DU", "XVMSKLTZ_D",2291 "XVEXTL_Q_D", "XVEXTL_QU_DU",2292 "XVCLO_D", "XVFFINT_D_L", "XVFFINT_D_LU",2293 "XVREPLVE0_D"] in2294 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj)),2295 (!cast<LAInst>(Inst) LASX256:$xj)>;2296 2297// Pat<(Intrinsic timm:$imm)2298// (LAInst timm:$imm)>;2299def : Pat<(int_loongarch_lasx_xvldi timm:$imm),2300 (XVLDI (to_valid_timm timm:$imm))>;2301foreach Inst = ["XVREPLI_B", "XVREPLI_H", "XVREPLI_W", "XVREPLI_D"] in2302 def : Pat<(deriveLASXIntrinsic<Inst>.ret timm:$imm),2303 (!cast<LAInst>("Pseudo"#Inst) (to_valid_timm timm:$imm))>;2304 2305// vty: v32i8/v16i16/v8i32/v4i642306// Pat<(Intrinsic vty:$xj, timm:$imm)2307// (LAInst vty:$xj, timm:$imm)>;2308foreach Inst = ["XVSAT_B", "XVSAT_BU", "XVNORI_B", "XVROTRI_B", "XVSLLWIL_H_B",2309 "XVSLLWIL_HU_BU", "XVSRLRI_B", "XVSRARI_B",2310 "XVSEQI_B", "XVSLEI_B", "XVSLEI_BU", "XVSLTI_B", "XVSLTI_BU",2311 "XVREPL128VEI_B", "XVBSLL_V", "XVBSRL_V", "XVSHUF4I_B"] in2312 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj), timm:$imm),2313 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>;2314foreach Inst = ["XVSAT_H", "XVSAT_HU", "XVROTRI_H", "XVSLLWIL_W_H",2315 "XVSLLWIL_WU_HU", "XVSRLRI_H", "XVSRARI_H",2316 "XVSEQI_H", "XVSLEI_H", "XVSLEI_HU", "XVSLTI_H", "XVSLTI_HU",2317 "XVREPL128VEI_H", "XVSHUF4I_H"] in2318 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj), timm:$imm),2319 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>;2320foreach Inst = ["XVSAT_W", "XVSAT_WU", "XVROTRI_W", "XVSLLWIL_D_W",2321 "XVSLLWIL_DU_WU", "XVSRLRI_W", "XVSRARI_W",2322 "XVSEQI_W", "XVSLEI_W", "XVSLEI_WU", "XVSLTI_W", "XVSLTI_WU",2323 "XVREPL128VEI_W", "XVSHUF4I_W", "XVPICKVE_W"] in2324 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj), timm:$imm),2325 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>;2326foreach Inst = ["XVSAT_D", "XVSAT_DU", "XVROTRI_D", "XVSRLRI_D", "XVSRARI_D",2327 "XVSEQI_D", "XVSLEI_D", "XVSLEI_DU", "XVSLTI_D", "XVSLTI_DU",2328 "XVPICKVE2GR_D", "XVPICKVE2GR_DU",2329 "XVREPL128VEI_D", "XVPERMI_D", "XVPICKVE_D"] in2330 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj), timm:$imm),2331 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>;2332 2333// vty: v32i8/v16i16/v8i32/v4i642334// Pat<(Intrinsic vty:$xd, vty:$xj, timm:$imm)2335// (LAInst vty:$xd, vty:$xj, timm:$imm)>;2336foreach Inst = ["XVSRLNI_B_H", "XVSRANI_B_H", "XVSRLRNI_B_H", "XVSRARNI_B_H",2337 "XVSSRLNI_B_H", "XVSSRANI_B_H", "XVSSRLNI_BU_H", "XVSSRANI_BU_H",2338 "XVSSRLRNI_B_H", "XVSSRARNI_B_H", "XVSSRLRNI_BU_H", "XVSSRARNI_BU_H",2339 "XVFRSTPI_B", "XVBITSELI_B", "XVEXTRINS_B", "XVPERMI_Q"] in2340 def : Pat<(deriveLASXIntrinsic<Inst>.ret2341 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), timm:$imm),2342 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj,2343 (to_valid_timm timm:$imm))>;2344foreach Inst = ["XVSRLNI_H_W", "XVSRANI_H_W", "XVSRLRNI_H_W", "XVSRARNI_H_W",2345 "XVSSRLNI_H_W", "XVSSRANI_H_W", "XVSSRLNI_HU_W", "XVSSRANI_HU_W",2346 "XVSSRLRNI_H_W", "XVSSRARNI_H_W", "XVSSRLRNI_HU_W", "XVSSRARNI_HU_W",2347 "XVFRSTPI_H", "XVEXTRINS_H"] in2348 def : Pat<(deriveLASXIntrinsic<Inst>.ret2349 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), timm:$imm),2350 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj,2351 (to_valid_timm timm:$imm))>;2352foreach Inst = ["XVSRLNI_W_D", "XVSRANI_W_D", "XVSRLRNI_W_D", "XVSRARNI_W_D",2353 "XVSSRLNI_W_D", "XVSSRANI_W_D", "XVSSRLNI_WU_D", "XVSSRANI_WU_D",2354 "XVSSRLRNI_W_D", "XVSSRARNI_W_D", "XVSSRLRNI_WU_D", "XVSSRARNI_WU_D",2355 "XVPERMI_W", "XVEXTRINS_W", "XVINSVE0_W"] in2356 def : Pat<(deriveLASXIntrinsic<Inst>.ret2357 (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), timm:$imm),2358 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj,2359 (to_valid_timm timm:$imm))>;2360foreach Inst = ["XVSRLNI_D_Q", "XVSRANI_D_Q", "XVSRLRNI_D_Q", "XVSRARNI_D_Q",2361 "XVSSRLNI_D_Q", "XVSSRANI_D_Q", "XVSSRLNI_DU_Q", "XVSSRANI_DU_Q",2362 "XVSSRLRNI_D_Q", "XVSSRARNI_D_Q", "XVSSRLRNI_DU_Q", "XVSSRARNI_DU_Q",2363 "XVSHUF4I_D", "XVEXTRINS_D", "XVINSVE0_D"] in2364 def : Pat<(deriveLASXIntrinsic<Inst>.ret2365 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), timm:$imm),2366 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj,2367 (to_valid_timm timm:$imm))>;2368 2369// vty: v32i8/v16i16/v8i32/v4i642370// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk),2371// (LAInst vty:$xd, vty:$xj, vty:$xk)>;2372foreach Inst = ["XVFRSTP_B", "XVBITSEL_V", "XVSHUF_B"] in2373 def : Pat<(deriveLASXIntrinsic<Inst>.ret2374 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),2375 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2376foreach Inst = ["XVFRSTP_H", "XVSHUF_H"] in2377 def : Pat<(deriveLASXIntrinsic<Inst>.ret2378 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),2379 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2380def : Pat<(int_loongarch_lasx_xvshuf_w (v8i32 LASX256:$xd), (v8i32 LASX256:$xj),2381 (v8i32 LASX256:$xk)),2382 (XVSHUF_W LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2383def : Pat<(int_loongarch_lasx_xvshuf_d (v4i64 LASX256:$xd), (v4i64 LASX256:$xj),2384 (v4i64 LASX256:$xk)),2385 (XVSHUF_D LASX256:$xd, LASX256:$xj, LASX256:$xk)>;2386 2387// vty: v8f32/v4f642388// Pat<(Intrinsic vty:$xj, vty:$xk, vty:$xa),2389// (LAInst vty:$xj, vty:$xk, vty:$xa)>;2390foreach Inst = ["XVFMSUB_S", "XVFNMADD_S", "XVFNMSUB_S"] in2391 def : Pat<(deriveLASXIntrinsic<Inst>.ret2392 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), (v8f32 LASX256:$xa)),2393 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>;2394foreach Inst = ["XVFMSUB_D", "XVFNMADD_D", "XVFNMSUB_D"] in2395 def : Pat<(deriveLASXIntrinsic<Inst>.ret2396 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), (v4f64 LASX256:$xa)),2397 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>;2398 2399// vty: v8f32/v4f642400// Pat<(Intrinsic vty:$xj, vty:$xk),2401// (LAInst vty:$xj, vty:$xk)>;2402foreach Inst = ["XVFMAX_S", "XVFMIN_S", "XVFMAXA_S", "XVFMINA_S", "XVFCVT_H_S",2403 "XVFCMP_CAF_S", "XVFCMP_CUN_S", "XVFCMP_CEQ_S", "XVFCMP_CUEQ_S",2404 "XVFCMP_CLT_S", "XVFCMP_CULT_S", "XVFCMP_CLE_S", "XVFCMP_CULE_S",2405 "XVFCMP_CNE_S", "XVFCMP_COR_S", "XVFCMP_CUNE_S",2406 "XVFCMP_SAF_S", "XVFCMP_SUN_S", "XVFCMP_SEQ_S", "XVFCMP_SUEQ_S",2407 "XVFCMP_SLT_S", "XVFCMP_SULT_S", "XVFCMP_SLE_S", "XVFCMP_SULE_S",2408 "XVFCMP_SNE_S", "XVFCMP_SOR_S", "XVFCMP_SUNE_S"] in2409 def : Pat<(deriveLASXIntrinsic<Inst>.ret2410 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)),2411 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>;2412foreach Inst = ["XVFMAX_D", "XVFMIN_D", "XVFMAXA_D", "XVFMINA_D", "XVFCVT_S_D",2413 "XVFTINTRNE_W_D", "XVFTINTRZ_W_D", "XVFTINTRP_W_D", "XVFTINTRM_W_D",2414 "XVFTINT_W_D",2415 "XVFCMP_CAF_D", "XVFCMP_CUN_D", "XVFCMP_CEQ_D", "XVFCMP_CUEQ_D",2416 "XVFCMP_CLT_D", "XVFCMP_CULT_D", "XVFCMP_CLE_D", "XVFCMP_CULE_D",2417 "XVFCMP_CNE_D", "XVFCMP_COR_D", "XVFCMP_CUNE_D",2418 "XVFCMP_SAF_D", "XVFCMP_SUN_D", "XVFCMP_SEQ_D", "XVFCMP_SUEQ_D",2419 "XVFCMP_SLT_D", "XVFCMP_SULT_D", "XVFCMP_SLE_D", "XVFCMP_SULE_D",2420 "XVFCMP_SNE_D", "XVFCMP_SOR_D", "XVFCMP_SUNE_D"] in2421 def : Pat<(deriveLASXIntrinsic<Inst>.ret2422 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)),2423 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>;2424 2425// vty: v8f32/v4f642426// Pat<(Intrinsic vty:$xj),2427// (LAInst vty:$xj)>;2428foreach Inst = ["XVFLOGB_S", "XVFCLASS_S", "XVFSQRT_S", "XVFRECIP_S", "XVFRSQRT_S",2429 "XVFRINT_S", "XVFCVTL_D_S", "XVFCVTH_D_S",2430 "XVFRINTRNE_S", "XVFRINTRZ_S", "XVFRINTRP_S", "XVFRINTRM_S",2431 "XVFTINTRNE_W_S", "XVFTINTRZ_W_S", "XVFTINTRP_W_S", "XVFTINTRM_W_S",2432 "XVFTINT_W_S", "XVFTINTRZ_WU_S", "XVFTINT_WU_S",2433 "XVFTINTRNEL_L_S", "XVFTINTRNEH_L_S", "XVFTINTRZL_L_S",2434 "XVFTINTRZH_L_S", "XVFTINTRPL_L_S", "XVFTINTRPH_L_S",2435 "XVFTINTRML_L_S", "XVFTINTRMH_L_S", "XVFTINTL_L_S",2436 "XVFTINTH_L_S"] in2437 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)),2438 (!cast<LAInst>(Inst) LASX256:$xj)>;2439foreach Inst = ["XVFLOGB_D", "XVFCLASS_D", "XVFSQRT_D", "XVFRECIP_D", "XVFRSQRT_D",2440 "XVFRINT_D",2441 "XVFRINTRNE_D", "XVFRINTRZ_D", "XVFRINTRP_D", "XVFRINTRM_D",2442 "XVFTINTRNE_L_D", "XVFTINTRZ_L_D", "XVFTINTRP_L_D", "XVFTINTRM_L_D",2443 "XVFTINT_L_D", "XVFTINTRZ_LU_D", "XVFTINT_LU_D"] in2444 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)),2445 (!cast<LAInst>(Inst) LASX256:$xj)>;2446 2447// 256-Bit vector FP approximate reciprocal operation2448let Predicates = [HasFrecipe] in {2449foreach Inst = ["XVFRECIPE_S", "XVFRSQRTE_S"] in2450 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)),2451 (!cast<LAInst>(Inst) LASX256:$xj)>;2452foreach Inst = ["XVFRECIPE_D", "XVFRSQRTE_D"] in2453 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)),2454 (!cast<LAInst>(Inst) LASX256:$xj)>;2455 2456def : Pat<(loongarch_vfrecipe v8f32:$src), 2457 (XVFRECIPE_S v8f32:$src)>;2458def : Pat<(loongarch_vfrecipe v4f64:$src), 2459 (XVFRECIPE_D v4f64:$src)>;2460def : Pat<(loongarch_vfrsqrte v8f32:$src), 2461 (XVFRSQRTE_S v8f32:$src)>;2462def : Pat<(loongarch_vfrsqrte v4f64:$src), 2463 (XVFRSQRTE_D v4f64:$src)>;2464}2465 2466def : Pat<(int_loongarch_lasx_xvpickve_w_f v8f32:$xj, timm:$imm),2467 (XVPICKVE_W v8f32:$xj, (to_valid_timm timm:$imm))>;2468def : Pat<(int_loongarch_lasx_xvpickve_d_f v4f64:$xj, timm:$imm),2469 (XVPICKVE_D v4f64:$xj, (to_valid_timm timm:$imm))>;2470 2471// Vector floating-point conversion2472defm : PatXrF<fceil, "XVFRINTRP">;2473defm : PatXrF<ffloor, "XVFRINTRM">;2474defm : PatXrF<ftrunc, "XVFRINTRZ">;2475defm : PatXrF<froundeven, "XVFRINTRNE">;2476 2477// load2478def : Pat<(int_loongarch_lasx_xvld GPR:$rj, timm:$imm),2479 (XVLD GPR:$rj, (to_valid_timm timm:$imm))>;2480def : Pat<(int_loongarch_lasx_xvldx GPR:$rj, GPR:$rk),2481 (XVLDX GPR:$rj, GPR:$rk)>;2482 2483// xvldrepl2484def : Pat<(int_loongarch_lasx_xvldrepl_b GPR:$rj, timm:$imm),2485 (XVLDREPL_B GPR:$rj, (to_valid_timm timm:$imm))>;2486def : Pat<(int_loongarch_lasx_xvldrepl_h GPR:$rj, timm:$imm),2487 (XVLDREPL_H GPR:$rj, (to_valid_timm timm:$imm))>;2488def : Pat<(int_loongarch_lasx_xvldrepl_w GPR:$rj, timm:$imm),2489 (XVLDREPL_W GPR:$rj, (to_valid_timm timm:$imm))>;2490def : Pat<(int_loongarch_lasx_xvldrepl_d GPR:$rj, timm:$imm),2491 (XVLDREPL_D GPR:$rj, (to_valid_timm timm:$imm))>;2492 2493defm : VldreplPat<v32i8, XVLDREPL_B, simm12_addlike>;2494defm : VldreplPat<v16i16, XVLDREPL_H, simm11_lsl1>;2495defm : VldreplPat<v8i32, XVLDREPL_W, simm10_lsl2>;2496defm : VldreplPat<v4i64, XVLDREPL_D, simm9_lsl3>;2497defm : VldreplPat<v8f32, XVLDREPL_W, simm10_lsl2>;2498defm : VldreplPat<v4f64, XVLDREPL_D, simm9_lsl3>;2499 2500// store2501def : Pat<(int_loongarch_lasx_xvst LASX256:$xd, GPR:$rj, timm:$imm),2502 (XVST LASX256:$xd, GPR:$rj, (to_valid_timm timm:$imm))>;2503def : Pat<(int_loongarch_lasx_xvstx LASX256:$xd, GPR:$rj, GPR:$rk),2504 (XVSTX LASX256:$xd, GPR:$rj, GPR:$rk)>;2505 2506def : Pat<(int_loongarch_lasx_xvstelm_b v32i8:$xd, GPR:$rj, timm:$imm, timm:$idx),2507 (XVSTELM_B v32i8:$xd, GPR:$rj, (to_valid_timm timm:$imm),2508 (to_valid_timm timm:$idx))>;2509def : Pat<(int_loongarch_lasx_xvstelm_h v16i16:$xd, GPR:$rj, timm:$imm, timm:$idx),2510 (XVSTELM_H v16i16:$xd, GPR:$rj, (to_valid_timm timm:$imm),2511 (to_valid_timm timm:$idx))>;2512def : Pat<(int_loongarch_lasx_xvstelm_w v8i32:$xd, GPR:$rj, timm:$imm, timm:$idx),2513 (XVSTELM_W v8i32:$xd, GPR:$rj, (to_valid_timm timm:$imm),2514 (to_valid_timm timm:$idx))>;2515def : Pat<(int_loongarch_lasx_xvstelm_d v4i64:$xd, GPR:$rj, timm:$imm, timm:$idx),2516 (XVSTELM_D v4i64:$xd, GPR:$rj, (to_valid_timm timm:$imm),2517 (to_valid_timm timm:$idx))>;2518 2519} // Predicates = [HasExtLASX]2520