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1//=- LoongArchBaseInfo.h - Top level definitions for LoongArch MC -*- C++ -*-=//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file contains small standalone enum definitions and helper function10// definitions for the LoongArch target useful for the compiler back-end and the11// MC libraries.12//13//===----------------------------------------------------------------------===//14#ifndef LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHBASEINFO_H15#define LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHBASEINFO_H16 17#include "MCTargetDesc/LoongArchMCTargetDesc.h"18#include "llvm/ADT/StringRef.h"19#include "llvm/ADT/StringSwitch.h"20#include "llvm/CodeGen/MachineOperand.h"21#include "llvm/MC/MCInstrDesc.h"22#include "llvm/TargetParser/SubtargetFeature.h"23 24namespace llvm {25 26// This namespace holds all of the target specific flags that instruction info27// tracks.28namespace LoongArchII {29enum {30 MO_None,31 MO_CALL,32 MO_CALL_PLT,33 MO_PCREL_HI,34 MO_PCREL_LO,35 MO_PCREL64_LO,36 MO_PCREL64_HI,37 MO_GOT_PC_HI,38 MO_GOT_PC_LO,39 MO_GOT_PC64_LO,40 MO_GOT_PC64_HI,41 MO_LE_HI,42 MO_LE_LO,43 MO_LE64_LO,44 MO_LE64_HI,45 MO_IE_PC_HI,46 MO_IE_PC_LO,47 MO_IE_PC64_LO,48 MO_IE_PC64_HI,49 MO_LD_PC_HI,50 MO_GD_PC_HI,51 MO_CALL36,52 MO_DESC_PC_HI,53 MO_DESC_PC_LO,54 MO_DESC64_PC_HI,55 MO_DESC64_PC_LO,56 MO_DESC_LD,57 MO_DESC_CALL,58 MO_LE_HI_R,59 MO_LE_ADD_R,60 MO_LE_LO_R,61 // TODO: Add more flags.62 63 // Used to differentiate between target-specific "direct" flags and "bitmask"64 // flags. A machine operand can only have one "direct" flag, but can have65 // multiple "bitmask" flags.66 MO_DIRECT_FLAG_MASK = 0x3f,67 68 MO_RELAX = 0x4069};70 71// Given a MachineOperand that may carry out "bitmask" flags, such as MO_RELAX,72// return LoongArch target-specific "direct" flags.73static inline unsigned getDirectFlags(const MachineOperand &MO) {74 return MO.getTargetFlags() & MO_DIRECT_FLAG_MASK;75}76 77// Add MO_RELAX "bitmask" flag when FeatureRelax is enabled.78static inline unsigned encodeFlags(unsigned Flags, bool Relax) {79 return Flags | (Relax ? MO_RELAX : 0);80}81 82// \returns true if the given MachineOperand has MO_RELAX "bitmask" flag.83static inline bool hasRelaxFlag(const MachineOperand &MO) {84 return MO.getTargetFlags() & MO_RELAX;85}86 87// Target-specific flags of LAInst.88// All definitions must match LoongArchInstrFormats.td.89enum {90 // Whether the instruction's rd is normally required to differ from rj and91 // rk, in the way the 3-register atomic memory operations behave92 // (Section 2.2.7.1 and 2.2.7.2, LoongArch Reference Manual Volume 1 v1.10;93 // while Section 2.2.7.3 lacked similar description for the AMCAS94 // instructions, at least the INE exception is still signaled on Loongson95 // 3A6000 when its rd == rj).96 //97 // Used for generating diagnostics for assembler input that violate the98 // constraint. As described on the manual, the covered instructions require99 // rd != rj && rd != rk to work as intended.100 IsSubjectToAMORdConstraintShift = 0,101 IsSubjectToAMORdConstraintMask = 1 << IsSubjectToAMORdConstraintShift,102 103 // Whether the instruction belongs to the AMCAS family.104 IsAMCASShift = IsSubjectToAMORdConstraintShift + 1,105 IsAMCASMask = 1 << IsAMCASShift,106};107 108/// \returns true if this instruction's rd is normally required to differ109/// from rj and rk, in the way 3-register atomic memory operations behave.110static inline bool isSubjectToAMORdConstraint(uint64_t TSFlags) {111 return TSFlags & IsSubjectToAMORdConstraintMask;112}113 114/// \returns true if this instruction belongs to the AMCAS family.115static inline bool isAMCAS(uint64_t TSFlags) { return TSFlags & IsAMCASMask; }116} // end namespace LoongArchII117 118namespace LoongArchABI {119enum ABI {120 ABI_ILP32S,121 ABI_ILP32F,122 ABI_ILP32D,123 ABI_LP64S,124 ABI_LP64F,125 ABI_LP64D,126 ABI_Unknown127};128 129ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,130 StringRef ABIName);131ABI getTargetABI(StringRef ABIName);132 133// Returns the register used to hold the stack pointer after realignment.134MCRegister getBPReg();135} // end namespace LoongArchABI136 137} // end namespace llvm138 139#endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHBASEINFO_H140