100 lines · cpp
1//===-- M68kRegisterBankInfo.cpp --------------------------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8/// \file9/// This file implements the targeting of the RegisterBankInfo class for M68k.10/// \todo This should be generated by TableGen.11//===----------------------------------------------------------------------===//12 13#include "M68kRegisterBankInfo.h"14#include "M68kInstrInfo.h" // For the register classes15#include "M68kSubtarget.h"16#include "llvm/CodeGen/MachineRegisterInfo.h"17#include "llvm/CodeGen/RegisterBank.h"18#include "llvm/CodeGen/RegisterBankInfo.h"19#include "llvm/CodeGen/TargetRegisterInfo.h"20 21#define GET_TARGET_REGBANK_IMPL22#include "M68kGenRegisterBank.inc"23 24using namespace llvm;25 26// FIXME: TableGen this.27// If it grows too much and TableGen still isn't ready to do the job, extract it28// into an M68kGenRegisterBankInfo.def (similar to AArch64).29namespace llvm {30namespace M68k {31enum PartialMappingIdx {32 PMI_GPR,33 PMI_Min = PMI_GPR,34};35 36const RegisterBankInfo::PartialMapping PartMappings[]{37 // GPR Partial Mapping38 {0, 32, GPRRegBank},39};40 41enum ValueMappingIdx {42 InvalidIdx = 0,43 GPR3OpsIdx = 1,44};45 46const RegisterBankInfo::ValueMapping ValueMappings[] = {47 // invalid48 {nullptr, 0},49 // 3 operands in GPRs50 {&PartMappings[PMI_GPR - PMI_Min], 1},51 {&PartMappings[PMI_GPR - PMI_Min], 1},52 {&PartMappings[PMI_GPR - PMI_Min], 1},53 54};55} // end namespace M68k56} // end namespace llvm57 58M68kRegisterBankInfo::M68kRegisterBankInfo(const TargetRegisterInfo &TRI)59 : M68kGenRegisterBankInfo() {}60 61const RegisterBankInfo::InstructionMapping &62M68kRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {63 auto Opc = MI.getOpcode();64 65 if (!isPreISelGenericOpcode(Opc)) {66 const InstructionMapping &Mapping = getInstrMappingImpl(MI);67 if (Mapping.isValid())68 return Mapping;69 }70 71 using namespace TargetOpcode;72 73 unsigned NumOperands = MI.getNumOperands();74 const ValueMapping *OperandsMapping = &M68k::ValueMappings[M68k::GPR3OpsIdx];75 76 switch (Opc) {77 case G_ADD:78 case G_SUB:79 case G_MUL:80 case G_SDIV:81 case G_UDIV:82 case G_LOAD:83 case G_STORE: {84 OperandsMapping = &M68k::ValueMappings[M68k::GPR3OpsIdx];85 break;86 }87 88 case G_CONSTANT:89 case G_FRAME_INDEX:90 OperandsMapping =91 getOperandsMapping({&M68k::ValueMappings[M68k::GPR3OpsIdx], nullptr});92 break;93 default:94 return getInvalidInstructionMapping();95 }96 97 return getInstructionMapping(DefaultMappingID, /*Cost=*/1, OperandsMapping,98 NumOperands);99}100