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1//===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9//===----------------------------------------------------------------------===//10// Describe MSP430 instructions format here11//12 13class SourceMode<bits<2> val> {14 bits<2> Value = val;15}16 17def SrcReg : SourceMode<0>; // r18def SrcMem : SourceMode<1>; // m19def SrcIndReg : SourceMode<2>; // n20def SrcPostInc : SourceMode<3>; // p21def SrcImm : SourceMode<3>; // i22// SrcCGImm : SourceMode< >; // c23 24class DestMode<bit val> {25 bit Value = val;26}27 28def DstReg : DestMode<0>; // r29def DstMem : DestMode<1>; // m30 31// Generic MSP430 Format32class MSP430Inst<dag outs, dag ins, int size, string asmstr> : Instruction {33 field bits<48> Inst;34 35 let Namespace = "MSP430";36 37 dag OutOperandList = outs;38 dag InOperandList = ins;39 40 let AsmString = asmstr;41 let Size = size;42}43 44// MSP430 Double Operand (Format I) Instructions45class IForm<bits<4> opcode, DestMode ad, bit bw, SourceMode as, int size,46 dag outs, dag ins, string asmstr, list<dag> pattern>47 : MSP430Inst<outs, ins, size, asmstr> {48 let Pattern = pattern;49 50 bits<4> rs;51 bits<4> rd;52 53 let Inst{15-12} = opcode;54 let Inst{11-8} = rs;55 let Inst{7} = ad.Value;56 let Inst{6} = bw;57 let Inst{5-4} = as.Value;58 let Inst{3-0} = rd;59}60 61// 8 bit IForm instructions62class IForm8<bits<4> opcode, DestMode dest, SourceMode src, int size,63 dag outs, dag ins, string asmstr, list<dag> pattern>64 : IForm<opcode, dest, 1, src, size, outs, ins, asmstr, pattern>;65 66class I8rr<bits<4> opcode,67 dag outs, dag ins, string asmstr, list<dag> pattern>68 : IForm8<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {69 let DecoderNamespace = "Alpha";70}71 72class I8ri<bits<4> opcode,73 dag outs, dag ins, string asmstr, list<dag> pattern>74 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {75 let DecoderNamespace = "Gamma";76 bits<16> imm;77 let Inst{31-16} = imm;78 let rs = 0b0000;79}80 81class I8rc<bits<4> opcode,82 dag outs, dag ins, string asmstr, list<dag> pattern>83 : MSP430Inst<outs, ins, 2, asmstr> {84 let DecoderNamespace = "Beta";85 let Pattern = pattern;86 87 bits<6> imm;88 bits<4> rd;89 90 let Inst{15-12} = opcode;91 let Inst{11-8} = imm{3-0};92 let Inst{7} = DstReg.Value;93 let Inst{6} = 1;94 let Inst{5-4} = imm{5-4};95 let Inst{3-0} = rd;96}97 98class I8rm<bits<4> opcode,99 dag outs, dag ins, string asmstr, list<dag> pattern>100 : IForm8<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {101 let DecoderNamespace = "Gamma";102 bits<20> src;103 let rs = src{3-0};104 let Inst{31-16} = src{19-4};105}106 107class I8rn<bits<4> opcode,108 dag outs, dag ins, string asmstr, list<dag> pattern>109 : IForm8<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {110 let DecoderNamespace = "Delta";111}112 113class I8rp<bits<4> opcode,114 dag outs, dag ins, string asmstr, list<dag> pattern>115 : IForm8<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {116 let DecoderNamespace = "Delta";117}118 119class I8mr<bits<4> opcode,120 dag outs, dag ins, string asmstr, list<dag> pattern>121 : IForm8<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {122 let DecoderNamespace = "Alpha";123 bits<20> dst;124 let rd = dst{3-0};125 let Inst{31-16} = dst{19-4};126}127 128class I8mi<bits<4> opcode,129 dag outs, dag ins, string asmstr, list<dag> pattern>130 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {131 let DecoderNamespace = "Gamma";132 bits<16> imm;133 bits<20> dst;134 let rs = 0b0000;135 let Inst{31-16} = imm;136 let rd = dst{3-0};137 let Inst{47-32} = dst{19-4};138}139 140class I8mc<bits<4> opcode,141 dag outs, dag ins, string asmstr, list<dag> pattern>142 : MSP430Inst<outs, ins, 4, asmstr> {143 let DecoderNamespace = "Beta";144 let Pattern = pattern;145 146 bits<6> imm;147 bits<20> dst;148 149 let Inst{31-16} = dst{19-4};150 let Inst{15-12} = opcode;151 let Inst{11-8} = imm{3-0};152 let Inst{7} = DstMem.Value;153 let Inst{6} = 1;154 let Inst{5-4} = imm{5-4};155 let Inst{3-0} = dst{3-0};156}157 158class I8mm<bits<4> opcode,159 dag outs, dag ins, string asmstr, list<dag> pattern>160 : IForm8<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {161 let DecoderNamespace = "Gamma";162 bits<20> src;163 bits<20> dst;164 let rs = src{3-0};165 let Inst{31-16} = src{19-4};166 let rd = dst{3-0};167 let Inst{47-32} = dst{19-4};168}169 170class I8mn<bits<4> opcode,171 dag outs, dag ins, string asmstr, list<dag> pattern>172 : IForm8<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {173 let DecoderNamespace = "Delta";174 bits<20> dst;175 let rd = dst{3-0};176 let Inst{31-16} = dst{19-4};177}178 179class I8mp<bits<4> opcode,180 dag outs, dag ins, string asmstr, list<dag> pattern>181 : IForm8<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {182 let DecoderNamespace = "Delta";183 bits<20> dst;184 let rd = dst{3-0};185 let Inst{31-16} = dst{19-4};186}187 188// 16 bit IForm instructions189class IForm16<bits<4> opcode, DestMode dest, SourceMode src, int size,190 dag outs, dag ins, string asmstr, list<dag> pattern>191 : IForm<opcode, dest, 0, src, size, outs, ins, asmstr, pattern>;192 193class I16rr<bits<4> opcode,194 dag outs, dag ins, string asmstr, list<dag> pattern>195 : IForm16<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {196 let DecoderNamespace = "Alpha";197}198 199class I16ri<bits<4> opcode,200 dag outs, dag ins, string asmstr, list<dag> pattern>201 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {202 let DecoderNamespace = "Gamma";203 bits<16> imm;204 let Inst{31-16} = imm;205 let rs = 0b0000;206}207 208class I16rc<bits<4> opcode,209 dag outs, dag ins, string asmstr, list<dag> pattern>210 : MSP430Inst<outs, ins, 2, asmstr> {211 let DecoderNamespace = "Beta";212 let Pattern = pattern;213 214 bits<6> imm;215 bits<4> rd;216 217 let Inst{15-12} = opcode;218 let Inst{11-8} = imm{3-0};219 let Inst{7} = DstReg.Value;220 let Inst{6} = 0;221 let Inst{5-4} = imm{5-4};222 let Inst{3-0} = rd;223}224 225class I16rm<bits<4> opcode,226 dag outs, dag ins, string asmstr, list<dag> pattern>227 : IForm16<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {228 let DecoderNamespace = "Gamma";229 bits<20> src;230 let rs = src{3-0};231 let Inst{31-16} = src{19-4};232}233 234class I16rn<bits<4> opcode,235 dag outs, dag ins, string asmstr, list<dag> pattern>236 : IForm16<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {237 let DecoderNamespace = "Delta";238}239 240class I16rp<bits<4> opcode,241 dag outs, dag ins, string asmstr, list<dag> pattern>242 : IForm16<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {243 let DecoderNamespace = "Delta";244}245 246class I16mr<bits<4> opcode,247 dag outs, dag ins, string asmstr, list<dag> pattern>248 : IForm16<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {249 let DecoderNamespace = "Alpha";250 bits<20> dst;251 let rd = dst{3-0};252 let Inst{31-16} = dst{19-4};253}254 255class I16mi<bits<4> opcode,256 dag outs, dag ins, string asmstr, list<dag> pattern>257 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {258 let DecoderNamespace = "Gamma";259 bits<16> imm;260 bits<20> dst;261 let Inst{31-16} = imm;262 let rs = 0b0000;263 let rd = dst{3-0};264 let Inst{47-32} = dst{19-4};265}266 267class I16mc<bits<4> opcode,268 dag outs, dag ins, string asmstr, list<dag> pattern>269 : MSP430Inst<outs, ins, 4, asmstr> {270 let DecoderNamespace = "Beta";271 let Pattern = pattern;272 273 bits<6> imm;274 bits<20> dst;275 276 let Inst{31-16} = dst{19-4};277 let Inst{15-12} = opcode;278 let Inst{11-8} = imm{3-0};279 let Inst{7} = DstMem.Value;280 let Inst{6} = 0;281 let Inst{5-4} = imm{5-4};282 let Inst{3-0} = dst{3-0};283}284 285class I16mm<bits<4> opcode,286 dag outs, dag ins, string asmstr, list<dag> pattern>287 : IForm16<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {288 let DecoderNamespace = "Gamma";289 bits<20> src;290 bits<20> dst;291 let rs = src{3-0};292 let Inst{31-16} = src{19-4};293 let rd = dst{3-0};294 let Inst{47-32} = dst{19-4};295}296 297class I16mn<bits<4> opcode,298 dag outs, dag ins, string asmstr, list<dag> pattern>299 : IForm16<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {300 let DecoderNamespace = "Delta";301 bits<20> dst;302 let rd = dst{3-0};303 let Inst{31-16} = dst{19-4};304}305 306class I16mp<bits<4> opcode,307 dag outs, dag ins, string asmstr, list<dag> pattern>308 : IForm16<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {309 let DecoderNamespace = "Delta";310 bits<20> dst;311 let rd = dst{3-0};312 let Inst{31-16} = dst{19-4};313}314 315// MSP430 Single Operand (Format II) Instructions316class IIForm<bits<3> opcode, bit bw, SourceMode as, int size,317 dag outs, dag ins, string asmstr, list<dag> pattern>318 : MSP430Inst<outs, ins, size, asmstr> {319 let Pattern = pattern;320 321 bits<4> rs;322 323 let Inst{15-10} = 0b000100;324 let Inst{9-7} = opcode;325 let Inst{6} = bw;326 let Inst{5-4} = as.Value;327 let Inst{3-0} = rs;328}329 330// 8 bit IIForm instructions331class IIForm8<bits<3> opcode, SourceMode src, int size,332 dag outs, dag ins, string asmstr, list<dag> pattern>333 : IIForm<opcode, 1, src, size, outs, ins, asmstr, pattern>;334 335class II8r<bits<3> opcode,336 dag outs, dag ins, string asmstr, list<dag> pattern>337 : IIForm8<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;338 339class II8m<bits<3> opcode,340 dag outs, dag ins, string asmstr, list<dag> pattern>341 : IIForm8<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {342 bits<20> src;343 let rs = src{3-0};344 let Inst{31-16} = src{19-4};345}346 347class II8i<bits<3> opcode,348 dag outs, dag ins, string asmstr, list<dag> pattern>349 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {350 bits<16> imm;351 let rs = 0b0000;352 let Inst{31-16} = imm;353}354 355class II8c<bits<3> opcode,356 dag outs, dag ins, string asmstr, list<dag> pattern>357 : MSP430Inst<outs, ins, 2, asmstr> {358 let Pattern = pattern;359 360 bits<6> imm;361 362 let Inst{15-10} = 0b000100;363 let Inst{9-7} = opcode;364 let Inst{6} = 1;365 let Inst{5-0} = imm;366}367 368class II8n<bits<3> opcode,369 dag outs, dag ins, string asmstr, list<dag> pattern>370 : IIForm8<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;371 372class II8p<bits<3> opcode,373 dag outs, dag ins, string asmstr, list<dag> pattern>374 : IIForm8<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;375 376// 16 bit IIForm instructions377class IIForm16<bits<3> opcode, SourceMode src, int size,378 dag outs, dag ins, string asmstr, list<dag> pattern>379 : IIForm<opcode, 0, src, size, outs, ins, asmstr, pattern>;380 381class II16r<bits<3> opcode,382 dag outs, dag ins, string asmstr, list<dag> pattern>383 : IIForm16<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;384 385class II16m<bits<3> opcode,386 dag outs, dag ins, string asmstr, list<dag> pattern>387 : IIForm16<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {388 bits<20> src;389 let rs = src{3-0};390 let Inst{31-16} = src{19-4};391}392 393class II16i<bits<3> opcode,394 dag outs, dag ins, string asmstr, list<dag> pattern>395 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {396 bits<16> imm;397 let rs = 0b0000;398 let Inst{31-16} = imm;399}400 401class II16c<bits<3> opcode,402 dag outs, dag ins, string asmstr, list<dag> pattern>403 : MSP430Inst<outs, ins, 2, asmstr> {404 let Pattern = pattern;405 406 bits<6> imm;407 408 let Inst{15-10} = 0b000100;409 let Inst{9-7} = opcode;410 let Inst{6} = 0;411 let Inst{5-0} = imm;412}413 414class II16n<bits<3> opcode,415 dag outs, dag ins, string asmstr, list<dag> pattern>416 : IIForm16<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;417 418class II16p<bits<3> opcode,419 dag outs, dag ins, string asmstr, list<dag> pattern>420 : IIForm16<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;421 422// MSP430 Conditional Jumps Instructions423class CJForm<dag outs, dag ins, string asmstr, list<dag> pattern>424 : MSP430Inst<outs, ins, 2, asmstr> {425 let Pattern = pattern;426 427 bits<3> cond;428 bits<10> dst;429 430 let Inst{15-13} = 0b001;431 let Inst{12-10} = cond;432 let Inst{9-0} = dst;433}434 435// Pseudo instructions436class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>437 : MSP430Inst<outs, ins, 0, asmstr> {438 let Pattern = pattern;439}440