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1//===-- MipsBaseInfo.h - Top level definitions for MIPS MC ------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file contains small standalone helper functions and enum definitions for10// the Mips target useful for the compiler back-end and the MC libraries.11//12//===----------------------------------------------------------------------===//13#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSBASEINFO_H14#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSBASEINFO_H15 16#include "MipsFixupKinds.h"17#include "MipsMCTargetDesc.h"18#include "llvm/MC/MCExpr.h"19#include "llvm/MC/MCInstrDesc.h"20#include "llvm/Support/DataTypes.h"21#include "llvm/Support/ErrorHandling.h"22 23namespace llvm {24 25/// MipsII - This namespace holds all of the target specific flags that26/// instruction info tracks.27///28namespace MipsII {29/// Target Operand Flag enum.30enum TOF {31 //===------------------------------------------------------------------===//32 // Mips Specific MachineOperand flags.33 34 MO_NO_FLAG,35 36 // Represents the offset into the global offset table at which37 // the address the relocation entry symbol resides during execution.38 MO_GOT,39 40 // Represents the offset into the global offset table at41 // which the address of a call site relocation entry symbol resides42 // during execution. This is different from the above since this flag43 // can only be present in call instructions.44 MO_GOT_CALL,45 46 // Represents the offset from the current gp value to be used47 // for the relocatable object file being produced.48 MO_GPREL,49 50 // Represents the hi or low part of an absolute symbol51 // address.52 MO_ABS_HI,53 MO_ABS_LO,54 55 // Represents the offset into the global offset table at which56 // the module ID and TSL block offset reside during execution (General57 // Dynamic TLS).58 MO_TLSGD,59 60 // Represents the offset into the global offset table at which61 // the module ID and TSL block offset reside during execution (Local62 // Dynamic TLS).63 MO_TLSLDM,64 MO_DTPREL_HI,65 MO_DTPREL_LO,66 67 // Represents the offset from the thread pointer (Initial68 // Exec TLS).69 MO_GOTTPREL,70 71 // Represents the hi and low part of the offset from72 // the thread pointer (Local Exec TLS).73 MO_TPREL_HI,74 MO_TPREL_LO,75 76 // N32/64 Flags.77 MO_GPOFF_HI,78 MO_GPOFF_LO,79 MO_GOT_DISP,80 MO_GOT_PAGE,81 MO_GOT_OFST,82 83 // Represents the highest or higher half word of a84 // 64-bit symbol address.85 MO_HIGHER,86 MO_HIGHEST,87 88 // Relocations used for large GOTs.89 MO_GOT_HI16,90 MO_GOT_LO16,91 MO_CALL_HI16,92 MO_CALL_LO16,93 94 // Helper operand used to generate R_MIPS_JALR95 MO_JALR,96 97 // On a symbol operand "FOO", this indicates that the98 // reference is actually to the "__imp_FOO" symbol. This is used for99 // dllimport linkage on windows.100 MO_DLLIMPORT = 0x20,101};102 103enum {104 //===------------------------------------------------------------------===//105 // Instruction encodings. These are the standard/most common forms for106 // Mips instructions.107 //108 109 // This represents an instruction that is a pseudo instruction110 // or one that has not been implemented yet. It is illegal to code generate111 // it, but tolerated for intermediate implementation stages.112 Pseudo = 0,113 114 // This form is for instructions of the format R.115 FrmR = 1,116 // This form is for instructions of the format I.117 FrmI = 2,118 // This form is for instructions of the format J.119 FrmJ = 3,120 // This form is for instructions of the format FR.121 FrmFR = 4,122 // This form is for instructions of the format FI.123 FrmFI = 5,124 // This form is for instructions that have no specific format.125 FrmOther = 6,126 127 FormMask = 15,128 // Instruction is a Control Transfer Instruction.129 IsCTI = 1 << 4,130 // Instruction has a forbidden slot.131 HasForbiddenSlot = 1 << 5,132 // Instruction uses an $fcc<x> register.133 HasFCCRegOperand = 1 << 6134 135};136 137enum OperandType : unsigned {138 OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,139 OPERAND_MEM_SIMM9 = OPERAND_FIRST_MIPS_MEM_IMM,140 OPERAND_LAST_MIPS_MEM_IMM = OPERAND_MEM_SIMM9141};142 143static inline unsigned getFormat(uint64_t TSFlags) {144 return TSFlags & FormMask;145}146} // namespace MipsII147 148inline static MCRegister getMSARegFromFReg(MCRegister Reg) {149 if (Reg >= Mips::F0 && Reg <= Mips::F31)150 return Reg - Mips::F0 + Mips::W0;151 else if (Reg >= Mips::D0_64 && Reg <= Mips::D31_64)152 return Reg - Mips::D0_64 + Mips::W0;153 else154 return MCRegister();155}156} // namespace llvm157 158#endif159