302 lines · plain
1//===-- MicroMipsDSPInstrFormats.td - Instruction Formats --*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9class MMDSPInst<string opstr = "">10 : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {11 let ASEPredicate = [HasDSP];12 let EncodingPredicates = [InMicroMips];13 string BaseOpcode = opstr;14 string Arch = "mmdsp";15 let DecoderNamespace = "MicroMips";16}17 18class MMDSPInstAlias<string Asm, dag Result, bit Emit = 0b1>19 : InstAlias<Asm, Result, Emit>, PredicateControl {20 let ASEPredicate = [HasDSP];21 let AdditionalPredicates = [InMicroMips];22}23 24class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {25 bits<5> rd;26 bits<5> rs;27 bits<5> rt;28 29 let Inst{31-26} = 0b000000;30 let Inst{25-21} = rt;31 let Inst{20-16} = rs;32 let Inst{15-11} = rd;33 let Inst{10-0} = op;34}35 36class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {37 bits<5> rt;38 bits<5> rs;39 40 let Inst{31-26} = 0b000000;41 let Inst{25-21} = rt;42 let Inst{20-16} = rs;43 let Inst{15-6} = op;44 let Inst{5-0} = 0b111100;45}46 47class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {48 bits<5> rt;49 bits<5> rs;50 bits<2> ac;51 52 let Inst{31-26} = 0b000000;53 let Inst{25-21} = rt;54 let Inst{20-16} = rs;55 let Inst{15-14} = ac;56 let Inst{13-6} = op;57 let Inst{5-0} = 0b111100;58}59 60class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {61 bits<5> rd;62 bits<5> rs;63 bits<5> rt;64 65 let Inst{31-26} = 0b000000;66 let Inst{25-21} = rt;67 let Inst{20-16} = rs;68 let Inst{15-11} = rd;69 let Inst{10} = 0b0;70 let Inst{9-0} = op;71}72 73class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {74 bits<5> rt;75 bits<5> rs;76 bits<4> sa;77 78 let Inst{31-26} = 0b000000;79 let Inst{25-21} = rt;80 let Inst{20-16} = rs;81 let Inst{15-12} = sa;82 let Inst{11-0} = op;83}84 85class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {86 bits<5> rt;87 bits<5> rs;88 bits<3> sa;89 90 let Inst{31-26} = 0b000000;91 let Inst{25-21} = rt;92 let Inst{20-16} = rs;93 let Inst{15-13} = sa;94 let Inst{12-6} = op;95 let Inst{5-0} = 0b111100;96}97 98class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {99 bits<5> rt;100 bits<5> rs;101 bits<5> sa;102 103 let Inst{31-26} = 0b000000;104 let Inst{25-21} = rt;105 let Inst{20-16} = rs;106 let Inst{15-11} = sa;107 let Inst{10} = 0b0;108 let Inst{9-0} = op;109}110 111class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {112 bits<5> rt;113 bits<5> rs;114 bits<4> sa;115 116 let Inst{31-26} = 0b000000;117 let Inst{25-21} = rt;118 let Inst{20-16} = rs;119 let Inst{15-12} = sa;120 let Inst{11} = 0b0;121 let Inst{10-0} = op;122}123 124class POOL32A_2RSA4OP6_FMT<string opstr, bits<6> op> : MMDSPInst<opstr> {125 bits<5> rt;126 bits<5> rs;127 bits<4> sa;128 129 let Inst{31-26} = 0b000000;130 let Inst{25-21} = rt;131 let Inst{20-16} = rs;132 let Inst{15-12} = sa;133 let Inst{11-6} = op;134 let Inst{5-0} = 0b111100;135}136 137class POOL32A_1RIMM5AC_FMT<string opstr, bits<8> funct> : MMDSPInst<opstr> {138 bits<5> rt;139 bits<5> imm;140 bits<2> ac;141 142 let Inst{31-26} = 0b000000;143 let Inst{25-21} = rt;144 let Inst{20-16} = imm;145 let Inst{15-14} = ac;146 let Inst{13-6} = funct;147 let Inst{5-0} = 0b111100;148}149 150class POOL32A_2RSA5_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {151 bits<5> rt;152 bits<5> rs;153 bits<5> sa;154 155 let Inst{31-26} = 0b000000;156 let Inst{25-21} = rt;157 let Inst{20-16} = rs;158 let Inst{15-11} = sa;159 let Inst{10-0} = op;160}161 162class POOL32A_1RMEMB0_FMT<string opstr, bits<10> funct> : MMDSPInst<opstr> {163 bits<5> index;164 bits<5> base;165 bits<5> rd;166 167 let Inst{31-26} = 0;168 let Inst{25-21} = index;169 let Inst{20-16} = base;170 let Inst{15-11} = rd;171 let Inst{10} = 0b0;172 let Inst{9-0} = funct;173}174 175class POOL32A_1RAC_FMT<string instr_asm, bits<8> funct> : MMDSPInst<instr_asm> {176 bits<5> rs;177 bits<2> ac;178 179 let Inst{31-26} = 0;180 let Inst{25-21} = 0;181 let Inst{20-16} = rs;182 let Inst{15-14} = ac;183 let Inst{13-6} = funct;184 let Inst{5-0} = 0b111100;185}186 187class POOL32A_1RMASK7_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {188 bits<5> rt;189 bits<7> mask;190 191 let Inst{31-26} = 0b000000;192 let Inst{25-21} = rt;193 let Inst{20-14} = mask;194 let Inst{13-6} = op;195 let Inst{5-0} = 0b111100;196}197 198class POOL32A_1RIMM10_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {199 bits<5> rd;200 bits<10> imm;201 202 let Inst{31-26} = 0;203 let Inst{25-16} = imm;204 let Inst{15-11} = rd;205 let Inst{10} = 0;206 let Inst{9-0} = op;207}208 209class POOL32A_1RIMM8_FMT<string opstr, bits<6> op> : MMDSPInst<opstr> {210 bits<5> rt;211 bits<8> imm;212 213 let Inst{31-26} = 0;214 let Inst{25-21} = rt;215 let Inst{20-13} = imm;216 let Inst{12} = 0;217 let Inst{11-6} = op;218 let Inst{5-0} = 0b111100;219}220 221class POOL32A_4B0SHIFT6AC4B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {222 bits<6> shift;223 bits<2> ac;224 225 let Inst{31-26} = 0b000000;226 let Inst{25-22} = 0b0000;227 let Inst{21-16} = shift;228 let Inst{15-14} = ac;229 let Inst{13-10} = 0b0000;230 let Inst{9-0} = op;231}232 233class POOL32A_5B01RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {234 bits<5> rs;235 bits<2> ac;236 237 let Inst{31-26} = 0b000000;238 let Inst{25-21} = 0b00000;239 let Inst{20-16} = rs;240 let Inst{15-14} = ac;241 let Inst{13-6} = op;242 let Inst{5-0} = 0b111100;243}244 245class POOL32I_IMMB0_FMT<string opstr, bits<5> op> : MMDSPInst<opstr> {246 bits<16> offset;247 248 let Inst{31-26} = 0b010000;249 let Inst{25-21} = op;250 let Inst{20-16} = 0;251 let Inst{15-0} = offset;252}253 254class POOL32A_2RBP_FMT<string opstr> : MMDSPInst<opstr> {255 bits<5> rt;256 bits<5> rs;257 bits<2> bp;258 259 let Inst{31-26} = 0;260 let Inst{25-21} = rt;261 let Inst{20-16} = rs;262 let Inst{15-14} = bp;263 let Inst{13-6} = 0b00100010;264 let Inst{5-0} = 0b111100;265}266 267class POOL32A_2RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {268 bits<5> rt;269 bits<5> rs;270 271 let Inst{31-26} = 0;272 let Inst{25-21} = rt;273 let Inst{20-16} = rs;274 let Inst{15-10} = 0;275 let Inst{9-0} = op;276}277 278class POOL32S_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {279 bits<5> rt;280 bits<5> rs;281 bits<5> rd;282 283 let Inst{31-26} = 0b010110;284 let Inst{25-21} = rt;285 let Inst{20-16} = rs;286 let Inst{15-11} = rd;287 let Inst{10} = 0b0;288 let Inst{9-0} = op;289}290 291class POOL32A_2R2B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {292 bits<5> rt;293 bits<5> rs;294 295 let Inst{31-26} = 0;296 let Inst{25-21} = rt;297 let Inst{20-16} = rs;298 let Inst{15-11} = 0;299 let Inst{10} = 0;300 let Inst{9-0} = op;301}302