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1//===-- MicroMipsInstrFormats.td - microMIPS Inst Formats -*- tablegen -*--===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This files describes the formats of the microMIPS instruction set.10//11//===----------------------------------------------------------------------===//12 13//===----------------------------------------------------------------------===//14// MicroMIPS Base Classes15//===----------------------------------------------------------------------===//16 17//18// Base class for MicroMips instructions.19// This class does not depend on the instruction size.20//21class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,22 InstrItinClass itin, Format f> : Instruction,23 PredicateControl {24 let Namespace = "Mips";25 let DecoderNamespace = "MicroMips";26 27 let OutOperandList = outs;28 let InOperandList = ins;29 30 let AsmString = asmstr;31 let Pattern = pattern;32 let Itinerary = itin;33 34 let EncodingPredicates = [InMicroMips];35 36 Format Form = f;37}38 39//40// Base class for MicroMIPS 16-bit instructions.41//42class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,43 InstrItinClass itin, Format f> :44 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>45{46 let Size = 2;47 field bits<16> Inst;48 bits<6> Opcode = 0x0;49}50 51//===----------------------------------------------------------------------===//52// MicroMIPS 16-bit Instruction Formats53//===----------------------------------------------------------------------===//54 55class ARITH_FM_MM16<bit funct> {56 bits<3> rd;57 bits<3> rt;58 bits<3> rs;59 60 bits<16> Inst;61 62 let Inst{15-10} = 0x01;63 let Inst{9-7} = rd;64 let Inst{6-4} = rt;65 let Inst{3-1} = rs;66 let Inst{0} = funct;67}68 69class ANDI_FM_MM16<bits<6> funct> {70 bits<3> rd;71 bits<3> rs;72 bits<4> imm;73 74 bits<16> Inst;75 76 let Inst{15-10} = funct;77 let Inst{9-7} = rd;78 let Inst{6-4} = rs;79 let Inst{3-0} = imm;80}81 82class LOGIC_FM_MM16<bits<4> funct> {83 bits<3> rt;84 bits<3> rs;85 86 bits<16> Inst;87 88 let Inst{15-10} = 0x11;89 let Inst{9-6} = funct;90 let Inst{5-3} = rt;91 let Inst{2-0} = rs;92}93 94class SHIFT_FM_MM16<bits<1> funct> {95 bits<3> rd;96 bits<3> rt;97 bits<3> shamt;98 99 bits<16> Inst;100 101 let Inst{15-10} = 0x09;102 let Inst{9-7} = rd;103 let Inst{6-4} = rt;104 let Inst{3-1} = shamt;105 let Inst{0} = funct;106}107 108class ADDIUR2_FM_MM16 {109 bits<3> rd;110 bits<3> rs;111 bits<3> imm;112 113 bits<16> Inst;114 115 let Inst{15-10} = 0x1b;116 let Inst{9-7} = rd;117 let Inst{6-4} = rs;118 let Inst{3-1} = imm;119 let Inst{0} = 0;120}121 122class LOAD_STORE_FM_MM16<bits<6> op> {123 bits<3> rt;124 bits<7> addr;125 126 bits<16> Inst;127 128 let Inst{15-10} = op;129 let Inst{9-7} = rt;130 let Inst{6-4} = addr{6-4};131 let Inst{3-0} = addr{3-0};132}133 134class LOAD_STORE_SP_FM_MM16<bits<6> op> {135 bits<5> rt;136 bits<5> offset;137 138 bits<16> Inst;139 140 let Inst{15-10} = op;141 let Inst{9-5} = rt;142 let Inst{4-0} = offset;143}144 145class LOAD_GP_FM_MM16<bits<6> op> {146 bits<3> rt;147 bits<7> offset;148 149 bits<16> Inst;150 151 let Inst{15-10} = op;152 let Inst{9-7} = rt;153 let Inst{6-0} = offset;154}155 156class ADDIUS5_FM_MM16 {157 bits<5> rd;158 bits<4> imm;159 160 bits<16> Inst;161 162 let Inst{15-10} = 0x13;163 let Inst{9-5} = rd;164 let Inst{4-1} = imm;165 let Inst{0} = 0;166}167 168class ADDIUSP_FM_MM16 {169 bits<9> imm;170 171 bits<16> Inst;172 173 let Inst{15-10} = 0x13;174 let Inst{9-1} = imm;175 let Inst{0} = 1;176}177 178class MOVE_FM_MM16<bits<6> funct> {179 bits<5> rs;180 bits<5> rd;181 182 bits<16> Inst;183 184 let Inst{15-10} = funct;185 let Inst{9-5} = rd;186 let Inst{4-0} = rs;187}188 189class LI_FM_MM16 {190 bits<3> rd;191 bits<7> imm;192 193 bits<16> Inst;194 195 let Inst{15-10} = 0x3b;196 let Inst{9-7} = rd;197 let Inst{6-0} = imm;198}199 200class JALR_FM_MM16<bits<5> op> {201 bits<5> rs;202 203 bits<16> Inst;204 205 let Inst{15-10} = 0x11;206 let Inst{9-5} = op;207 let Inst{4-0} = rs;208}209 210class MFHILO_FM_MM16<bits<5> funct> {211 bits<5> rd;212 213 bits<16> Inst;214 215 let Inst{15-10} = 0x11;216 let Inst{9-5} = funct;217 let Inst{4-0} = rd;218}219 220class JRADDIUSP_FM_MM16<bits<5> op> {221 bits<5> rs;222 bits<5> imm;223 224 bits<16> Inst;225 226 let Inst{15-10} = 0x11;227 let Inst{9-5} = op;228 let Inst{4-0} = imm;229}230 231class ADDIUR1SP_FM_MM16 {232 bits<3> rd;233 bits<6> imm;234 235 bits<16> Inst;236 237 let Inst{15-10} = 0x1b;238 let Inst{9-7} = rd;239 let Inst{6-1} = imm;240 let Inst{0} = 1;241}242 243class BRKSDBBP16_FM_MM<bits<6> op> {244 bits<4> code_;245 bits<16> Inst;246 247 let Inst{15-10} = 0x11;248 let Inst{9-4} = op;249 let Inst{3-0} = code_;250}251 252class BEQNEZ_FM_MM16<bits<6> op> {253 bits<3> rs;254 bits<7> offset;255 256 bits<16> Inst;257 258 let Inst{15-10} = op;259 let Inst{9-7} = rs;260 let Inst{6-0} = offset;261}262 263class B16_FM {264 bits<10> offset;265 266 bits<16> Inst;267 268 let Inst{15-10} = 0x33;269 let Inst{9-0} = offset;270}271 272class MOVEP_FM_MM16 {273 bits<3> rt;274 bits<3> rs;275 276 bits<16> Inst;277 278 let Inst{15-10} = 0x21;279 // bits 7-9 are populated by MipsMCCodeEmitter::encodeInstruction, with a280 // special encoding of both rd1 and rd2.281 let Inst{9-7} = ?;282 let Inst{6-4} = rt;283 let Inst{3-1} = rs;284 let Inst{0} = 0;285}286 287//===----------------------------------------------------------------------===//288// MicroMIPS 32-bit Instruction Formats289//===----------------------------------------------------------------------===//290 291class MMArch {292 string Arch = "micromips";293}294 295class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {296 bits<5> rt;297 bits<5> rs;298 bits<5> rd;299 300 bits<32> Inst;301 302 let Inst{31-26} = op;303 let Inst{25-21} = rt;304 let Inst{20-16} = rs;305 let Inst{15-11} = rd;306 let Inst{10} = 0;307 let Inst{9-0} = funct;308}309 310class ADDI_FM_MM<bits<6> op> : MMArch {311 bits<5> rs;312 bits<5> rt;313 bits<16> imm16;314 315 bits<32> Inst;316 317 let Inst{31-26} = op;318 let Inst{25-21} = rt;319 let Inst{20-16} = rs;320 let Inst{15-0} = imm16;321}322 323class SLTI_FM_MM<bits<6> op> : MMArch {324 bits<5> rt;325 bits<5> rs;326 bits<16> imm16;327 328 bits<32> Inst;329 330 let Inst{31-26} = op;331 let Inst{25-21} = rt;332 let Inst{20-16} = rs;333 let Inst{15-0} = imm16;334}335 336class LUI_FM_MM : MMArch {337 bits<5> rt;338 bits<16> imm16;339 340 bits<32> Inst;341 342 let Inst{31-26} = 0x10;343 let Inst{25-21} = 0xd;344 let Inst{20-16} = rt;345 let Inst{15-0} = imm16;346}347 348class MULT_FM_MM<bits<10> funct> : MMArch {349 bits<5> rs;350 bits<5> rt;351 352 bits<32> Inst;353 354 let Inst{31-26} = 0x00;355 let Inst{25-21} = rt;356 let Inst{20-16} = rs;357 let Inst{15-6} = funct;358 let Inst{5-0} = 0x3c;359}360 361class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {362 bits<5> rd;363 bits<5> rt;364 bits<5> shamt;365 366 bits<32> Inst;367 368 let Inst{31-26} = 0;369 let Inst{25-21} = rd;370 let Inst{20-16} = rt;371 let Inst{15-11} = shamt;372 let Inst{10} = rotate;373 let Inst{9-0} = funct;374}375 376class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {377 bits<5> rd;378 bits<5> rt;379 bits<5> rs;380 381 bits<32> Inst;382 383 let Inst{31-26} = 0;384 let Inst{25-21} = rt;385 let Inst{20-16} = rs;386 let Inst{15-11} = rd;387 let Inst{10} = rotate;388 let Inst{9-0} = funct;389}390 391class LW_FM_MM<bits<6> op> : MMArch {392 bits<5> rt;393 bits<21> addr;394 bits<5> base = addr{20-16};395 bits<16> offset = addr{15-0};396 397 bits<32> Inst;398 399 let Inst{31-26} = op;400 let Inst{25-21} = rt;401 let Inst{20-16} = base;402 let Inst{15-0} = offset;403}404 405class POOL32C_LHUE_FM_MM<bits<6> op, bits<4> fmt, bits<3> funct> : MMArch {406 bits<5> rt;407 bits<21> addr;408 bits<5> base = addr{20-16};409 bits<9> offset = addr{8-0};410 411 bits<32> Inst;412 413 let Inst{31-26} = op;414 let Inst{25-21} = rt;415 let Inst{20-16} = base;416 let Inst{15-12} = fmt;417 let Inst{11-9} = funct;418 let Inst{8-0} = offset;419}420 421class LWL_FM_MM<bits<4> funct> : MMArch {422 bits<5> rt;423 bits<21> addr;424 425 bits<32> Inst;426 427 let Inst{31-26} = 0x18;428 let Inst{25-21} = rt;429 let Inst{20-16} = addr{20-16};430 let Inst{15-12} = funct;431 let Inst{11-0} = addr{11-0};432}433 434class POOL32C_STEVA_LDEVA_FM_MM<bits<4> type, bits<3> funct> : MMArch {435 bits<5> rt;436 bits<21> addr;437 bits<5> base = addr{20-16};438 bits<9> offset = addr{8-0};439 440 bits<32> Inst;441 442 let Inst{31-26} = 0x18;443 let Inst{25-21} = rt;444 let Inst{20-16} = base;445 let Inst{15-12} = type;446 let Inst{11-9} = funct;447 let Inst{8-0} = offset;448}449 450class CMov_F_I_FM_MM<bits<7> func> : MMArch {451 bits<5> rd;452 bits<5> rs;453 bits<3> fcc;454 455 bits<32> Inst;456 457 let Inst{31-26} = 0x15;458 let Inst{25-21} = rd;459 let Inst{20-16} = rs;460 let Inst{15-13} = fcc;461 let Inst{12-6} = func;462 let Inst{5-0} = 0x3b;463}464 465class MTLO_FM_MM<bits<10> funct> : MMArch {466 bits<5> rs;467 468 bits<32> Inst;469 470 let Inst{31-26} = 0x00;471 let Inst{25-21} = 0x00;472 let Inst{20-16} = rs;473 let Inst{15-6} = funct;474 let Inst{5-0} = 0x3c;475}476 477class MFLO_FM_MM<bits<10> funct> : MMArch {478 bits<5> rd;479 480 bits<32> Inst;481 482 let Inst{31-26} = 0x00;483 let Inst{25-21} = 0x00;484 let Inst{20-16} = rd;485 let Inst{15-6} = funct;486 let Inst{5-0} = 0x3c;487}488 489class CLO_FM_MM<bits<10> funct> : MMArch {490 bits<5> rd;491 bits<5> rs;492 493 bits<32> Inst;494 495 let Inst{31-26} = 0x00;496 let Inst{25-21} = rd;497 let Inst{20-16} = rs;498 let Inst{15-6} = funct;499 let Inst{5-0} = 0x3c;500}501 502class SEB_FM_MM<bits<10> funct> : MMArch {503 bits<5> rd;504 bits<5> rt;505 506 bits<32> Inst;507 508 let Inst{31-26} = 0x00;509 let Inst{25-21} = rd;510 let Inst{20-16} = rt;511 let Inst{15-6} = funct;512 let Inst{5-0} = 0x3c;513}514 515class EXT_FM_MM<bits<6> funct> : MMArch {516 bits<5> rt;517 bits<5> rs;518 bits<5> pos;519 bits<5> size;520 521 bits<32> Inst;522 523 let Inst{31-26} = 0x00;524 let Inst{25-21} = rt;525 let Inst{20-16} = rs;526 let Inst{15-11} = size;527 let Inst{10-6} = pos;528 let Inst{5-0} = funct;529}530 531class J_FM_MM<bits<6> op> : MMArch {532 bits<26> target;533 534 bits<32> Inst;535 536 let Inst{31-26} = op;537 let Inst{25-0} = target;538}539 540class JR_FM_MM<bits<8> funct> : MMArch {541 bits<5> rs;542 543 bits<32> Inst;544 545 let Inst{31-21} = 0x00;546 let Inst{20-16} = rs;547 let Inst{15-14} = 0x0;548 let Inst{13-6} = funct;549 let Inst{5-0} = 0x3c;550}551 552class JALR_FM_MM<bits<10> funct> {553 bits<5> rs;554 bits<5> rd;555 556 bits<32> Inst;557 558 let Inst{31-26} = 0x00;559 let Inst{25-21} = rd;560 let Inst{20-16} = rs;561 let Inst{15-6} = funct;562 let Inst{5-0} = 0x3c;563}564 565class BEQ_FM_MM<bits<6> op> : MMArch {566 bits<5> rs;567 bits<5> rt;568 bits<16> offset;569 570 bits<32> Inst;571 572 let Inst{31-26} = op;573 let Inst{25-21} = rt;574 let Inst{20-16} = rs;575 let Inst{15-0} = offset;576}577 578class BGEZ_FM_MM<bits<5> funct> : MMArch {579 bits<5> rs;580 bits<16> offset;581 582 bits<32> Inst;583 584 let Inst{31-26} = 0x10;585 let Inst{25-21} = funct;586 let Inst{20-16} = rs;587 let Inst{15-0} = offset;588}589 590class BGEZAL_FM_MM<bits<5> funct> : MMArch {591 bits<5> rs;592 bits<16> offset;593 594 bits<32> Inst;595 596 let Inst{31-26} = 0x10;597 let Inst{25-21} = funct;598 let Inst{20-16} = rs;599 let Inst{15-0} = offset;600}601 602class SYNC_FM_MM : MMArch {603 bits<5> stype;604 605 bits<32> Inst;606 607 let Inst{31-26} = 0x00;608 let Inst{25-21} = 0x0;609 let Inst{20-16} = stype;610 let Inst{15-6} = 0x1ad;611 let Inst{5-0} = 0x3c;612}613 614class SYNCI_FM_MM : MMArch {615 bits<21> addr;616 bits<5> rs = addr{20-16};617 bits<16> offset = addr{15-0};618 bits<32> Inst;619 620 let Inst{31-26} = 0b010000;621 let Inst{25-21} = 0b10000;622 let Inst{20-16} = rs;623 let Inst{15-0} = offset;624}625 626class BRK_FM_MM : MMArch {627 bits<10> code_1;628 bits<10> code_2;629 bits<32> Inst;630 let Inst{31-26} = 0x0;631 let Inst{25-16} = code_1;632 let Inst{15-6} = code_2;633 let Inst{5-0} = 0x07;634}635 636class SYS_FM_MM : MMArch {637 bits<10> code_;638 bits<32> Inst;639 let Inst{31-26} = 0x0;640 let Inst{25-16} = code_;641 let Inst{15-6} = 0x22d;642 let Inst{5-0} = 0x3c;643}644 645class WAIT_FM_MM : MMArch {646 bits<10> code_;647 bits<32> Inst;648 649 let Inst{31-26} = 0x00;650 let Inst{25-16} = code_;651 let Inst{15-6} = 0x24d;652 let Inst{5-0} = 0x3c;653}654 655class ER_FM_MM<bits<10> funct> : MMArch {656 bits<32> Inst;657 658 let Inst{31-26} = 0x00;659 let Inst{25-16} = 0x00;660 let Inst{15-6} = funct;661 let Inst{5-0} = 0x3c;662}663 664class EI_FM_MM<bits<10> funct> : MMArch {665 bits<32> Inst;666 bits<5> rt;667 668 let Inst{31-26} = 0x00;669 let Inst{25-21} = 0x00;670 let Inst{20-16} = rt;671 let Inst{15-6} = funct;672 let Inst{5-0} = 0x3c;673}674 675class TEQ_FM_MM<bits<6> funct> : MMArch {676 bits<5> rs;677 bits<5> rt;678 bits<4> code_;679 680 bits<32> Inst;681 682 let Inst{31-26} = 0x00;683 let Inst{25-21} = rt;684 let Inst{20-16} = rs;685 let Inst{15-12} = code_;686 let Inst{11-6} = funct;687 let Inst{5-0} = 0x3c;688}689 690class TEQI_FM_MM<bits<5> funct> : MMArch {691 bits<5> rs;692 bits<16> imm16;693 694 bits<32> Inst;695 696 let Inst{31-26} = 0x10;697 let Inst{25-21} = funct;698 let Inst{20-16} = rs;699 let Inst{15-0} = imm16;700}701 702class LL_FM_MM<bits<4> funct> : MMArch {703 bits<5> rt;704 bits<21> addr;705 706 bits<32> Inst;707 708 let Inst{31-26} = 0x18;709 let Inst{25-21} = rt;710 let Inst{20-16} = addr{20-16};711 let Inst{15-12} = funct;712 let Inst{11-0} = addr{11-0};713}714 715class LLE_FM_MM<bits<4> funct> : MMArch {716 bits<5> rt;717 bits<21> addr;718 bits<5> base = addr{20-16};719 bits<9> offset = addr{8-0};720 721 bits<32> Inst;722 723 let Inst{31-26} = 0x18;724 let Inst{25-21} = rt;725 let Inst{20-16} = base;726 let Inst{15-12} = funct;727 let Inst{11-9} = 0x6;728 let Inst{8-0} = offset;729}730 731class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {732 bits<5> ft;733 bits<5> fs;734 bits<5> fd;735 736 bits<32> Inst;737 738 let Inst{31-26} = 0x15;739 let Inst{25-21} = ft;740 let Inst{20-16} = fs;741 let Inst{15-11} = fd;742 let Inst{10} = 0;743 let Inst{9-8} = fmt;744 let Inst{7-0} = funct;745 746}747 748class LWXC1_FM_MM<bits<9> funct> : MMArch {749 bits<5> fd;750 bits<5> base;751 bits<5> index;752 753 bits<32> Inst;754 755 let Inst{31-26} = 0x15;756 let Inst{25-21} = index;757 let Inst{20-16} = base;758 let Inst{15-11} = fd;759 let Inst{10-9} = 0x0;760 let Inst{8-0} = funct;761}762 763class SWXC1_FM_MM<bits<9> funct> : MMArch {764 bits<5> fs;765 bits<5> base;766 bits<5> index;767 768 bits<32> Inst;769 770 let Inst{31-26} = 0x15;771 let Inst{25-21} = index;772 let Inst{20-16} = base;773 let Inst{15-11} = fs;774 let Inst{10-9} = 0x0;775 let Inst{8-0} = funct;776}777 778class CEQS_FM_MM<bits<2> fmt> : MMArch {779 bits<5> fs;780 bits<5> ft;781 bits<3> fcc;782 bits<4> cond;783 784 bits<32> Inst;785 786 let Inst{31-26} = 0x15;787 let Inst{25-21} = ft;788 let Inst{20-16} = fs;789 let Inst{15-13} = fcc;790 let Inst{12} = 0;791 let Inst{11-10} = fmt;792 let Inst{9-6} = cond;793 let Inst{5-0} = 0x3c;794}795 796class C_COND_FM_MM<bits <2> fmt, bits<4> c> : CEQS_FM_MM<fmt> {797 let cond = c;798}799 800class BC1F_FM_MM<bits<5> tf> : MMArch {801 bits<3> fcc;802 bits<16> offset;803 804 bits<32> Inst;805 806 let Inst{31-26} = 0x10;807 let Inst{25-21} = tf;808 let Inst{20-18} = fcc; // cc809 let Inst{17-16} = 0x0;810 let Inst{15-0} = offset;811}812 813class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {814 bits<5> fd;815 bits<5> fs;816 817 bits<32> Inst;818 819 let Inst{31-26} = 0x15;820 let Inst{25-21} = fd;821 let Inst{20-16} = fs;822 let Inst{15} = 0;823 let Inst{14} = fmt;824 let Inst{13-6} = funct;825 let Inst{5-0} = 0x3b;826}827 828class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {829 bits<5> fd;830 bits<5> fs;831 832 bits<32> Inst;833 834 let Inst{31-26} = 0x15;835 let Inst{25-21} = fd;836 let Inst{20-16} = fs;837 let Inst{15} = 0;838 let Inst{14-13} = fmt;839 let Inst{12-6} = funct;840 let Inst{5-0} = 0x3b;841}842 843class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {844 bits<5> fd;845 bits<5> fs;846 bits<3> fcc;847 bits<32> Inst;848 849 let Inst{31-26} = 0x15;850 let Inst{25-21} = fd;851 let Inst{20-16} = fs;852 let Inst{15-13} = fcc; //cc853 let Inst{12-11} = 0x0;854 let Inst{10-9} = fmt;855 let Inst{8-0} = func;856}857 858class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {859 bits<5> fd;860 bits<5> fs;861 bits<5> rt;862 863 bits<32> Inst;864 865 let Inst{31-26} = 0x15;866 let Inst{25-21} = rt;867 let Inst{20-16} = fs;868 let Inst{15-11} = fd;869 let Inst{9-8} = fmt;870 let Inst{7-0} = funct;871}872 873class MFC1_FM_MM<bits<8> funct> : MMArch {874 bits<5> rt;875 bits<5> fs;876 877 bits<32> Inst;878 879 let Inst{31-26} = 0x15;880 let Inst{25-21} = rt;881 let Inst{20-16} = fs;882 let Inst{15-14} = 0x0;883 let Inst{13-6} = funct;884 let Inst{5-0} = 0x3b;885}886 887class MADDS_FM_MM<bits<6> funct>: MMArch {888 bits<5> ft;889 bits<5> fs;890 bits<5> fd;891 bits<5> fr;892 893 bits<32> Inst;894 895 let Inst{31-26} = 0x15;896 let Inst{25-21} = ft;897 let Inst{20-16} = fs;898 let Inst{15-11} = fd;899 let Inst{10-6} = fr;900 let Inst{5-0} = funct;901}902 903class COMPACT_BRANCH_FM_MM<bits<5> funct> {904 bits<5> rs;905 bits<16> offset;906 907 bits<32> Inst;908 909 let Inst{31-26} = 0x10;910 let Inst{25-21} = funct;911 let Inst{20-16} = rs;912 let Inst{15-0} = offset;913}914 915class COP0_TLB_FM_MM<bits<10> op> : MMArch {916 bits<32> Inst;917 918 let Inst{31-26} = 0x0;919 let Inst{25-16} = 0x0;920 let Inst{15-6} = op;921 let Inst{5-0} = 0x3c;922}923 924class SDBBP_FM_MM : MMArch {925 bits<10> code_;926 927 bits<32> Inst;928 929 let Inst{31-26} = 0x0;930 let Inst{25-16} = code_;931 let Inst{15-6} = 0x36d;932 let Inst{5-0} = 0x3c;933}934 935class SIGRIE_FM_MM : MMArch {936 bits<16> code_;937 938 bits<32> Inst;939 940 let Inst{31-26} = 0x0;941 let Inst{25-22} = 0x0;942 let Inst{21-6} = code_;943 let Inst{5-0} = 0b111111;944}945 946class RDHWR_FM_MM : MMArch {947 bits<5> rt;948 bits<5> rd;949 950 bits<32> Inst;951 952 let Inst{31-26} = 0x0;953 let Inst{25-21} = rt;954 let Inst{20-16} = rd;955 let Inst{15-6} = 0x1ac;956 let Inst{5-0} = 0x3c;957}958 959class LWXS_FM_MM<bits<10> funct> {960 bits<5> rd;961 bits<5> base;962 bits<5> index;963 964 bits<32> Inst;965 966 let Inst{31-26} = 0x0;967 let Inst{25-21} = index;968 let Inst{20-16} = base;969 let Inst{15-11} = rd;970 let Inst{10} = 0;971 let Inst{9-0} = funct;972}973 974class LWM_FM_MM<bits<4> funct> : MMArch {975 bits<5> rt;976 bits<21> addr;977 978 bits<32> Inst;979 980 let Inst{31-26} = 0x8;981 let Inst{25-21} = rt;982 let Inst{20-16} = addr{20-16};983 let Inst{15-12} = funct;984 let Inst{11-0} = addr{11-0};985}986 987class LWM_FM_MM16<bits<4> funct> : MMArch {988 bits<2> rt;989 bits<4> addr;990 991 bits<16> Inst;992 993 let Inst{15-10} = 0x11;994 let Inst{9-6} = funct;995 let Inst{5-4} = rt;996 let Inst{3-0} = addr;997}998 999class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {1000 bits<21> addr;1001 bits<5> hint;1002 bits<5> base = addr{20-16};1003 bits<12> offset = addr{11-0};1004 1005 bits<32> Inst;1006 1007 let Inst{31-26} = op;1008 let Inst{25-21} = hint;1009 let Inst{20-16} = base;1010 let Inst{15-12} = funct;1011 let Inst{11-0} = offset;1012}1013 1014class CACHE_PREFE_FM_MM<bits<6> op, bits<3> funct> : MMArch {1015 bits<21> addr;1016 bits<5> hint;1017 bits<5> base = addr{20-16};1018 bits<9> offset = addr{8-0};1019 1020 bits<32> Inst;1021 1022 let Inst{31-26} = op;1023 let Inst{25-21} = hint;1024 let Inst{20-16} = base;1025 let Inst{15-12} = 0xA;1026 let Inst{11-9} = funct;1027 let Inst{8-0} = offset;1028}1029 1030class POOL32F_PREFX_FM_MM<bits<6> op, bits<9> funct> : MMArch {1031 bits<5> index;1032 bits<5> base;1033 bits<5> hint;1034 1035 bits<32> Inst;1036 1037 let Inst{31-26} = op;1038 let Inst{25-21} = index;1039 let Inst{20-16} = base;1040 let Inst{15-11} = hint;1041 let Inst{10-9} = 0x0;1042 let Inst{8-0} = funct;1043}1044 1045class BARRIER_FM_MM<bits<5> op> : MMArch {1046 bits<32> Inst;1047 1048 let Inst{31-26} = 0x0;1049 let Inst{25-21} = 0x0;1050 let Inst{20-16} = 0x0;1051 let Inst{15-11} = op;1052 let Inst{10-6} = 0x0;1053 let Inst{5-0} = 0x0;1054}1055 1056class ADDIUPC_FM_MM {1057 bits<3> rs;1058 bits<23> imm;1059 1060 bits<32> Inst;1061 1062 let Inst{31-26} = 0x1e;1063 let Inst{25-23} = rs;1064 let Inst{22-0} = imm;1065}1066 1067class POOL32A_CFTC2_FM_MM<bits<10> funct> : MMArch {1068 bits<5> rt;1069 bits<5> impl;1070 1071 bits<32> Inst;1072 1073 let Inst{31-26} = 0b000000;1074 let Inst{25-21} = rt;1075 let Inst{20-16} = impl;1076 let Inst{15-6} = funct;1077 let Inst{5-0} = 0b111100;1078}1079 1080class POOL32A_TLBINV_FM_MM<bits<10> funct> : MMArch {1081 bits<32> Inst;1082 1083 let Inst{31-26} = 0x0;1084 let Inst{25-16} = 0x0;1085 let Inst{15-6} = funct;1086 let Inst{5-0} = 0b111100;1087}1088 1089class POOL32A_MFTC0_FM_MM<bits<5> funct, bits<6> opcode> : MMArch {1090 bits<5> rt;1091 bits<5> rs;1092 bits<3> sel;1093 1094 bits<32> Inst;1095 1096 let Inst{31-26} = 0b000000;1097 let Inst{25-21} = rt;1098 let Inst{20-16} = rs;1099 let Inst{15-14} = 0;1100 let Inst{13-11} = sel;1101 let Inst{10-6} = funct;1102 let Inst{5-0} = opcode;1103}1104 1105class POOL32A_HYPCALL_FM_MM : MMArch {1106 bits<32> Inst;1107 1108 bits<10> code_;1109 1110 let Inst{31-26} = 0x0;1111 let Inst{25-16} = code_;1112 let Inst{15-6} = 0b1100001101;1113 let Inst{5-0} = 0b111100;1114}1115