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1//===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// Subclass of MipsTargetLowering specialized for mips16.10//11//===----------------------------------------------------------------------===//12 13#ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H14#define LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H15 16#include "MipsISelLowering.h"17 18namespace llvm {19 class Mips16TargetLowering : public MipsTargetLowering {20 public:21 explicit Mips16TargetLowering(const MipsTargetMachine &TM,22 const MipsSubtarget &STI);23 24 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,25 Align Alignment,26 MachineMemOperand::Flags Flags,27 unsigned *Fast) const override;28 29 MachineBasicBlock *30 EmitInstrWithCustomInserter(MachineInstr &MI,31 MachineBasicBlock *MBB) const override;32 33 private:34 bool isEligibleForTailCallOptimization(35 const CCState &CCInfo, unsigned NextStackOffset,36 const MipsFunctionInfo &FI) const override;37 38 unsigned int39 getMips16HelperFunctionStubNumber(ArgListTy &Args) const;40 41 const char *getMips16HelperFunction42 (Type* RetTy, ArgListTy &Args, bool &needHelper) const;43 44 void45 getOpndList(SmallVectorImpl<SDValue> &Ops,46 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,47 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,48 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,49 SDValue Chain) const override;50 51 MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr &MI,52 MachineBasicBlock *BB) const;53 54 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,55 MachineInstr &MI,56 MachineBasicBlock *BB) const;57 58 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,59 MachineInstr &MI,60 MachineBasicBlock *BB) const;61 62 MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,63 MachineInstr &MI,64 MachineBasicBlock *BB) const;65 66 MachineBasicBlock *emitFEXT_T8I8I16_ins(unsigned BtOpc, unsigned CmpiOpc,67 unsigned CmpiXOpc, bool ImmSigned,68 MachineInstr &MI,69 MachineBasicBlock *BB) const;70 71 MachineBasicBlock *emitFEXT_CCRX16_ins(unsigned SltOpc, MachineInstr &MI,72 MachineBasicBlock *BB) const;73 74 MachineBasicBlock *emitFEXT_CCRXI16_ins(unsigned SltiOpc, unsigned SltiXOpc,75 MachineInstr &MI,76 MachineBasicBlock *BB) const;77 };78}79 80#endif81