146 lines · cpp
1//===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file contains the Mips implementation of TargetFrameLowering class.10//11//===----------------------------------------------------------------------===//12 13#include "MipsFrameLowering.h"14#include "MipsInstrInfo.h"15#include "MipsTargetMachine.h"16#include "llvm/CodeGen/MachineFrameInfo.h"17#include "llvm/CodeGen/MachineFunction.h"18#include "llvm/CodeGen/MachineModuleInfo.h"19#include "llvm/Target/TargetOptions.h"20 21using namespace llvm;22 23 24//===----------------------------------------------------------------------===//25//26// Stack Frame Processing methods27// +----------------------------+28//29// The stack is allocated decrementing the stack pointer on30// the first instruction of a function prologue. Once decremented,31// all stack references are done thought a positive offset32// from the stack/frame pointer, so the stack is considering33// to grow up! Otherwise terrible hacks would have to be made34// to get this stack ABI compliant :)35//36// The stack frame required by the ABI (after call):37// Offset38//39// 0 ----------40// 4 Args to pass41// . saved $GP (used in PIC)42// . Alloca allocations43// . Local Area44// . CPU "Callee Saved" Registers45// . saved FP46// . saved RA47// . FPU "Callee Saved" Registers48// StackSize -----------49//50// Offset - offset from sp after stack allocation on function prologue51//52// The sp is the stack pointer subtracted/added from the stack size53// at the Prologue/Epilogue54//55// References to the previous stack (to obtain arguments) are done56// with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))57//58// Examples:59// - reference to the actual stack frame60// for any local area var there is smt like : FI >= 0, StackOffset: 461// sw REGX, 4(SP)62//63// - reference to previous stack frame64// suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.65// The emitted instruction will be something like:66// lw REGX, 16+StackSize(SP)67//68// Since the total stack size is unknown on LowerFormalArguments, all69// stack references (ObjectOffset) created to reference the function70// arguments, are negative numbers. This way, on eliminateFrameIndex it's71// possible to detect those references and the offsets are adjusted to72// their real location.73//74//===----------------------------------------------------------------------===//75 76const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) {77 if (ST.inMips16Mode())78 return llvm::createMips16FrameLowering(ST);79 80 return llvm::createMipsSEFrameLowering(ST);81}82 83// hasFPImpl - Return true if the specified function should have a dedicated84// frame pointer register. This is true if the function has variable sized85// allocas, if it needs dynamic stack realignment, if frame pointer elimination86// is disabled, or if the frame address is taken.87bool MipsFrameLowering::hasFPImpl(const MachineFunction &MF) const {88 const MachineFrameInfo &MFI = MF.getFrameInfo();89 const TargetRegisterInfo *TRI = STI.getRegisterInfo();90 91 return MF.getTarget().Options.DisableFramePointerElim(MF) ||92 MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||93 TRI->hasStackRealignment(MF);94}95 96bool MipsFrameLowering::hasBP(const MachineFunction &MF) const {97 const MachineFrameInfo &MFI = MF.getFrameInfo();98 const TargetRegisterInfo *TRI = STI.getRegisterInfo();99 100 return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);101}102 103// Estimate the size of the stack, including the incoming arguments. We need to104// account for register spills, local objects, reserved call frame and incoming105// arguments. This is required to determine the largest possible positive offset106// from $sp so that it can be determined if an emergency spill slot for stack107// addresses is required.108uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {109 const MachineFrameInfo &MFI = MF.getFrameInfo();110 const TargetRegisterInfo &TRI = *STI.getRegisterInfo();111 112 int64_t Size = 0;113 114 // Iterate over fixed sized objects which are incoming arguments.115 for (int I = MFI.getObjectIndexBegin(); I != 0; ++I)116 if (MFI.getObjectOffset(I) > 0)117 Size += MFI.getObjectSize(I);118 119 // Conservatively assume all callee-saved registers will be saved.120 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) {121 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R));122 Size = alignTo(Size + RegSize, RegSize);123 }124 125 // Get the size of the rest of the frame objects and any possible reserved126 // call frame, accounting for alignment.127 return Size + MFI.estimateStackSize(MF);128}129 130// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions131MachineBasicBlock::iterator MipsFrameLowering::132eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,133 MachineBasicBlock::iterator I) const {134 unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP;135 136 if (!hasReservedCallFrame(MF)) {137 int64_t Amount = I->getOperand(0).getImm();138 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)139 Amount = -Amount;140 141 STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);142 }143 144 return MBB.erase(I);145}146