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1MIPS Relocation Principles2 3In LLVM, there are several elements of the llvm::ISD::NodeType enum4that deal with addresses and/or relocations. These are defined in5include/llvm/Target/TargetSelectionDAG.td, namely:6 GlobalAddress, GlobalTLSAddress, JumpTable, ConstantPool,7 ExternalSymbol, BlockAddress8The MIPS backend uses several principles to handle these.9 101. Code for lowering addresses references to machine dependent code is11factored into common code for generating different address forms and12is called by the relocation model specific lowering function, using13templated functions. For example:14 15 // lib/Target/Mips/MipsISelLowering.cpp16 SDValue MipsTargetLowering::17 lowerJumpTable(SDValue Op, SelectionDAG &DAG) const18 19calls20 21 template <class NodeTy> // lib/Target/Mips/MipsISelLowering.h22 SDValue getAddrLocal(NodeTy *N, const SDLoc &DL, EVT Ty,23 SelectionDAG &DAG, bool IsN32OrN64) const24 25which calls the overloaded function:26 27 // lib/Target/Mips/MipsISelLowering.h28 SDValue getTargetNode(JumpTableSDNode *N, EVT Ty, SelectionDAG &DAG,29 unsigned Flag) const;30 312. Generic address nodes are lowered to some combination of target32independent and machine specific SDNodes (for example:33MipsISD::{Highest, Higher, Hi, Lo}) depending upon relocation model,34ABI, and compilation options.35 36The choice of specific instructions that are to be used is delegated37to ISel which in turn relies on TableGen patterns to choose subtarget38specific instructions. For example, in getAddrLocal, the pseudo-code39generated is:40 41 (add (load (wrapper $gp, %got(sym)), %lo(sym))42 43where "%lo" represents an instance of an SDNode with opcode44"MipsISD::Lo", "wrapper" indicates one with opcode "MipsISD::Wrapper",45and "%got" the global table pointer "getGlobalReg(...)". The "add" is46"ISD::ADD", not a target dependent one.47 483. A TableGen multiclass pattern "MipsHiLoRelocs" is used to define a49template pattern parameterized over the load upper immediate50instruction, add operation, the zero register, and register class.51Here the instantiation of MipsHiLoRelocs in MipsInstrInfo.td is used52to MIPS32 to compute addresses for the static relocation model.53 54 // lib/Target/Mips/MipsInstrInfo.td55 multiclass MipsHiLoRelocs<Instruction Lui, Instruction Addiu,56 Register ZeroReg, RegisterOperand GPROpnd> {57 def : MipsPat<(MipsHi tglobaladdr:$in), (Lui tglobaladdr:$in)>;58 ...59 def : MipsPat<(MipsLo tglobaladdr:$in), (Addiu ZeroReg, tglobaladdr:$in)>;60 ...61 def : MipsPat<(add GPROpnd:$hi, (MipsLo tglobaladdr:$lo)),62 (Addiu GPROpnd:$hi, tglobaladdr:$lo)>;63 ...64 }65 defm : MipsHiLoRelocs<LUi, ADDiu, ZERO, GPR32Opnd>;66 67 // lib/Target/Mips/Mips64InstrInfo.td68 defm : MipsHiLoRelocs<LUi64, DADDiu, ZERO_64, GPR64Opnd>, SYM_32;69 70The instantiation in Mips64InstrInfo.td is used for MIPS64 in ILP3271mode, as guarded by the predicate "SYM_32" and also for a submode of72LP64 where symbols are assumed to be 32 bits wide.73 74More details on how multiclasses in TableGen work can be found in the75section "Multiclass definitions and instances" in the document76"TableGen Language Introduction"77 784. Instruction definitions are multiply defined to cover the different79register classes. In some cases, such as LW/LW64, this also accounts80for the difference in the results of instruction execution. On MIPS32,81"lw" loads a 32 bit value from memory. On MIPS64, "lw" loads a 32 bit82value from memory and sign extends the value to 64 bits.83 84 // lib/Target/Mips/MipsInstrInfo.td85 def LUi : MMRel, LoadUpper<"lui", GPR32Opnd, uimm16_relaxed>, LUI_FM;86 // lib/Target/Mips/Mips64InstrInfo.td87 def LUi64 : LoadUpper<"lui", GPR64Opnd, uimm16_64_relaxed>, LUI_FM;88 89defines two names "LUi" and "LUi64" with two different register90classes, but with the same encoding---"LUI_FM". These instructions load a9116-bit immediate into bits 31-16 and clear the lower 15 bits. On MIPS64,92the result is sign-extended to 64 bits.93