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1//===- NVPTXInstrFormats.td - NVPTX Instruction Formats-------*- tblgen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9//===----------------------------------------------------------------------===//10// Describe NVPTX instructions format11//12//===----------------------------------------------------------------------===//13 14// Generic NVPTX Format15 16class NVPTXInst<dag outs, dag ins, string asmstr, list<dag> pattern = []>17 : Instruction {18 field bits<14> Inst;19 20 let Namespace = "NVPTX";21 dag OutOperandList = outs;22 dag InOperandList = ins;23 let AsmString = asmstr;24 let Pattern = pattern;25 26 // TSFlagFields27 bit IsLoad = false;28 bit IsStore = false;29 30 bit IsTex = false;31 bit IsSust = false;32 bit IsSurfTexQuery = false;33 bit IsTexModeUnified = false;34 35 // The following field is encoded as log2 of the vector size minus one,36 // with 0 meaning the operation is not a surface instruction. For example,37 // if IsSuld == 2, then the instruction is a suld instruction with vector size38 // 2**(2-1) = 2.39 bits<2> IsSuld = 0;40 41 let TSFlags{4} = IsLoad;42 let TSFlags{5} = IsStore;43 let TSFlags{6} = IsTex;44 let TSFlags{8...7} = IsSuld;45 let TSFlags{9} = IsSust;46 let TSFlags{10} = IsSurfTexQuery;47 let TSFlags{11} = IsTexModeUnified;48}49