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1//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9#ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H10#define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H11 12#include "llvm/MC/MCFixup.h"13 14#undef PPC15 16namespace llvm {17namespace PPC {18enum Fixups {19 // 24-bit PC relative relocation for direct branches like 'b' and 'bl'.20 fixup_ppc_br24 = FirstTargetFixupKind,21 22 // 24-bit PC relative relocation for direct branches like 'b' and 'bl' where23 // the caller does not use the TOC.24 fixup_ppc_br24_notoc,25 26 /// 14-bit PC relative relocation for conditional branches.27 fixup_ppc_brcond14,28 29 /// 24-bit absolute relocation for direct branches like 'ba' and 'bla'.30 fixup_ppc_br24abs,31 32 /// 14-bit absolute relocation for conditional branches.33 fixup_ppc_brcond14abs,34 35 /// A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like36 /// 'li' or 'addis'.37 fixup_ppc_half16,38 39 /// A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for40 /// instrs like 'std'.41 fixup_ppc_half16ds,42 43 // A 32-bit fixup corresponding to PC-relative paddis.44 fixup_ppc_pcrel32,45 46 // A 32-bit fixup corresponding to Non-PC-relative paddis.47 fixup_ppc_imm32,48 49 // A 34-bit fixup corresponding to PC-relative paddi.50 fixup_ppc_pcrel34,51 52 // A 34-bit fixup corresponding to Non-PC-relative paddi.53 fixup_ppc_imm34,54 55 /// Not a true fixup, but ties a symbol to a call to __tls_get_addr for the56 /// TLS general and local dynamic models, or inserts the thread-pointer57 /// register number.58 fixup_ppc_nofixup,59 60 /// A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for61 /// instrs like 'lxv'. Produces the same relocation as fixup_ppc_half16ds.62 fixup_ppc_half16dq,63 64 // Marker65 LastTargetFixupKind,66 NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind67};68}69}70 71#endif72