126 lines · cpp
1//===-- PPCXCOFFObjectWriter.cpp - PowerPC XCOFF Writer -------------------===//2//3//4// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.5// See https://llvm.org/LICENSE.txt for license information.6// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception7//8//===----------------------------------------------------------------------===//9 10#include "MCTargetDesc/PPCFixupKinds.h"11#include "MCTargetDesc/PPCMCTargetDesc.h"12#include "PPCMCAsmInfo.h"13#include "llvm/BinaryFormat/XCOFF.h"14#include "llvm/MC/MCFixup.h"15#include "llvm/MC/MCValue.h"16#include "llvm/MC/MCXCOFFObjectWriter.h"17 18using namespace llvm;19 20namespace {21class PPCXCOFFObjectWriter : public MCXCOFFObjectTargetWriter {22 static constexpr uint8_t SignBitMask = 0x80;23 24public:25 PPCXCOFFObjectWriter(bool Is64Bit);26 27 std::pair<uint8_t, uint8_t>28 getRelocTypeAndSignSize(const MCValue &Target, const MCFixup &Fixup,29 bool IsPCRel) const override;30};31} // end anonymous namespace32 33PPCXCOFFObjectWriter::PPCXCOFFObjectWriter(bool Is64Bit)34 : MCXCOFFObjectTargetWriter(Is64Bit) {}35 36std::unique_ptr<MCObjectTargetWriter>37llvm::createPPCXCOFFObjectWriter(bool Is64Bit) {38 return std::make_unique<PPCXCOFFObjectWriter>(Is64Bit);39}40 41std::pair<uint8_t, uint8_t> PPCXCOFFObjectWriter::getRelocTypeAndSignSize(42 const MCValue &Target, const MCFixup &Fixup, bool IsPCRel) const {43 const auto Specifier = Target.getSpecifier();44 // People from AIX OS team says AIX link editor does not care about45 // the sign bit in the relocation entry "most" of the time.46 // The system assembler seems to set the sign bit on relocation entry47 // based on similar property of IsPCRel. So we will do the same here.48 // TODO: More investigation on how assembler decides to set the sign49 // bit, and we might want to match that.50 const uint8_t EncodedSignednessIndicator = IsPCRel ? SignBitMask : 0u;51 52 // The magic number we use in SignAndSize has a strong relationship with53 // the corresponding MCFixupKind. In most cases, it's the MCFixupKind54 // number - 1, because SignAndSize encodes the bit length being55 // relocated minus 1.56 switch ((unsigned)Fixup.getKind()) {57 default:58 report_fatal_error("Unimplemented fixup kind.");59 case XCOFF::RelocationType::R_REF:60 return {XCOFF::RelocationType::R_REF, 0};61 case PPC::fixup_ppc_half16: {62 const uint8_t SignAndSizeForHalf16 = EncodedSignednessIndicator | 15;63 switch (Specifier) {64 default:65 report_fatal_error("Unsupported modifier for half16 fixup.");66 case PPC::S_None:67 return {XCOFF::RelocationType::R_TOC, SignAndSizeForHalf16};68 case PPC::S_U:69 return {XCOFF::RelocationType::R_TOCU, SignAndSizeForHalf16};70 case PPC::S_L:71 return {XCOFF::RelocationType::R_TOCL, SignAndSizeForHalf16};72 case PPC::S_AIX_TLSLE:73 return {XCOFF::RelocationType::R_TLS_LE, SignAndSizeForHalf16};74 case PPC::S_AIX_TLSLD:75 return {XCOFF::RelocationType::R_TLS_LD, SignAndSizeForHalf16};76 }77 } break;78 case PPC::fixup_ppc_half16ds:79 case PPC::fixup_ppc_half16dq: {80 if (IsPCRel)81 report_fatal_error("Invalid PC-relative relocation.");82 switch (Specifier) {83 default:84 llvm_unreachable("Unsupported Modifier");85 case PPC::S_None:86 return {XCOFF::RelocationType::R_TOC, 15};87 case PPC::S_L:88 return {XCOFF::RelocationType::R_TOCL, 15};89 case PPC::S_AIX_TLSLE:90 return {XCOFF::RelocationType::R_TLS_LE, 15};91 case PPC::S_AIX_TLSLD:92 return {XCOFF::RelocationType::R_TLS_LD, 15};93 }94 } break;95 case PPC::fixup_ppc_br24:96 // Branches are 4 byte aligned, so the 24 bits we encode in97 // the instruction actually represents a 26 bit offset.98 return {XCOFF::RelocationType::R_RBR, EncodedSignednessIndicator | 25};99 case PPC::fixup_ppc_br24abs:100 return {XCOFF::RelocationType::R_RBA, EncodedSignednessIndicator | 25};101 case FK_Data_4:102 case FK_Data_8:103 const uint8_t SignAndSizeForFKData =104 EncodedSignednessIndicator |105 ((unsigned)Fixup.getKind() == FK_Data_4 ? 31 : 63);106 switch (Specifier) {107 default:108 report_fatal_error("Unsupported modifier");109 case PPC::S_AIX_TLSGD:110 return {XCOFF::RelocationType::R_TLS, SignAndSizeForFKData};111 case PPC::S_AIX_TLSGDM:112 return {XCOFF::RelocationType::R_TLSM, SignAndSizeForFKData};113 case PPC::S_AIX_TLSIE:114 return {XCOFF::RelocationType::R_TLS_IE, SignAndSizeForFKData};115 case PPC::S_AIX_TLSLE:116 return {XCOFF::RelocationType::R_TLS_LE, SignAndSizeForFKData};117 case PPC::S_AIX_TLSLD:118 return {XCOFF::RelocationType::R_TLS_LD, SignAndSizeForFKData};119 case PPC::S_AIX_TLSML:120 return {XCOFF::RelocationType::R_TLSML, SignAndSizeForFKData};121 case PPC::S_None:122 return {XCOFF::RelocationType::R_POS, SignAndSizeForFKData};123 }124 }125}126