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1//===- PPCGenRegisterBankInfo.def -------------------------------*- C++ -*-==//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8/// \file9/// This file defines all the static objects used by PPCRegisterBankInfo.10/// \todo This should be generated by TableGen, because the logic here can be11/// derived from register bank definition. Not yet implemented.12//===----------------------------------------------------------------------===//13 14namespace llvm {15const RegisterBankInfo::PartialMapping PPCGenRegisterBankInfo::PartMappings[]{16 /* StartIdx, Length, RegBank */17 // 0: GPR 32-bit value.18 {0, 32, PPC::GPRRegBank},19 // 1: GPR 64-bit value.20 {0, 64, PPC::GPRRegBank},21 // 2: FPR 32-bit value22 {0, 32, PPC::FPRRegBank},23 // 3: FPR 64-bit value24 {0, 64, PPC::FPRRegBank},25 // 4: 128-bit vector (VSX, Altivec)26 {0, 128, PPC::VECRegBank},27 // 5: CR 4-bit value28 {0, 4, PPC::CRRegBank},29};30 31// ValueMappings.32// Pointers to the entries in this array are returned by getValueMapping() and33// getCopyMapping().34//35// The array has the following structure:36// - At index 0 is the invalid entry.37// - After that, the mappings for the register types from PartialMappingIdx38// follow. Each mapping consists of 3 entries, which is needed to cover39// 3-operands instructions.40// - Last, mappings for cross-register bank moves follow. Since COPY has only41// 2 operands, a mapping consists of 2 entries.42const RegisterBankInfo::ValueMapping PPCGenRegisterBankInfo::ValMappings[]{43 /* BreakDown, NumBreakDowns */44 // 0: invalid45 {nullptr, 0},46 // 1: GPR 32-bit value.47 {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},48 {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},49 {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},50 // 4: GPR 64-bit value.51 {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},52 {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},53 {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},54 // 7: FPR 32-bit value.55 {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},56 {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},57 {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},58 // 10: FPR 64-bit value.59 {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},60 {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},61 {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},62 // 13: 128-bit vector.63 {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},64 {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},65 {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},66 // 16: CR 4-bit value.67 {&PPCGenRegisterBankInfo::PartMappings[PMI_CR - PMI_Min], 1},68};69 70// TODO Too simple!71const RegisterBankInfo::ValueMapping *72PPCGenRegisterBankInfo::getValueMapping(PartialMappingIdx RBIdx) {73 assert(RBIdx != PartialMappingIdx::PMI_None && "No mapping needed for that");74 75 unsigned ValMappingIdx = RBIdx - PMI_Min;76 77 return &ValMappings[1 + 3 * ValMappingIdx];78}79 80const PPCGenRegisterBankInfo::PartialMappingIdx81 PPCGenRegisterBankInfo::BankIDToCopyMapIdx[]{82 PMI_None,83 PMI_FPR64, // FPR84 PMI_GPR64, // GPR85 PMI_VEC128, // VEC86};87 88// TODO Too simple!89const RegisterBankInfo::ValueMapping *90PPCGenRegisterBankInfo::getCopyMapping(unsigned DstBankID, unsigned SrcBankID,91 unsigned Size) {92 assert(DstBankID < PPC::NumRegisterBanks && "Invalid bank ID");93 assert(SrcBankID < PPC::NumRegisterBanks && "Invalid bank ID");94 PartialMappingIdx DstRBIdx = BankIDToCopyMapIdx[DstBankID];95 PartialMappingIdx SrcRBIdx = BankIDToCopyMapIdx[SrcBankID];96 assert(DstRBIdx != PMI_None && "No such mapping");97 assert(SrcRBIdx != PMI_None && "No such mapping");98 99 if (DstRBIdx == SrcRBIdx)100 return getValueMapping(DstRBIdx);101 102 assert(Size <= 128 && "Can currently handle types up to 128 bits (vectors)!");103 // TODO: This function needs to be updated to handle all cases for104 // GPRs, FPRs and vectors. It currently only handles bitcasting to105 // the same type and has only mainly been tested for bitcasting106 // between different vector types.107 unsigned ValMappingIdx = DstRBIdx - PMI_Min;108 109 return &ValMappings[1 + 3 * ValMappingIdx];110}111 112} // namespace llvm113