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1//===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9//===----------------------------------------------------------------------===//10//11// PowerPC instruction formats12 13class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>14 : Instruction {15 field bits<32> Inst;16 let Size = 4;17 18 bit PPC64 = 0; // Default value, override with isPPC6419 20 let Namespace = "PPC";21 let Inst{0...5} = opcode;22 let OutOperandList = OOL;23 let InOperandList = IOL;24 let AsmString = asmstr;25 let Itinerary = itin;26 27 bits<1> PPC970_First = 0;28 bits<1> PPC970_Single = 0;29 bits<1> PPC970_Cracked = 0;30 bits<3> PPC970_Unit = 0;31 32 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to33 /// these must be reflected there! See comments there for what these are.34 let TSFlags{0} = PPC970_First;35 let TSFlags{1} = PPC970_Single;36 let TSFlags{2} = PPC970_Cracked;37 let TSFlags{5...3} = PPC970_Unit;38 39 // Indicate that this instruction is of type X-Form Load or Store40 bits<1> XFormMemOp = 0;41 let TSFlags{6} = XFormMemOp;42 43 // Indicate that this instruction is prefixed.44 bits<1> Prefixed = 0;45 let TSFlags{7} = Prefixed;46 47 // Indicate that this instruction produces a result that is sign extended from48 // 32 bits to 64 bits.49 bits<1> SExt32To64 = 0;50 let TSFlags{8} = SExt32To64;51 52 // Indicate that this instruction produces a result that is zero extended from53 // 32 bits to 64 bits.54 bits<1> ZExt32To64 = 0;55 let TSFlags{9} = ZExt32To64;56 57 // Indicate that this instruction takes a register+immediate memory operand.58 bits<1> MemriOp = 0;59 let TSFlags{10} = MemriOp;60 61 // Fields used for relation models.62 string BaseName = "";63 64 // For cases where multiple instruction definitions really represent the65 // same underlying instruction but with one definition for 64-bit arguments66 // and one for 32-bit arguments, this bit breaks the degeneracy between67 // the two forms and allows TableGen to generate mapping tables.68 bit Interpretation64Bit = 0;69}70 71class PPC970_DGroup_First { bits<1> PPC970_First = 1; }72class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }73class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }74class PPC970_MicroCode;75 76class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }77class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }78class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }79class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }80class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }81class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }82class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }83class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }84 85class XFormMemOp { bits<1> XFormMemOp = 1; }86class SExt32To64 { bits<1> SExt32To64 = 1; }87class ZExt32To64 { bits<1> ZExt32To64 = 1; }88class MemriOp { bits<1> MemriOp = 1; }89 90// Two joined instructions; used to emit two adjacent instructions as one.91// The itinerary from the first instruction is used for scheduling and92// classification.93class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,94 InstrItinClass itin>95 : Instruction {96 field bits<64> Inst;97 let Size = 8;98 99 bit PPC64 = 0; // Default value, override with isPPC64100 101 let Namespace = "PPC";102 let Inst{0...5} = opcode1;103 let Inst{32...37} = opcode2;104 let OutOperandList = OOL;105 let InOperandList = IOL;106 let AsmString = asmstr;107 let Itinerary = itin;108 109 bits<1> PPC970_First = 0;110 bits<1> PPC970_Single = 0;111 bits<1> PPC970_Cracked = 0;112 bits<3> PPC970_Unit = 0;113 114 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to115 /// these must be reflected there! See comments there for what these are.116 let TSFlags{0} = PPC970_First;117 let TSFlags{1} = PPC970_Single;118 let TSFlags{2} = PPC970_Cracked;119 let TSFlags{5...3} = PPC970_Unit;120 121 // Fields used for relation models.122 string BaseName = "";123 bit Interpretation64Bit = 0;124}125 126// Base class for all X-Form memory instructions127class IXFormMemOp<bits<6> opcode, dag OOL, dag IOL, string asmstr,128 InstrItinClass itin>129 :I<opcode, OOL, IOL, asmstr, itin>, XFormMemOp;130 131// 1.7.1 I-Form132class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,133 InstrItinClass itin, list<dag> pattern>134 : I<opcode, OOL, IOL, asmstr, itin> {135 let Pattern = pattern;136 bits<24> LI;137 138 let Inst{6...29} = LI;139 let Inst{30} = aa;140 let Inst{31} = lk;141}142 143// 1.7.2 B-Form144class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>145 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {146 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.147 bits<3> CR;148 bits<14> BD;149 150 bits<5> BI;151 let BI{0...1} = BIBO{5...6};152 let BI{2...4} = CR{0...2};153 154 let Inst{6...10} = BIBO{4...0};155 let Inst{11...15} = BI;156 let Inst{16...29} = BD;157 let Inst{30} = aa;158 let Inst{31} = lk;159}160 161class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL,162 string asmstr>163 : BForm<opcode, aa, lk, OOL, IOL, asmstr> {164 let BIBO{4...0} = bo;165 let BIBO{6...5} = 0;166 let CR = 0;167}168 169class BForm_2<bits<6> opcode, bits<5> bo, bits<5> bi, bit aa, bit lk,170 dag OOL, dag IOL, string asmstr>171 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {172 bits<14> BD;173 174 let Inst{6...10} = bo;175 let Inst{11...15} = bi;176 let Inst{16...29} = BD;177 let Inst{30} = aa;178 let Inst{31} = lk;179}180 181class BForm_3<bits<6> opcode, bit aa, bit lk,182 dag OOL, dag IOL, string asmstr>183 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {184 bits<5> BO;185 bits<5> BI;186 bits<14> BD;187 188 let Inst{6...10} = BO;189 let Inst{11...15} = BI;190 let Inst{16...29} = BD;191 let Inst{30} = aa;192 let Inst{31} = lk;193}194 195class BForm_3_at<bits<6> opcode, bit aa, bit lk,196 dag OOL, dag IOL, string asmstr>197 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {198 bits<5> BO;199 bits<2> at;200 bits<5> BI;201 bits<14> BD;202 203 let Inst{6...8} = BO{4...2};204 let Inst{9...10} = at;205 let Inst{11...15} = BI;206 let Inst{16...29} = BD;207 let Inst{30} = aa;208 let Inst{31} = lk;209}210 211class212BForm_4<bits<6> opcode, bits<5> bo, bit aa, bit lk,213 dag OOL, dag IOL, string asmstr>214 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {215 bits<5> BI;216 bits<14> BD;217 218 let Inst{6...10} = bo;219 let Inst{11...15} = BI;220 let Inst{16...29} = BD;221 let Inst{30} = aa;222 let Inst{31} = lk;223}224 225// 1.7.3 SC-Form226class SCForm<bits<6> opcode, bits<1> xo1, bits<1> xo2,227 dag OOL, dag IOL, string asmstr, InstrItinClass itin,228 list<dag> pattern>229 : I<opcode, OOL, IOL, asmstr, itin> {230 bits<7> LEV;231 232 let Pattern = pattern;233 234 let Inst{20...26} = LEV;235 let Inst{30} = xo1;236 let Inst{31} = xo2;237}238 239// 1.7.4 D-Form240class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,241 InstrItinClass itin, list<dag> pattern>242 : I<opcode, OOL, IOL, asmstr, itin> {243 bits<5> RST;244 bits<5> RA;245 bits<16> D;246 247 let Pattern = pattern;248 249 let Inst{6...10} = RST;250 let Inst{11...15} = RA;251 let Inst{16...31} = D;252}253 254class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,255 InstrItinClass itin, list<dag> pattern>256 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern>, MemriOp {257}258 259class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,260 InstrItinClass itin, list<dag> pattern>261 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern> {262 263 // Even though ADDIC_rec does not really have an RC bit, provide264 // the declaration of one here so that isRecordForm has something to set.265 bit RC = 0;266}267 268class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr,269 InstrItinClass itin, list<dag> pattern>270 : I<opcode, OOL, IOL, asmstr, itin> {271 bits<5> RST;272 bits<16> D;273 274 let Pattern = pattern;275 276 let Inst{6...10} = RST;277 let Inst{11...15} = 0;278 let Inst{16...31} = D;279}280 281class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,282 InstrItinClass itin, list<dag> pattern>283 : I<opcode, OOL, IOL, asmstr, itin> {284 bits<5> RA;285 bits<5> RST;286 bits<16> D;287 288 let Pattern = pattern;289 290 let Inst{6...10} = RST;291 let Inst{11...15} = RA;292 let Inst{16...31} = D;293}294 295class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr,296 InstrItinClass itin, list<dag> pattern>297 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {298 let RST = 0;299 let RA = 0;300 let D = 0;301 let MemriOp = 0;302}303 304class DForm_4_fixedreg_zero<bits<6> opcode, bits<5> R, dag OOL, dag IOL,305 string asmstr, InstrItinClass itin,306 list<dag> pattern>307 : DForm_4<opcode, OOL, IOL, asmstr, itin, pattern> {308 let RST = R;309 let RA = R;310 let D = 0;311}312 313class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,314 dag OOL, dag IOL, string asmstr,315 InstrItinClass itin, list<dag> pattern>316 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {317 bits<5> RST;318 bits<5> RA;319 bits<16> D;320 321 let Pattern = pattern;322 bits<24> LI;323 324 let Inst{6...29} = LI;325 let Inst{30} = aa;326 let Inst{31} = lk;327 328 let Inst{38...42} = RST;329 let Inst{43...47} = RA;330 let Inst{48...63} = D;331}332 333// This is used to emit BL8+NOP.334class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,335 dag OOL, dag IOL, string asmstr,336 InstrItinClass itin, list<dag> pattern>337 : IForm_and_DForm_1<opcode1, aa, lk, opcode2,338 OOL, IOL, asmstr, itin, pattern> {339 let RST = 0;340 let RA = 0;341 let D = 0;342}343 344class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr,345 InstrItinClass itin>346 : I<opcode, OOL, IOL, asmstr, itin> {347 bits<3> BF;348 bits<1> L;349 bits<5> RA;350 bits<16> D;351 352 let Inst{6...8} = BF;353 let Inst{9} = 0;354 let Inst{10} = L;355 let Inst{11...15} = RA;356 let Inst{16...31} = D;357}358 359class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,360 InstrItinClass itin>361 : DForm_5<opcode, OOL, IOL, asmstr, itin> {362 let L = PPC64;363}364 365class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr,366 InstrItinClass itin> 367 : DForm_5<opcode, OOL, IOL, asmstr, itin>;368 369class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,370 InstrItinClass itin>371 : DForm_6<opcode, OOL, IOL, asmstr, itin> {372 let L = PPC64;373}374 375 376// 1.7.5 DS-Form377class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,378 InstrItinClass itin, list<dag> pattern>379 : I<opcode, OOL, IOL, asmstr, itin>, MemriOp {380 bits<5> RST;381 bits<5> RA;382 bits<14> D;383 384 let Pattern = pattern;385 386 let Inst{6...10} = RST;387 let Inst{11...15} = RA;388 let Inst{16...29} = D;389 let Inst{30...31} = xo;390}391 392// ISA V3.0B 1.6.6 DX-Form393class DXForm<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,394 InstrItinClass itin, list<dag> pattern>395 : I<opcode, OOL, IOL, asmstr, itin> {396 bits<5> RT;397 bits<16> D;398 399 let Pattern = pattern;400 401 let Inst{6...10} = RT;402 let Inst{11...15} = D{5...1}; // d1403 let Inst{16...25} = D{15...6}; // d0404 let Inst{26...30} = xo;405 let Inst{31} = D{0}; // d2406}407 408// DQ-Form: [PO T RA DQ TX XO] or [PO S RA DQ SX XO]409class DQ_RD6_RS5_DQ12<bits<6> opcode, bits<3> xo, dag OOL, dag IOL,410 string asmstr, InstrItinClass itin, list<dag> pattern>411 : I<opcode, OOL, IOL, asmstr, itin>, MemriOp {412 bits<6> XT;413 bits<5> RA;414 bits<12> DQ;415 416 let Pattern = pattern;417 418 let Inst{6...10} = XT{4...0};419 let Inst{11...15} = RA;420 let Inst{16...27} = DQ;421 let Inst{28} = XT{5};422 let Inst{29...31} = xo;423}424 425class DQForm_RTp5_RA17_MEM<bits<6> opcode, bits<4> xo, dag OOL, dag IOL,426 string asmstr, InstrItinClass itin,427 list<dag> pattern>428 : I<opcode, OOL, IOL, asmstr, itin>, MemriOp {429 bits<5> RTp;430 bits<5> RA;431 bits<12> DQ;432 let Pattern = pattern;433 434 let Inst{6...10} = RTp{4...0};435 let Inst{11...15} = RA;436 let Inst{16...27} = DQ;437 let Inst{28...31} = xo;438}439 440// 1.7.6 X-Form441class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 442 InstrItinClass itin, list<dag> pattern>443 : I<opcode, OOL, IOL, asmstr, itin> {444 bits<5> RST;445 bits<5> RA;446 bits<5> RB;447 448 let Pattern = pattern;449 450 bit RC = 0; // set by isRecordForm451 452 let Inst{6...10} = RST;453 let Inst{11...15} = RA;454 let Inst{16...20} = RB;455 let Inst{21...30} = xo;456 let Inst{31} = RC;457}458 459class XForm_base_r3xo_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,460 string asmstr, InstrItinClass itin,461 list<dag> pattern>462 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>, XFormMemOp;463 464class XForm_tlb<bits<10> xo, dag OOL, dag IOL, string asmstr,465 InstrItinClass itin> : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, []> {466 let RST = 0;467}468 469class XForm_tlbilx<bits<10> xo, dag OOL, dag IOL, string asmstr,470 InstrItinClass itin> : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, []> {471 bits<5> T;472 let RST = T;473}474 475class XForm_attn<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,476 InstrItinClass itin>477 : I<opcode, OOL, IOL, asmstr, itin> {478 let Inst{21...30} = xo;479}480 481// This is the same as XForm_base_r3xo, but the first two operands are swapped482// when code is emitted.483class XForm_base_r3xo_swapped484 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,485 InstrItinClass itin> 486 : I<opcode, OOL, IOL, asmstr, itin> {487 bits<5> RA;488 bits<5> RST;489 bits<5> RB;490 491 bit RC = 0; // set by isRecordForm492 493 let Inst{6...10} = RST;494 let Inst{11...15} = RA;495 let Inst{16...20} = RB;496 let Inst{21...30} = xo;497 let Inst{31} = RC;498}499 500 501class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,502 InstrItinClass itin, list<dag> pattern>503 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;504 505class XForm_1_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,506 InstrItinClass itin, list<dag> pattern>507 : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern>;508 509class XForm_1a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,510 InstrItinClass itin, list<dag> pattern>511 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {512 let RST = 0;513}514 515class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,516 InstrItinClass itin, list<dag> pattern>517 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {518 let RA = 0;519 let RB = 0;520}521 522class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,523 InstrItinClass itin, list<dag> pattern>524 : I<opcode, OOL, IOL, asmstr, itin> {525 bits<5> RST;526 bits<5> RA;527 bits<1> WS;528 529 let Pattern = pattern;530 531 let Inst{6...10} = RST;532 let Inst{11...15} = RA;533 let Inst{20} = WS;534 let Inst{21...30} = xo;535 let Inst{31} = 0;536}537 538class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,539 InstrItinClass itin, list<dag> pattern> 540 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {541 let Pattern = pattern;542}543 544class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,545 InstrItinClass itin, list<dag> pattern> 546 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;547 548class XForm_8_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,549 InstrItinClass itin, list<dag> pattern> 550 : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern>;551 552class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,553 InstrItinClass itin, list<dag> pattern> 554 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {555 let Pattern = pattern;556}557 558class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,559 InstrItinClass itin, list<dag> pattern> 560 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {561 let RB = 0;562 let Pattern = pattern;563}564 565class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,566 InstrItinClass itin>567 : I<opcode, OOL, IOL, asmstr, itin> {568 bits<3> BF;569 bits<1> L;570 bits<5> RA;571 bits<5> RB;572 573 let Inst{6...8} = BF;574 let Inst{9} = 0;575 let Inst{10} = L;576 let Inst{11...15} = RA;577 let Inst{16...20} = RB;578 let Inst{21...30} = xo;579 let Inst{31} = 0;580}581 582class XForm_icbt<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,583 InstrItinClass itin>584 : I<opcode, OOL, IOL, asmstr, itin> {585 bits<4> CT;586 bits<5> RA;587 bits<5> RB;588 589 let Inst{6} = 0;590 let Inst{7...10} = CT;591 let Inst{11...15} = RA;592 let Inst{16...20} = RB;593 let Inst{21...30} = xo;594 let Inst{31} = 0;595}596 597class XForm_sr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,598 InstrItinClass itin>599 : I<opcode, OOL, IOL, asmstr, itin> {600 bits<5> RS;601 bits<4> SR;602 603 let Inst{6...10} = RS;604 let Inst{12...15} = SR;605 let Inst{21...30} = xo;606}607 608class XForm_mbar<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,609 InstrItinClass itin>610 : I<opcode, OOL, IOL, asmstr, itin> {611 bits<5> MO;612 613 let Inst{6...10} = MO;614 let Inst{21...30} = xo;615}616 617class XForm_srin<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,618 InstrItinClass itin>619 : I<opcode, OOL, IOL, asmstr, itin> {620 bits<5> RS;621 bits<5> RB;622 623 let Inst{6...10} = RS;624 let Inst{16...20} = RB;625 let Inst{21...30} = xo;626}627 628class XForm_mtmsr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,629 InstrItinClass itin>630 : I<opcode, OOL, IOL, asmstr, itin> {631 bits<5> RS;632 bits<1> L;633 634 let Inst{6...10} = RS;635 let Inst{15} = L;636 let Inst{21...30} = xo;637}638 639class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,640 InstrItinClass itin>641 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> {642 let L = PPC64;643}644 645class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,646 InstrItinClass itin>647 : I<opcode, OOL, IOL, asmstr, itin> {648 bits<3> BF;649 bits<5> RA;650 bits<5> RB;651 652 let Inst{6...8} = BF;653 let Inst{9...10} = 0;654 let Inst{11...15} = RA;655 let Inst{16...20} = RB;656 let Inst{21...30} = xo;657 let Inst{31} = 0;658}659 660class XForm_17a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,661 InstrItinClass itin, list<dag> pattern>662 : XForm_17<opcode, xo, OOL, IOL, asmstr, itin > {663 let RA = 0;664 let Pattern = pattern;665}666 667class XForm_18<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,668 InstrItinClass itin, list<dag> pattern>669 : I<opcode, OOL, IOL, asmstr, itin> {670 bits<5> FRT;671 bits<5> FRA;672 bits<5> FRB;673 674 let Pattern = pattern;675 676 let Inst{6...10} = FRT;677 let Inst{11...15} = FRA;678 let Inst{16...20} = FRB;679 let Inst{21...30} = xo;680 let Inst{31} = 0;681}682 683class XForm_19<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,684 InstrItinClass itin, list<dag> pattern> 685 : XForm_18<opcode, xo, OOL, IOL, asmstr, itin, pattern> {686 let FRA = 0;687}688 689class XForm_20<bits<6> opcode, bits<6> xo, dag OOL, dag IOL, string asmstr,690 InstrItinClass itin, list<dag> pattern>691 : I<opcode, OOL, IOL, asmstr, itin> {692 bits<5> FRT;693 bits<5> FRA;694 bits<5> FRB;695 bits<4> tttt;696 697 let Pattern = pattern;698 699 let Inst{6...10} = FRT;700 let Inst{11...15} = FRA;701 let Inst{16...20} = FRB;702 let Inst{21...24} = tttt;703 let Inst{25...30} = xo;704 let Inst{31} = 0;705}706 707class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,708 InstrItinClass itin, list<dag> pattern> 709 : I<opcode, OOL, IOL, asmstr, itin> {710 let Pattern = pattern;711 let Inst{6...10} = 31;712 let Inst{11...15} = 0;713 let Inst{16...20} = 0;714 let Inst{21...30} = xo;715 let Inst{31} = 0;716}717 718class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,719 string asmstr, InstrItinClass itin, list<dag> pattern> 720 : I<opcode, OOL, IOL, asmstr, itin> {721 bits<2> L;722 723 let Pattern = pattern;724 let Inst{6...8} = 0;725 let Inst{9...10} = L;726 let Inst{11...15} = 0;727 let Inst{16...20} = 0;728 let Inst{21...30} = xo;729 let Inst{31} = 0;730}731 732class XForm_IMM2_IMM2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,733 string asmstr, InstrItinClass itin, list<dag> pattern>734 : I<opcode, OOL, IOL, asmstr, itin> {735 bits<2> L;736 bits<2> PL;737 738 let Pattern = pattern;739 let Inst{6...8} = 0;740 let Inst{9...10} = L;741 let Inst{11...13} = 0;742 let Inst{14...15} = PL;743 let Inst{16...20} = 0;744 let Inst{21...30} = xo;745 let Inst{31} = 0;746}747 748class XForm_IMM3_IMM2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,749 string asmstr, InstrItinClass itin, list<dag> pattern>750 : I<opcode, OOL, IOL, asmstr, itin> {751 bits<3> L;752 bits<2> SC;753 754 let Pattern = pattern;755 let Inst{6...7} = 0;756 let Inst{8...10} = L;757 let Inst{11...13} = 0;758 let Inst{14...15} = SC;759 let Inst{16...20} = 0;760 let Inst{21...30} = xo;761 let Inst{31} = 0;762}763 764class XForm_24_eieio<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,765 string asmstr, InstrItinClass itin, list<dag> pattern>766 : XForm_24_sync<opcode, xo, OOL, IOL, asmstr, itin, pattern> {767 let L = 0;768}769 770class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,771 InstrItinClass itin, list<dag> pattern>772 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {773}774 775class XForm_25_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,776 string asmstr, InstrItinClass itin, list<dag> pattern>777 : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern> {778}779 780// [PO RT /// RB XO RC]781class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,782 InstrItinClass itin, list<dag> pattern>783 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {784 let RA = 0;785}786 787class XForm_28_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,788 string asmstr, InstrItinClass itin, list<dag> pattern>789 : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern> {790}791 792class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,793 InstrItinClass itin, list<dag> pattern>794 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {795}796 797// This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of798// numbers presumably relates to some document, but I haven't found it.799class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,800 InstrItinClass itin, list<dag> pattern>801 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {802 let Pattern = pattern;803 804 bit RC = 0; // set by isRecordForm805 806 let Inst{6...10} = RST;807 let Inst{11...20} = 0;808 let Inst{21...30} = xo;809 let Inst{31} = RC;810}811class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,812 InstrItinClass itin, list<dag> pattern>813 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {814 let Pattern = pattern;815 bits<5> FM;816 817 bit RC = 0; // set by isRecordForm818 819 let Inst{6...10} = FM;820 let Inst{11...20} = 0;821 let Inst{21...30} = xo;822 let Inst{31} = RC;823}824 825class XForm_44<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,826 InstrItinClass itin>827 : I<opcode, OOL, IOL, asmstr, itin> {828 bits<5> RT;829 bits<3> BFA;830 831 let Inst{6...10} = RT;832 let Inst{11...13} = BFA;833 let Inst{14...15} = 0;834 let Inst{16...20} = 0;835 let Inst{21...30} = xo;836 let Inst{31} = 0;837}838 839class XForm_45<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,840 InstrItinClass itin>841 : I<opcode, OOL, IOL, asmstr, itin> {842 bits<5> RT;843 bits<2> L;844 845 let Inst{6...10} = RT;846 let Inst{11...13} = 0;847 let Inst{14...15} = L;848 let Inst{16...20} = 0;849 let Inst{21...30} = xo;850 let Inst{31} = 0;851}852 853class XForm_RSB5_UIMM2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,854 string asmstr, list<dag> pattern>855 : I<opcode, OOL, IOL, asmstr, NoItinerary> {856 857 bits<5> RS;858 bits<5> RB;859 bits<2> RIC;860 861 let Pattern = pattern;862 863 let Inst{6...10} = RS;864 let Inst{11} = 0;865 let Inst{12...13} = RIC;866 let Inst{14...15} = 0;867 let Inst{16...20} = RB;868 let Inst{21...30} = xo;869 let Inst{31} = 0;870}871 872class XForm_RSB5_UIMM2_2UIMM1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,873 string asmstr, list<dag> pattern>874 : XForm_RSB5_UIMM2<opcode, xo, OOL, IOL, asmstr, pattern> {875 876 bits<1> PRS;877 bits<1> R;878 879 let Inst{14} = PRS;880 let Inst{15} = R;881}882 883class X_FRT5_XO2_XO3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2, bits<10> xo,884 dag OOL, dag IOL, string asmstr, InstrItinClass itin,885 list<dag> pattern>886 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {887 let Pattern = pattern;888 889 let Inst{6...10} = RST;890 let Inst{11...12} = xo1;891 let Inst{13...15} = xo2;892 let Inst{16...20} = 0;893 let Inst{21...30} = xo;894 let Inst{31} = 0;895}896 897class X_FRT5_XO2_XO3_FRB5_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,898 bits<10> xo, dag OOL, dag IOL, string asmstr,899 InstrItinClass itin, list<dag> pattern>900 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {901 let Pattern = pattern;902 bits<5> FRB;903 904 let Inst{6...10} = RST;905 let Inst{11...12} = xo1;906 let Inst{13...15} = xo2;907 let Inst{16...20} = FRB;908 let Inst{21...30} = xo;909 let Inst{31} = 0;910}911 912class X_FRT5_XO2_XO3_DRM3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,913 bits<10> xo, dag OOL, dag IOL, string asmstr,914 InstrItinClass itin, list<dag> pattern>915 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {916 let Pattern = pattern;917 bits<3> DRM;918 919 let Inst{6...10} = RST;920 let Inst{11...12} = xo1;921 let Inst{13...15} = xo2;922 let Inst{16...17} = 0;923 let Inst{18...20} = DRM;924 let Inst{21...30} = xo;925 let Inst{31} = 0;926}927 928class X_FRT5_XO2_XO3_RM2_X10<bits<6> opcode, bits<2> xo1, bits<3> xo2,929 bits<10> xo, dag OOL, dag IOL, string asmstr,930 InstrItinClass itin, list<dag> pattern>931 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {932 let Pattern = pattern;933 bits<2> RM;934 935 let Inst{6...10} = RST;936 let Inst{11...12} = xo1;937 let Inst{13...15} = xo2;938 let Inst{16...18} = 0;939 let Inst{19...20} = RM;940 let Inst{21...30} = xo;941 let Inst{31} = 0;942}943 944 945class XForm_0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,946 InstrItinClass itin, list<dag> pattern>947 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {948 let RST = 0;949 let RA = 0;950 let RB = 0;951}952 953class XForm_16b<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,954 InstrItinClass itin, list<dag> pattern>955 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {956 let RST = 0;957 let RA = 0;958}959 960class XForm_htm0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,961 string asmstr, InstrItinClass itin>962 : I<opcode, OOL, IOL, asmstr, itin> {963 bit R;964 965 bit RC = 1;966 967 let Inst{6...9} = 0;968 let Inst{10} = R;969 let Inst{11...20} = 0;970 let Inst{21...30} = xo;971 let Inst{31} = RC;972}973 974class XForm_htm1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,975 string asmstr, InstrItinClass itin>976 : I<opcode, OOL, IOL, asmstr, itin> {977 bit A;978 979 bit RC = 1;980 981 let Inst{6} = A;982 let Inst{7...20} = 0;983 let Inst{21...30} = xo;984 let Inst{31} = RC;985}986 987class XForm_htm2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,988 InstrItinClass itin>989 : I<opcode, OOL, IOL, asmstr, itin> {990 bit L;991 992 bit RC = 0; // set by isRecordForm993 994 let Inst{7...9} = 0;995 let Inst{10} = L;996 let Inst{11...20} = 0;997 let Inst{21...30} = xo;998 let Inst{31} = RC;999}1000 1001class XForm_htm3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1002 InstrItinClass itin>1003 : I<opcode, OOL, IOL, asmstr, itin> {1004 bits<3> BF;1005 1006 bit RC = 0;1007 1008 let Inst{6...8} = BF;1009 let Inst{9...20} = 0;1010 let Inst{21...30} = xo;1011 let Inst{31} = RC;1012}1013 1014// [PO RT RA RB XO /]1015class X_BF3_L1_RS5_RS5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1016 string asmstr, InstrItinClass itin, list<dag> pattern>1017 : I<opcode, OOL, IOL, asmstr, itin> {1018 bits<3> BF;1019 bits<1> L;1020 bits<5> RA;1021 bits<5> RB;1022 1023 let Pattern = pattern;1024 1025 let Inst{6...8} = BF;1026 let Inst{9} = 0;1027 let Inst{10} = L;1028 let Inst{11...15} = RA;1029 let Inst{16...20} = RB;1030 let Inst{21...30} = xo;1031 let Inst{31} = 0;1032}1033 1034// Same as XForm_17 but with GPR's and new naming convention1035class X_BF3_RS5_RS5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1036 string asmstr, InstrItinClass itin, list<dag> pattern>1037 : I<opcode, OOL, IOL, asmstr, itin> {1038 bits<3> BF;1039 bits<5> RA;1040 bits<5> RB;1041 1042 let Pattern = pattern;1043 1044 let Inst{6...8} = BF;1045 let Inst{9...10} = 0;1046 let Inst{11...15} = RA;1047 let Inst{16...20} = RB;1048 let Inst{21...30} = xo;1049 let Inst{31} = 0;1050}1051 1052// e.g. [PO VRT XO VRB XO /] or [PO VRT XO VRB XO RO]1053class X_RD5_XO5_RS5<bits<6> opcode, bits<5> xo2, bits<10> xo, dag OOL, dag IOL,1054 string asmstr, InstrItinClass itin, list<dag> pattern>1055 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1056 let RA = xo2;1057}1058 1059class X_BF3_DCMX7_RS5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1060 string asmstr, InstrItinClass itin, list<dag> pattern>1061 : I<opcode, OOL, IOL, asmstr, itin> {1062 bits<3> BF;1063 bits<7> DCMX;1064 bits<5> VB;1065 1066 let Pattern = pattern;1067 1068 let Inst{6...8} = BF;1069 let Inst{9...15} = DCMX;1070 let Inst{16...20} = VB;1071 let Inst{21...30} = xo;1072 let Inst{31} = 0;1073}1074 1075class X_RD6_IMM8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1076 string asmstr, InstrItinClass itin, list<dag> pattern>1077 : I<opcode, OOL, IOL, asmstr, itin> {1078 bits<6> XT;1079 bits<8> IMM8;1080 1081 let Pattern = pattern;1082 1083 let Inst{6...10} = XT{4...0};1084 let Inst{11...12} = 0;1085 let Inst{13...20} = IMM8;1086 let Inst{21...30} = xo;1087 let Inst{31} = XT{5};1088}1089 1090// XForm_base_r3xo for instructions such as P9 atomics where we don't want1091// to specify an SDAG pattern for matching.1092class X_RD5_RS5_IM5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1093 string asmstr, InstrItinClass itin>1094 : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, []> {1095}1096 1097class X_BF3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1098 InstrItinClass itin>1099 : XForm_17<opcode, xo, OOL, IOL, asmstr, itin> {1100 let RA = 0;1101 let RB = 0;1102}1103 1104// [PO /// L RA RB XO /]1105class X_L1_RS5_RS5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1106 string asmstr, InstrItinClass itin, list<dag> pattern>1107 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> {1108 let BF = 0;1109 let Pattern = pattern;1110 1111 bit RC = 0;1112 let Inst{31} = RC;1113}1114 1115// XX*-Form (VSX)1116class XX1Form<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1117 InstrItinClass itin, list<dag> pattern>1118 : I<opcode, OOL, IOL, asmstr, itin> {1119 bits<6> XT;1120 bits<5> RA;1121 bits<5> RB;1122 1123 let Pattern = pattern;1124 1125 let Inst{6...10} = XT{4...0};1126 let Inst{11...15} = RA;1127 let Inst{16...20} = RB;1128 let Inst{21...30} = xo;1129 let Inst{31} = XT{5};1130}1131 1132class XX1Form_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1133 string asmstr, InstrItinClass itin, list<dag> pattern>1134 : XX1Form<opcode, xo, OOL, IOL, asmstr, itin, pattern>, XFormMemOp;1135 1136class XX1_RS6_RD5_XO<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1137 string asmstr, InstrItinClass itin, list<dag> pattern>1138 : XX1Form<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1139 let RB = 0;1140}1141 1142class XX2Form<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 1143 InstrItinClass itin, list<dag> pattern>1144 : I<opcode, OOL, IOL, asmstr, itin> {1145 bits<6> XT;1146 bits<6> XB;1147 1148 let Pattern = pattern;1149 1150 let Inst{6...10} = XT{4...0};1151 let Inst{11...15} = 0;1152 let Inst{16...20} = XB{4...0};1153 let Inst{21...29} = xo;1154 let Inst{30} = XB{5};1155 let Inst{31} = XT{5};1156}1157 1158class XX2Form_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 1159 InstrItinClass itin, list<dag> pattern>1160 : I<opcode, OOL, IOL, asmstr, itin> {1161 bits<3> CR;1162 bits<6> XB;1163 1164 let Pattern = pattern;1165 1166 let Inst{6...8} = CR;1167 let Inst{9...15} = 0;1168 let Inst{16...20} = XB{4...0};1169 let Inst{21...29} = xo;1170 let Inst{30} = XB{5};1171 let Inst{31} = 0;1172}1173 1174class XX2Form_2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 1175 InstrItinClass itin, list<dag> pattern>1176 : I<opcode, OOL, IOL, asmstr, itin> {1177 bits<6> XT;1178 bits<6> XB;1179 bits<2> D;1180 1181 let Pattern = pattern;1182 1183 let Inst{6...10} = XT{4...0};1184 let Inst{11...13} = 0;1185 let Inst{14...15} = D;1186 let Inst{16...20} = XB{4...0};1187 let Inst{21...29} = xo;1188 let Inst{30} = XB{5};1189 let Inst{31} = XT{5};1190}1191 1192class XX2_RD6_UIM5_RS6<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,1193 string asmstr, InstrItinClass itin, list<dag> pattern>1194 : I<opcode, OOL, IOL, asmstr, itin> {1195 bits<6> XT;1196 bits<6> XB;1197 bits<5> UIM5;1198 1199 let Pattern = pattern;1200 1201 let Inst{6...10} = XT{4...0};1202 let Inst{11...15} = UIM5;1203 let Inst{16...20} = XB{4...0};1204 let Inst{21...29} = xo;1205 let Inst{30} = XB{5};1206 let Inst{31} = XT{5};1207}1208 1209// [PO T XO B XO BX /]1210class XX2_RD5_XO5_RS6<bits<6> opcode, bits<5> xo2, bits<9> xo, dag OOL, dag IOL,1211 string asmstr, InstrItinClass itin, list<dag> pattern>1212 : I<opcode, OOL, IOL, asmstr, itin> {1213 bits<5> RT;1214 bits<6> XB;1215 1216 let Pattern = pattern;1217 1218 let Inst{6...10} = RT;1219 let Inst{11...15} = xo2;1220 let Inst{16...20} = XB{4...0};1221 let Inst{21...29} = xo;1222 let Inst{30} = XB{5};1223 let Inst{31} = 0;1224}1225 1226// [PO T XO B XO BX TX]1227class XX2_RD6_XO5_RS6<bits<6> opcode, bits<5> xo2, bits<9> xo, dag OOL, dag IOL,1228 string asmstr, InstrItinClass itin, list<dag> pattern>1229 : I<opcode, OOL, IOL, asmstr, itin> {1230 bits<6> XT;1231 bits<6> XB;1232 1233 let Pattern = pattern;1234 1235 let Inst{6...10} = XT{4...0};1236 let Inst{11...15} = xo2;1237 let Inst{16...20} = XB{4...0};1238 let Inst{21...29} = xo;1239 let Inst{30} = XB{5};1240 let Inst{31} = XT{5};1241}1242 1243class XX2_BF3_DCMX7_RS6<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,1244 string asmstr, InstrItinClass itin, list<dag> pattern>1245 : I<opcode, OOL, IOL, asmstr, itin> {1246 bits<3> BF;1247 bits<7> DCMX;1248 bits<6> XB;1249 1250 let Pattern = pattern;1251 1252 let Inst{6...8} = BF;1253 let Inst{9...15} = DCMX;1254 let Inst{16...20} = XB{4...0};1255 let Inst{21...29} = xo;1256 let Inst{30} = XB{5};1257 let Inst{31} = 0;1258}1259 1260class XX2_RD6_DCMX7_RS6<bits<6> opcode, bits<4> xo1, bits<3> xo2,1261 dag OOL, dag IOL, string asmstr, InstrItinClass itin,1262 list<dag> pattern>1263 : I<opcode, OOL, IOL, asmstr, itin> {1264 bits<6> XT;1265 bits<7> DCMX;1266 bits<6> XB;1267 1268 let Pattern = pattern;1269 1270 let Inst{6...10} = XT{4...0};1271 let Inst{11...15} = DCMX{4...0};1272 let Inst{16...20} = XB{4...0};1273 let Inst{21...24} = xo1;1274 let Inst{25} = DCMX{6};1275 let Inst{26...28} = xo2;1276 let Inst{29} = DCMX{5};1277 let Inst{30} = XB{5};1278 let Inst{31} = XT{5};1279}1280 1281class XForm_XD6_RA5_RB5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1282 string asmstr, InstrItinClass itin, list<dag> pattern>1283 : I<opcode, OOL, IOL, asmstr, itin>, MemriOp {1284 bits<5> RA;1285 bits<6> D;1286 bits<5> RB;1287 1288 let Pattern = pattern;1289 1290 let Inst{6...10} = D{4...0}; // D1291 let Inst{11...15} = RA;1292 let Inst{16...20} = RB;1293 let Inst{21...30} = xo;1294 let Inst{31} = D{5}; // DX1295}1296 1297class XForm_BF3_UIM6_FRB5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1298 string asmstr, InstrItinClass itin, list<dag> pattern>1299 : I<opcode, OOL, IOL, asmstr, itin> {1300 bits<3> BF;1301 bits<6> UIM;1302 bits<5> FRB;1303 1304 let Pattern = pattern;1305 1306 let Inst{6...8} = BF;1307 let Inst{9} = 0;1308 let Inst{10...15} = UIM;1309 let Inst{16...20} = FRB;1310 let Inst{21...30} = xo;1311 let Inst{31} = 0;1312}1313 1314class XForm_SP2_FRTB5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1315 list<dag> pattern, InstrItinClass itin>1316 : I<opcode, OOL, IOL, asmstr, itin> {1317 bits<2> SP;1318 bits<5> FRT;1319 bits<5> FRB;1320 1321 let Pattern = pattern;1322 1323 bit RC = 0; // set by isRecordForm1324 1325 let Inst{6...10} = FRT;1326 let Inst{11...12} = SP;1327 let Inst{13...15} = 0;1328 let Inst{16...20} = FRB;1329 let Inst{21...30} = xo;1330 let Inst{31} = RC;1331}1332 1333class XForm_S1_FRTB5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,1334 string asmstr, list<dag> pattern, InstrItinClass itin>1335 : I<opcode, OOL, IOL, asmstr, itin> {1336 bit S;1337 bits<5> FRT;1338 bits<5> FRB;1339 1340 let Pattern = pattern;1341 1342 bit RC = 0; // set by isRecordForm1343 1344 let Inst{6...10} = FRT;1345 let Inst{11} = S;1346 let Inst{12...15} = 0;1347 let Inst{16...20} = FRB;1348 let Inst{21...30} = xo;1349 let Inst{31} = RC;1350}1351 1352class XX3Form<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1353 InstrItinClass itin, list<dag> pattern>1354 : I<opcode, OOL, IOL, asmstr, itin> {1355 bits<6> XT;1356 bits<6> XA;1357 bits<6> XB;1358 1359 let Pattern = pattern;1360 1361 let Inst{6...10} = XT{4...0};1362 let Inst{11...15} = XA{4...0};1363 let Inst{16...20} = XB{4...0};1364 let Inst{21...28} = xo;1365 let Inst{29} = XA{5};1366 let Inst{30} = XB{5};1367 let Inst{31} = XT{5};1368}1369 1370class XX3Form_SameOp<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,1371 InstrItinClass itin, list<dag> pattern>1372 : XX3Form<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1373 let XA = XT;1374 let XB = XT;1375}1376 1377class XX3Form_1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1378 InstrItinClass itin, list<dag> pattern>1379 : I<opcode, OOL, IOL, asmstr, itin> {1380 bits<3> CR;1381 bits<6> XA;1382 bits<6> XB;1383 1384 let Pattern = pattern;1385 1386 let Inst{6...8} = CR;1387 let Inst{9...10} = 0;1388 let Inst{11...15} = XA{4...0};1389 let Inst{16...20} = XB{4...0};1390 let Inst{21...28} = xo;1391 let Inst{29} = XA{5};1392 let Inst{30} = XB{5};1393 let Inst{31} = 0;1394}1395 1396class XX3Form_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1397 InstrItinClass itin, list<dag> pattern>1398 : I<opcode, OOL, IOL, asmstr, itin> {1399 bits<6> XT;1400 bits<6> XA;1401 bits<6> XB;1402 bits<2> D;1403 1404 let Pattern = pattern;1405 1406 let Inst{6...10} = XT{4...0};1407 let Inst{11...15} = XA{4...0};1408 let Inst{16...20} = XB{4...0};1409 let Inst{21} = 0;1410 let Inst{22...23} = D;1411 let Inst{24...28} = xo;1412 let Inst{29} = XA{5};1413 let Inst{30} = XB{5};1414 let Inst{31} = XT{5};1415}1416 1417class XX3Form_Rc<bits<6> opcode, bits<7> xo, dag OOL, dag IOL, string asmstr, 1418 InstrItinClass itin, list<dag> pattern>1419 : I<opcode, OOL, IOL, asmstr, itin> {1420 bits<6> XT;1421 bits<6> XA;1422 bits<6> XB;1423 1424 let Pattern = pattern;1425 1426 bit RC = 0; // set by isRecordForm1427 1428 let Inst{6...10} = XT{4...0};1429 let Inst{11...15} = XA{4...0};1430 let Inst{16...20} = XB{4...0};1431 let Inst{21} = RC;1432 let Inst{22...28} = xo;1433 let Inst{29} = XA{5};1434 let Inst{30} = XB{5};1435 let Inst{31} = XT{5};1436}1437 1438class XX4Form<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 1439 InstrItinClass itin, list<dag> pattern>1440 : I<opcode, OOL, IOL, asmstr, itin> {1441 bits<6> XT;1442 bits<6> XA;1443 bits<6> XB;1444 bits<6> XC;1445 1446 let Pattern = pattern;1447 1448 let Inst{6...10} = XT{4...0};1449 let Inst{11...15} = XA{4...0};1450 let Inst{16...20} = XB{4...0};1451 let Inst{21...25} = XC{4...0};1452 let Inst{26...27} = xo;1453 let Inst{28} = XC{5};1454 let Inst{29} = XA{5};1455 let Inst{30} = XB{5};1456 let Inst{31} = XT{5};1457}1458 1459// DCB_Form - Form X instruction, used for dcb* instructions.1460class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr, 1461 InstrItinClass itin, list<dag> pattern>1462 : I<31, OOL, IOL, asmstr, itin> {1463 bits<5> RA;1464 bits<5> RB;1465 1466 let Pattern = pattern;1467 1468 let Inst{6...10} = immfield;1469 let Inst{11...15} = RA;1470 let Inst{16...20} = RB;1471 let Inst{21...30} = xo;1472 let Inst{31} = 0;1473}1474 1475class DCB_Form_hint<bits<10> xo, dag OOL, dag IOL, string asmstr,1476 InstrItinClass itin, list<dag> pattern>1477 : I<31, OOL, IOL, asmstr, itin> {1478 bits<5> TH;1479 bits<5> RA;1480 bits<5> RB;1481 1482 let Pattern = pattern;1483 1484 let Inst{6...10} = TH;1485 let Inst{11...15} = RA;1486 let Inst{16...20} = RB;1487 let Inst{21...30} = xo;1488 let Inst{31} = 0;1489}1490 1491// DSS_Form - Form X instruction, used for altivec dss* instructions.1492class DSS_Form<bits<1> T, bits<10> xo, dag OOL, dag IOL, string asmstr,1493 InstrItinClass itin, list<dag> pattern>1494 : I<31, OOL, IOL, asmstr, itin> {1495 bits<2> STRM;1496 bits<5> RA;1497 bits<5> RB;1498 1499 let Pattern = pattern;1500 1501 let Inst{6} = T;1502 let Inst{7...8} = 0;1503 let Inst{9...10} = STRM;1504 let Inst{11...15} = RA;1505 let Inst{16...20} = RB;1506 let Inst{21...30} = xo;1507 let Inst{31} = 0;1508}1509 1510// 1.7.7 XL-Form1511class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1512 InstrItinClass itin, list<dag> pattern>1513 : I<opcode, OOL, IOL, asmstr, itin> {1514 bits<5> CRD;1515 bits<5> CRA;1516 bits<5> CRB;1517 1518 let Pattern = pattern;1519 1520 let Inst{6...10} = CRD;1521 let Inst{11...15} = CRA;1522 let Inst{16...20} = CRB;1523 let Inst{21...30} = xo;1524 let Inst{31} = 0;1525}1526 1527// XL-Form for unary alias for CRNOR (CRNOT)1528class XLForm_1s<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1529 InstrItinClass itin, list<dag> pattern>1530 : XLForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1531 let CRB = CRA;1532}1533 1534class XLForm_1_np<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1535 InstrItinClass itin, list<dag> pattern>1536 : XLForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1537 let CRD = 0;1538 let CRA = 0;1539 let CRB = 0;1540}1541 1542class XLForm_1_gen<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1543 InstrItinClass itin, list<dag> pattern>1544 : XLForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1545 bits<5> RT;1546 bits<5> RB;1547 1548 let CRD = RT;1549 let CRA = 0;1550 let CRB = RB;1551}1552 1553class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1554 InstrItinClass itin, list<dag> pattern>1555 : I<opcode, OOL, IOL, asmstr, itin> {1556 bits<5> CRD;1557 1558 let Pattern = pattern;1559 1560 let Inst{6...10} = CRD;1561 let Inst{11...15} = CRD;1562 let Inst{16...20} = CRD;1563 let Inst{21...30} = xo;1564 let Inst{31} = 0;1565}1566 1567class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr, 1568 InstrItinClass itin, list<dag> pattern>1569 : I<opcode, OOL, IOL, asmstr, itin> {1570 bits<5> BO;1571 bits<5> BI;1572 bits<2> BH;1573 1574 let Pattern = pattern;1575 1576 let Inst{6...10} = BO;1577 let Inst{11...15} = BI;1578 let Inst{16...18} = 0;1579 let Inst{19...20} = BH;1580 let Inst{21...30} = xo;1581 let Inst{31} = lk;1582}1583 1584class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,1585 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>1586 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {1587 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.1588 bits<3> CR;1589 1590 let BO = BIBO{4...0};1591 let BI{0...1} = BIBO{5...6};1592 let BI{2...4} = CR{0...2};1593 let BH = 0;1594}1595 1596class XLForm_2_br2<bits<6> opcode, bits<10> xo, bits<5> bo, bit lk,1597 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>1598 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {1599 let BO = bo;1600 let BH = 0;1601}1602 1603class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,1604 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>1605 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {1606 let BO = bo;1607 let BI = bi;1608 let BH = 0;1609}1610 1611class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1612 InstrItinClass itin>1613 : I<opcode, OOL, IOL, asmstr, itin> {1614 bits<3> BF;1615 bits<3> BFA;1616 1617 let Inst{6...8} = BF;1618 let Inst{9...10} = 0;1619 let Inst{11...13} = BFA;1620 let Inst{14...15} = 0;1621 let Inst{16...20} = 0;1622 let Inst{21...30} = xo;1623 let Inst{31} = 0;1624}1625 1626class XLForm_4<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1627 InstrItinClass itin>1628 : I<opcode, OOL, IOL, asmstr, itin> {1629 bits<3> BF;1630 bit W;1631 bits<4> U;1632 1633 bit RC = 0;1634 1635 let Inst{6...8} = BF;1636 let Inst{9...10} = 0;1637 let Inst{11...14} = 0;1638 let Inst{15} = W;1639 let Inst{16...19} = U;1640 let Inst{20} = 0;1641 let Inst{21...30} = xo;1642 let Inst{31} = RC;1643}1644 1645class XLForm_S<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1646 InstrItinClass itin, list<dag> pattern>1647 : I<opcode, OOL, IOL, asmstr, itin> {1648 bits<1> S;1649 1650 let Pattern = pattern;1651 1652 let Inst{6...19} = 0;1653 let Inst{20} = S;1654 let Inst{21...30} = xo;1655 let Inst{31} = 0;1656}1657 1658class XLForm_2_and_DSForm_1<bits<6> opcode1, bits<10> xo1, bit lk,1659 bits<6> opcode2, bits<2> xo2,1660 dag OOL, dag IOL, string asmstr,1661 InstrItinClass itin, list<dag> pattern>1662 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {1663 bits<5> BO;1664 bits<5> BI;1665 bits<2> BH;1666 1667 bits<5> RST;1668 bits<5> RA;1669 bits<14> D;1670 1671 let Pattern = pattern;1672 1673 let Inst{6...10} = BO;1674 let Inst{11...15} = BI;1675 let Inst{16...18} = 0;1676 let Inst{19...20} = BH;1677 let Inst{21...30} = xo1;1678 let Inst{31} = lk;1679 1680 let Inst{38...42} = RST;1681 let Inst{43...47} = RA;1682 let Inst{48...61} = D;1683 let Inst{62...63} = xo2;1684}1685 1686class XLForm_2_ext_and_DSForm_1<bits<6> opcode1, bits<10> xo1,1687 bits<5> bo, bits<5> bi, bit lk,1688 bits<6> opcode2, bits<2> xo2,1689 dag OOL, dag IOL, string asmstr,1690 InstrItinClass itin, list<dag> pattern>1691 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2,1692 OOL, IOL, asmstr, itin, pattern> {1693 let BO = bo;1694 let BI = bi;1695 let BH = 0;1696}1697 1698class XLForm_2_ext_and_DForm_1<bits<6> opcode1, bits<10> xo1, bits<5> bo,1699 bits<5> bi, bit lk, bits<6> opcode2, dag OOL,1700 dag IOL, string asmstr, InstrItinClass itin,1701 list<dag> pattern>1702 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {1703 1704 bits<5> RST;1705 bits<5> RA;1706 bits<16> D;1707 1708 let Pattern = pattern;1709 1710 let Inst{6...10} = bo;1711 let Inst{11...15} = bi;1712 let Inst{16...18} = 0;1713 let Inst{19...20} = 0; // Unused (BH)1714 let Inst{21...30} = xo1;1715 let Inst{31} = lk;1716 1717 let Inst{38...42} = RST;1718 let Inst{43...47} = RA;1719 let Inst{48...63} = D;1720}1721 1722// 1.7.8 XFX-Form1723class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1724 InstrItinClass itin>1725 : I<opcode, OOL, IOL, asmstr, itin> {1726 bits<5> RST;1727 bits<10> SPR;1728 1729 let Inst{6...10} = RST;1730 let Inst{11} = SPR{4};1731 let Inst{12} = SPR{3};1732 let Inst{13} = SPR{2};1733 let Inst{14} = SPR{1};1734 let Inst{15} = SPR{0};1735 let Inst{16} = SPR{9};1736 let Inst{17} = SPR{8};1737 let Inst{18} = SPR{7};1738 let Inst{19} = SPR{6};1739 let Inst{20} = SPR{5};1740 let Inst{21...30} = xo;1741 let Inst{31} = 0;1742}1743 1744class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 1745 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 1746 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> {1747 let SPR = spr;1748}1749 1750class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1751 InstrItinClass itin>1752 : I<opcode, OOL, IOL, asmstr, itin> {1753 bits<5> RT;1754 1755 let Inst{6...10} = RT;1756 let Inst{11...20} = 0;1757 let Inst{21...30} = xo;1758 let Inst{31} = 0;1759}1760 1761class XFXForm_3p<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1762 InstrItinClass itin, list<dag> pattern>1763 : I<opcode, OOL, IOL, asmstr, itin> {1764 bits<5> RT;1765 bits<10> imm;1766 let Pattern = pattern;1767 1768 let Inst{6...10} = RT;1769 let Inst{11...20} = imm;1770 let Inst{21...30} = xo;1771 let Inst{31} = 0;1772}1773 1774class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1775 InstrItinClass itin>1776 : I<opcode, OOL, IOL, asmstr, itin> {1777 bits<8> FXM;1778 bits<5> RST;1779 1780 let Inst{6...10} = RST;1781 let Inst{11} = 0;1782 let Inst{12...19} = FXM;1783 let Inst{20} = 0;1784 let Inst{21...30} = xo;1785 let Inst{31} = 0;1786}1787 1788class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1789 InstrItinClass itin>1790 : I<opcode, OOL, IOL, asmstr, itin> {1791 bits<5> RST;1792 bits<8> FXM;1793 1794 let Inst{6...10} = RST;1795 let Inst{11} = 1;1796 let Inst{12...19} = FXM;1797 let Inst{20} = 0;1798 let Inst{21...30} = xo;1799 let Inst{31} = 0;1800}1801 1802// XFL-Form - MTFSF1803// This is probably 1.7.9, but I don't have the reference that uses this1804// numbering scheme...1805class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1806 InstrItinClass itin, list<dag>pattern>1807 : I<opcode, OOL, IOL, asmstr, itin> {1808 bits<8> FM;1809 bits<5> RT;1810 1811 bit RC = 0; // set by isRecordForm1812 let Pattern = pattern;1813 1814 let Inst{6} = 0;1815 let Inst{7...14} = FM;1816 let Inst{15} = 0;1817 let Inst{16...20} = RT;1818 let Inst{21...30} = xo;1819 let Inst{31} = RC;1820}1821 1822class XFLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,1823 InstrItinClass itin, list<dag>pattern>1824 : I<opcode, OOL, IOL, asmstr, itin> {1825 bit L;1826 bits<8> FLM;1827 bit W;1828 bits<5> FRB;1829 1830 bit RC = 0; // set by isRecordForm1831 let Pattern = pattern;1832 1833 let Inst{6} = L;1834 let Inst{7...14} = FLM;1835 let Inst{15} = W;1836 let Inst{16...20} = FRB;1837 let Inst{21...30} = xo;1838 let Inst{31} = RC;1839}1840 1841// 1.7.10 XS-Form - SRADI.1842class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,1843 InstrItinClass itin, list<dag> pattern>1844 : I<opcode, OOL, IOL, asmstr, itin> {1845 bits<5> RA;1846 bits<5> RS;1847 bits<6> SH;1848 1849 bit RC = 0; // set by isRecordForm1850 let Pattern = pattern;1851 1852 let Inst{6...10} = RS;1853 let Inst{11...15} = RA;1854 let Inst{16...20} = SH{4,3,2,1,0};1855 let Inst{21...29} = xo;1856 let Inst{30} = SH{5};1857 let Inst{31} = RC;1858}1859 1860// 1.7.11 XO-Form1861class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr,1862 InstrItinClass itin, list<dag> pattern>1863 : I<opcode, OOL, IOL, asmstr, itin> {1864 bits<5> RT;1865 bits<5> RA;1866 bits<5> RB;1867 1868 let Pattern = pattern;1869 1870 bit RC = 0; // set by isRecordForm1871 1872 let Inst{6...10} = RT;1873 let Inst{11...15} = RA;1874 let Inst{16...20} = RB;1875 let Inst{21} = oe;1876 let Inst{22...30} = xo;1877 let Inst{31} = RC; 1878}1879 1880class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, 1881 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>1882 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> {1883 let RB = 0;1884}1885 1886// 1.7.12 A-Form1887class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1888 InstrItinClass itin, list<dag> pattern>1889 : I<opcode, OOL, IOL, asmstr, itin> {1890 bits<5> FRT;1891 bits<5> FRA;1892 bits<5> FRC;1893 bits<5> FRB;1894 1895 let Pattern = pattern;1896 1897 bit RC = 0; // set by isRecordForm1898 1899 let Inst{6...10} = FRT;1900 let Inst{11...15} = FRA;1901 let Inst{16...20} = FRB;1902 let Inst{21...25} = FRC;1903 let Inst{26...30} = xo;1904 let Inst{31} = RC;1905}1906 1907class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,1908 InstrItinClass itin, list<dag> pattern>1909 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1910 let FRC = 0;1911}1912 1913class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,1914 InstrItinClass itin, list<dag> pattern> 1915 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {1916 let FRB = 0;1917}1918 1919class AForm_4<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1920 InstrItinClass itin, list<dag> pattern>1921 : I<opcode, OOL, IOL, asmstr, itin> {1922 bits<5> RT;1923 bits<5> RA;1924 bits<5> RB;1925 bits<5> COND;1926 1927 let Pattern = pattern;1928 1929 let Inst{6...10} = RT;1930 let Inst{11...15} = RA;1931 let Inst{16...20} = RB;1932 let Inst{21...25} = COND;1933 let Inst{26...30} = xo;1934 let Inst{31} = 0;1935}1936 1937// 1.7.13 M-Form1938class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,1939 InstrItinClass itin, list<dag> pattern>1940 : I<opcode, OOL, IOL, asmstr, itin> {1941 bits<5> RA;1942 bits<5> RS;1943 bits<5> RB;1944 bits<5> MB;1945 bits<5> ME;1946 1947 let Pattern = pattern;1948 1949 bit RC = 0; // set by isRecordForm1950 1951 let Inst{6...10} = RS;1952 let Inst{11...15} = RA;1953 let Inst{16...20} = RB;1954 let Inst{21...25} = MB;1955 let Inst{26...30} = ME;1956 let Inst{31} = RC;1957}1958 1959class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,1960 InstrItinClass itin, list<dag> pattern>1961 : I<opcode, OOL, IOL, asmstr, itin> {1962 bits<5> RA;1963 bits<5> RS;1964 bits<5> SH;1965 bits<5> MB;1966 bits<5> ME;1967 1968 let Pattern = pattern;1969 1970 bit RC = 0; // set by isRecordForm1971 1972 let Inst{6...10} = RS;1973 let Inst{11...15} = RA;1974 let Inst{16...20} = SH;1975 let Inst{21...25} = MB;1976 let Inst{26...30} = ME;1977 let Inst{31} = RC;1978}1979 1980// 1.7.14 MD-Form1981class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr,1982 InstrItinClass itin, list<dag> pattern>1983 : I<opcode, OOL, IOL, asmstr, itin> {1984 bits<5> RA;1985 bits<5> RS;1986 bits<6> SH;1987 bits<6> MBE;1988 1989 let Pattern = pattern;1990 1991 bit RC = 0; // set by isRecordForm1992 1993 let Inst{6...10} = RS;1994 let Inst{11...15} = RA;1995 let Inst{16...20} = SH{4,3,2,1,0};1996 let Inst{21...26} = MBE{4,3,2,1,0,5};1997 let Inst{27...29} = xo;1998 let Inst{30} = SH{5};1999 let Inst{31} = RC;2000}2001 2002class MDSForm_1<bits<6> opcode, bits<4> xo, dag OOL, dag IOL, string asmstr,2003 InstrItinClass itin, list<dag> pattern>2004 : I<opcode, OOL, IOL, asmstr, itin> {2005 bits<5> RA;2006 bits<5> RS;2007 bits<5> RB;2008 bits<6> MBE;2009 2010 let Pattern = pattern;2011 2012 bit RC = 0; // set by isRecordForm2013 2014 let Inst{6...10} = RS;2015 let Inst{11...15} = RA;2016 let Inst{16...20} = RB;2017 let Inst{21...26} = MBE{4,3,2,1,0,5};2018 let Inst{27...30} = xo;2019 let Inst{31} = RC;2020}2021 2022 2023// E-1 VA-Form2024 2025// VAForm_1 - DACB ordering.2026class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr,2027 InstrItinClass itin, list<dag> pattern>2028 : I<4, OOL, IOL, asmstr, itin> {2029 bits<5> RT;2030 bits<5> RA;2031 bits<5> RC;2032 bits<5> RB;2033 2034 let Pattern = pattern;2035 2036 let Inst{6...10} = RT;2037 let Inst{11...15} = RA;2038 let Inst{16...20} = RB;2039 let Inst{21...25} = RC;2040 let Inst{26...31} = xo;2041}2042 2043// VAForm_1a - DABC ordering.2044class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr,2045 InstrItinClass itin, list<dag> pattern>2046 : I<4, OOL, IOL, asmstr, itin> {2047 bits<5> RT;2048 bits<5> RA;2049 bits<5> RB;2050 bits<5> RC;2051 2052 let Pattern = pattern;2053 2054 let Inst{6...10} = RT;2055 let Inst{11...15} = RA;2056 let Inst{16...20} = RB;2057 let Inst{21...25} = RC;2058 let Inst{26...31} = xo;2059}2060 2061class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr,2062 InstrItinClass itin, list<dag> pattern>2063 : I<4, OOL, IOL, asmstr, itin> {2064 bits<5> RT;2065 bits<5> RA;2066 bits<5> RB;2067 bits<4> SH;2068 2069 let Pattern = pattern;2070 2071 let Inst{6...10} = RT;2072 let Inst{11...15} = RA;2073 let Inst{16...20} = RB;2074 let Inst{21} = 0;2075 let Inst{22...25} = SH;2076 let Inst{26...31} = xo;2077}2078 2079// E-2 VX-Form2080class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,2081 InstrItinClass itin, list<dag> pattern>2082 : I<4, OOL, IOL, asmstr, itin> {2083 bits<5> VD;2084 bits<5> VA;2085 bits<5> VB;2086 2087 let Pattern = pattern;2088 2089 let Inst{6...10} = VD;2090 let Inst{11...15} = VA;2091 let Inst{16...20} = VB;2092 let Inst{21...31} = xo;2093}2094 2095class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr,2096 InstrItinClass itin, list<dag> pattern>2097 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> {2098 let VA = VD;2099 let VB = VD;2100}2101 2102 2103class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,2104 InstrItinClass itin, list<dag> pattern>2105 : I<4, OOL, IOL, asmstr, itin> {2106 bits<5> VD;2107 bits<5> VB;2108 2109 let Pattern = pattern;2110 2111 let Inst{6...10} = VD;2112 let Inst{11...15} = 0;2113 let Inst{16...20} = VB;2114 let Inst{21...31} = xo;2115}2116 2117class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,2118 InstrItinClass itin, list<dag> pattern>2119 : I<4, OOL, IOL, asmstr, itin> {2120 bits<5> VD;2121 bits<5> IMM;2122 2123 let Pattern = pattern;2124 2125 let Inst{6...10} = VD;2126 let Inst{11...15} = IMM;2127 let Inst{16...20} = 0;2128 let Inst{21...31} = xo;2129}2130 2131/// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.2132class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr,2133 InstrItinClass itin, list<dag> pattern>2134 : I<4, OOL, IOL, asmstr, itin> {2135 bits<5> VD;2136 2137 let Pattern = pattern;2138 2139 let Inst{6...10} = VD;2140 let Inst{11...15} = 0;2141 let Inst{16...20} = 0;2142 let Inst{21...31} = xo;2143}2144 2145/// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.2146class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr,2147 InstrItinClass itin, list<dag> pattern>2148 : I<4, OOL, IOL, asmstr, itin> {2149 bits<5> VB;2150 2151 let Pattern = pattern;2152 2153 let Inst{6...10} = 0;2154 let Inst{11...15} = 0;2155 let Inst{16...20} = VB;2156 let Inst{21...31} = xo;2157}2158 2159// e.g. [PO VRT EO VRB XO]2160class VXForm_RD5_XO5_RS5<bits<11> xo, bits<5> eo, dag OOL, dag IOL,2161 string asmstr, InstrItinClass itin, list<dag> pattern>2162 : I<4, OOL, IOL, asmstr, itin> {2163 bits<5> VD;2164 bits<5> VB;2165 2166 let Pattern = pattern;2167 2168 let Inst{6...10} = VD;2169 let Inst{11...15} = eo;2170 let Inst{16...20} = VB;2171 let Inst{21...31} = xo;2172}2173 2174/// VXForm_CR - VX crypto instructions with "VRT, VRA, ST, SIX"2175class VXForm_CR<bits<11> xo, dag OOL, dag IOL, string asmstr,2176 InstrItinClass itin, list<dag> pattern>2177 : I<4, OOL, IOL, asmstr, itin> {2178 bits<5> VD;2179 bits<5> VA;2180 bits<1> ST;2181 bits<4> SIX;2182 2183 let Pattern = pattern;2184 2185 let Inst{6...10} = VD;2186 let Inst{11...15} = VA;2187 let Inst{16} = ST;2188 let Inst{17...20} = SIX;2189 let Inst{21...31} = xo;2190}2191 2192/// VXForm_BX - VX crypto instructions with "VRT, VRA, 0 - like vsbox"2193class VXForm_BX<bits<11> xo, dag OOL, dag IOL, string asmstr,2194 InstrItinClass itin, list<dag> pattern>2195 : I<4, OOL, IOL, asmstr, itin> {2196 bits<5> VD;2197 bits<5> VA;2198 2199 let Pattern = pattern;2200 2201 let Inst{6...10} = VD;2202 let Inst{11...15} = VA;2203 let Inst{16...20} = 0;2204 let Inst{21...31} = xo;2205}2206 2207// E-4 VXR-Form2208class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr,2209 InstrItinClass itin, list<dag> pattern>2210 : I<4, OOL, IOL, asmstr, itin> {2211 bits<5> VD;2212 bits<5> VA;2213 bits<5> VB;2214 bit RC = 0;2215 2216 let Pattern = pattern;2217 2218 let Inst{6...10} = VD;2219 let Inst{11...15} = VA;2220 let Inst{16...20} = VB;2221 let Inst{21} = RC;2222 let Inst{22...31} = xo;2223}2224 2225// VX-Form: [PO VRT EO VRB 1 PS XO]2226class VX_RD5_EO5_RS5_PS1_XO9<bits<5> eo, bits<9> xo,2227 dag OOL, dag IOL, string asmstr,2228 InstrItinClass itin, list<dag> pattern>2229 : I<4, OOL, IOL, asmstr, itin> {2230 bits<5> VD;2231 bits<5> VB;2232 bit PS;2233 2234 let Pattern = pattern;2235 2236 let Inst{6...10} = VD;2237 let Inst{11...15} = eo;2238 let Inst{16...20} = VB;2239 let Inst{21} = 1;2240 let Inst{22} = PS;2241 let Inst{23...31} = xo;2242}2243 2244// VX-Form: [PO VRT VRA VRB 1 PS XO] or [PO VRT VRA VRB 1 / XO]2245class VX_RD5_RSp5_PS1_XO9<bits<9> xo, dag OOL, dag IOL, string asmstr,2246 InstrItinClass itin, list<dag> pattern>2247 : I<4, OOL, IOL, asmstr, itin> {2248 bits<5> VD;2249 bits<5> VA;2250 bits<5> VB;2251 bit PS;2252 2253 let Pattern = pattern;2254 2255 let Inst{6...10} = VD;2256 let Inst{11...15} = VA;2257 let Inst{16...20} = VB;2258 let Inst{21} = 1;2259 let Inst{22} = PS;2260 let Inst{23...31} = xo;2261}2262 2263class Z22Form_BF3_FRA5_DCM6<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,2264 string asmstr, InstrItinClass itin,2265 list<dag> pattern>2266 : I<opcode, OOL, IOL, asmstr, itin> {2267 bits<3> BF;2268 bits<5> FRA;2269 bits<6> DCM;2270 2271 let Pattern = pattern;2272 2273 let Inst{6...8} = BF;2274 let Inst{9...10} = 0;2275 let Inst{11...15} = FRA;2276 let Inst{16...21} = DCM;2277 let Inst{22...30} = xo;2278 let Inst{31} = 0;2279}2280 2281class Z22Form_FRTA5_SH6<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,2282 string asmstr, list<dag> pattern, InstrItinClass itin>2283 : I<opcode, OOL, IOL, asmstr, itin> {2284 2285 bits<5> FRT;2286 bits<5> FRA;2287 bits<6> SH;2288 2289 let Pattern = pattern;2290 2291 bit RC = 0; // set by isRecordForm2292 2293 let Inst{6...10} = FRT;2294 let Inst{11...15} = FRA;2295 let Inst{16...21} = SH;2296 let Inst{22...30} = xo;2297 let Inst{31} = RC;2298}2299 2300class Z23Form_8<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,2301 InstrItinClass itin, list<dag> pattern>2302 : I<opcode, OOL, IOL, asmstr, itin> {2303 bits<5> VRT;2304 bit R;2305 bits<5> VRB;2306 bits<2> idx;2307 2308 let Pattern = pattern;2309 2310 bit RC = 0; // set by isRecordForm2311 2312 let Inst{6...10} = VRT;2313 let Inst{11...14} = 0;2314 let Inst{15} = R;2315 let Inst{16...20} = VRB;2316 let Inst{21...22} = idx;2317 let Inst{23...30} = xo;2318 let Inst{31} = RC;2319}2320 2321class Z23Form_RTAB5_CY2<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,2322 string asmstr, InstrItinClass itin, list<dag> pattern>2323 : I<opcode, OOL, IOL, asmstr, itin> {2324 bits<5> RT;2325 bits<5> RA;2326 bits<5> RB;2327 bits<2> CY;2328 2329 let Pattern = pattern;2330 2331 let Inst{6...10} = RT;2332 let Inst{11...15} = RA;2333 let Inst{16...20} = RB;2334 let Inst{21...22} = CY;2335 let Inst{23...30} = xo;2336 let Inst{31} = 0;2337}2338 2339class Z23Form_FRTAB5_RMC2<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,2340 string asmstr, list<dag> pattern>2341 : I<opcode, OOL, IOL, asmstr, NoItinerary> {2342 bits<5> FRT;2343 bits<5> FRA;2344 bits<5> FRB;2345 bits<2> RMC;2346 2347 let Pattern = pattern;2348 2349 bit RC = 0; // set by isRecordForm2350 2351 let Inst{6...10} = FRT;2352 let Inst{11...15} = FRA;2353 let Inst{16...20} = FRB;2354 let Inst{21...22} = RMC;2355 let Inst{23...30} = xo;2356 let Inst{31} = RC;2357}2358 2359class Z23Form_TE5_FRTB5_RMC2<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,2360 string asmstr, list<dag> pattern>2361 : Z23Form_FRTAB5_RMC2<opcode, xo, OOL, IOL, asmstr, pattern> {2362 bits<5> TE;2363 let FRA = TE;2364}2365 2366class Z23Form_FRTB5_R1_RMC2<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,2367 string asmstr, list<dag> pattern>2368 : I<opcode, OOL, IOL, asmstr, NoItinerary> {2369 bits<5> FRT;2370 bits<1> R;2371 bits<5> FRB;2372 bits<2> RMC;2373 2374 let Pattern = pattern;2375 2376 bit RC = 0; // set by isRecordForm2377 2378 let Inst{6...10} = FRT;2379 let Inst{11...14} = 0;2380 let Inst{15} = R;2381 let Inst{16...20} = FRB;2382 let Inst{21...22} = RMC;2383 let Inst{23...30} = xo;2384 let Inst{31} = RC;2385}2386 2387//===----------------------------------------------------------------------===//2388// EmitTimePseudo won't have encoding information for the [MC]CodeEmitter2389// stuff2390class PPCEmitTimePseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern>2391 : I<0, OOL, IOL, asmstr, NoItinerary> {2392 let isCodeGenOnly = 1;2393 let PPC64 = 0;2394 let Pattern = pattern;2395 let Inst{31...0} = 0;2396 let hasNoSchedulingInfo = 1;2397}2398 2399// Instruction that require custom insertion support2400// a.k.a. ISelPseudos, however, these won't have isPseudo set2401class PPCCustomInserterPseudo<dag OOL, dag IOL, string asmstr,2402 list<dag> pattern>2403 : PPCEmitTimePseudo<OOL, IOL, asmstr, pattern> {2404 let usesCustomInserter = 1;2405}2406 2407// PostRAPseudo will be expanded in expandPostRAPseudo, isPseudo flag in td2408// files is set only for PostRAPseudo2409class PPCPostRAExpPseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern>2410 : PPCEmitTimePseudo<OOL, IOL, asmstr, pattern> {2411 let isPseudo = 1;2412}2413 2414class PseudoXFormMemOp<dag OOL, dag IOL, string asmstr, list<dag> pattern>2415 : PPCPostRAExpPseudo<OOL, IOL, asmstr, pattern>, XFormMemOp;2416 2417