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1//===-- PPCInstrFutureMMA.td - Future Instruction Set ------*- tablegen -*-===//2//3// The LLVM Compiler Infrastructure4//5// This file is distributed under the University of Illinois Open Source6// License. See LICENSE.TXT for details.7//8//===----------------------------------------------------------------------===//9//10// This file describes the instructions introduced for the Future CPU for MMA.11// Please reference "PPCInstrVSX.td" for file structure.12//13//===----------------------------------------------------------------------===//14 15class XX3Form_AT3_XABp5_P1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,16 string asmstr, list<dag> pattern>17 : I<opcode, OOL, IOL, asmstr, NoItinerary> {18 bits<3> AT;19 bits<5> XAp;20 bits<5> XBp;21 bits<1> P;22 23 let Pattern = pattern;24 25 let Inst{6...8} = AT{2...0};26 let Inst{9...10} = 0;27 let Inst{11...14} = XAp{3...0};28 let Inst{15} = P;29 let Inst{16...19} = XBp{3...0};30 let Inst{20} = 0;31 let Inst{21...28} = xo;32 let Inst{29} = XAp{4};33 let Inst{30} = XBp{4};34 let Inst{31} = 0;35}36 37class XX2Form_AT3_XBp5_P2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,38 string asmstr, list<dag> pattern>39 : I<opcode, OOL, IOL, asmstr, NoItinerary> {40 bits<3> AT;41 bits<5> XBp;42 bits<2> P;43 44 let Pattern = pattern;45 46 let Inst{6...8} = AT{2...0};47 let Inst{9...14} = 0;48 let Inst{15} = P{0};49 let Inst{16...19} = XBp{3...0};50 let Inst{20} = P{1};51 let Inst{21...29} = xo;52 let Inst{30} = XBp{4};53 let Inst{31} = 0;54}55 56class XForm_ATB3<bits<6> opcode, bits<5> o, bits<10> xo, dag OOL, dag IOL,57 string asmstr, list<dag> pattern>58 : I<opcode, OOL, IOL, asmstr, NoItinerary> {59 bits<3> AT;60 bits<3> AB;61 62 let Pattern = pattern;63 64 let Inst{6...8} = AT{2...0};65 let Inst{9...10} = 0;66 let Inst{11...15} = o;67 let Inst{16...18} = AB{2...0};68 let Inst{19...20} = 0;69 let Inst{21...30} = xo;70 let Inst{31} = 0;71}72 73class XX3Form_AT3_XAp5B6<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,74 string asmstr, InstrItinClass itin, list<dag> pattern>75 : I<opcode, OOL, IOL, asmstr, itin> {76 bits<3> AT;77 bits<5> XAp;78 bits<6> XB;79 80 let Pattern = pattern;81 82 let Inst{6...8} = AT;83 let Inst{9...10} = 0;84 let Inst{11...14} = XAp{3...0};85 let Inst{15} = 0;86 let Inst{16...20} = XB{4...0};87 let Inst{21...28} = xo;88 let Inst{29} = XAp{4};89 let Inst{30} = XB{5};90 let Inst{31} = 0;91}92 93class MMIRR_XX3Form_X8YP4_XAp5B6<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,94 string asmstr, InstrItinClass itin,95 list<dag> pattern>96 : PI<1, opcode, OOL, IOL, asmstr, itin> {97 bits<3> AT;98 bits<5> XAp;99 bits<6> XB;100 bits<8> XMSK;101 bits<4> YMSK;102 bits<4> PMSK;103 104 let Pattern = pattern;105 106 // The prefix.107 let Inst{6...7} = 3;108 let Inst{8...11} = 9;109 let Inst{12...15} = 0;110 let Inst{16...19} = PMSK;111 let Inst{20...27} = XMSK;112 let Inst{28...31} = YMSK;113 114 // The instruction.115 let Inst{38...40} = AT;116 let Inst{41...42} = 0;117 let Inst{43...46} = XAp{3...0};118 let Inst{47} = 0;119 let Inst{48...52} = XB{4...0};120 let Inst{53...60} = xo;121 let Inst{61} = XAp{4};122 let Inst{62} = XB{5};123 let Inst{63} = 0;124}125 126class MMIRR_XX3Form_X8Y4P2_XAp5B6<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,127 string asmstr, InstrItinClass itin,128 list<dag> pattern>129 : PI<1, opcode, OOL, IOL, asmstr, itin> {130 bits<3> AT;131 bits<5> XAp;132 bits<6> XB;133 bits<8> XMSK;134 bits<4> YMSK;135 bits<2> PMSK;136 137 let Pattern = pattern;138 139 // The prefix.140 let Inst{6...7} = 3;141 let Inst{8...11} = 9;142 let Inst{12...15} = 0;143 let Inst{16...17} = PMSK;144 let Inst{18...19} = 0;145 let Inst{20...27} = XMSK;146 let Inst{28...31} = YMSK;147 148 // The instruction.149 let Inst{38...40} = AT;150 let Inst{41...42} = 0;151 let Inst{43...46} = XAp{3...0};152 let Inst{47} = 0;153 let Inst{48...52} = XB{4...0};154 let Inst{53...60} = xo;155 let Inst{61} = XAp{4};156 let Inst{62} = XB{5};157 let Inst{63} = 0;158}159 160multiclass DMR_UM_XOEO<bits<6> opcode, bits<8> xo, dag IOL, string asmbase,161 string asmstr> {162 let Predicates = [MMA, IsISAFuture] in {163 def NAME164 : XX3Form_AT3_XAp5B6<opcode, !or(xo, 0x01), (outs dmr:$AT), IOL,165 !strconcat(asmbase#" ", asmstr), IIC_VecFP, []>,166 RegConstraint<"@earlyclobber $AT">;167 def PP168 : XX3Form_AT3_XAp5B6<opcode, xo, (outs dmr:$AT),169 !con((ins dmr:$ATi), IOL),170 !strconcat(asmbase#"pp ", asmstr), IIC_VecFP, []>,171 RegConstraint<"$ATi = $AT">;172 }173}174 175multiclass DMR_UM_M448_XOEO<bits<6> opcode, bits<8> xo, dag IOL, string asmbase,176 string asmstr> {177 defm NAME : DMR_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;178 let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {179 def PM#NAME180 : MMIRR_XX3Form_X8YP4_XAp5B6<181 opcode, !or(xo, 0x01), (outs dmr:$AT),182 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u4imm:$PMSK)),183 !strconcat("pm"#asmbase#" ", asmstr#", $XMSK, $YMSK, $PMSK"),184 IIC_VecFP, []>,185 RegConstraint<"@earlyclobber $AT">;186 def PM#NAME#PP187 : MMIRR_XX3Form_X8YP4_XAp5B6<188 opcode, xo, (outs dmr:$AT),189 !con((ins dmr:$ATi),190 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u4imm:$PMSK))),191 !strconcat("pm"#asmbase#"pp ", asmstr#", $XMSK, $YMSK, $PMSK"),192 IIC_VecFP, []>,193 RegConstraint<"$ATi = $AT">;194 }195}196 197multiclass DMR_BF16_UM_XOEO<bits<6> opcode, bits<8> xo, dag IOL, string asmbase,198 string asmstr> {199 let Predicates = [MMA, IsISAFuture] in {200 def NAME201 : XX3Form_AT3_XAp5B6<opcode, !or(xo, 0x11), (outs dmr:$AT), IOL,202 !strconcat(asmbase#" ", asmstr), IIC_VecFP, []>,203 RegConstraint<"@earlyclobber $AT">;204 def PP205 : XX3Form_AT3_XAp5B6<opcode, xo, (outs dmr:$AT),206 !con((ins dmr:$ATi), IOL),207 !strconcat(asmbase#"pp ", asmstr), IIC_VecFP, []>,208 RegConstraint<"$ATi = $AT">;209 }210}211 212multiclass DMR_BF16_UM_M284_XOEO<bits<6> opcode, bits<8> xo, dag IOL,213 string asmbase, string asmstr> {214 defm NAME : DMR_BF16_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;215 let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {216 def PM#NAME217 : MMIRR_XX3Form_X8Y4P2_XAp5B6<218 opcode, !or(xo, 0x11), (outs dmr:$AT),219 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK)),220 !strconcat("pm"#asmbase#" ", asmstr#", $XMSK, $YMSK, $PMSK"),221 IIC_VecFP, []>,222 RegConstraint<"@earlyclobber $AT">;223 def PM#NAME#PP224 : MMIRR_XX3Form_X8Y4P2_XAp5B6<225 opcode, xo, (outs dmr:$AT),226 !con((ins dmr:$ATi),227 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),228 !strconcat("pm"#asmbase#"pp ", asmstr#", $XMSK, $YMSK, $PMSK"),229 IIC_VecFP, []>,230 RegConstraint<"$ATi = $AT">;231 }232}233 234multiclass DMR_F16_UM_M284_XOEO<bits<6> opcode, bits<8> xo, dag IOL,235 string asmbase, string asmstr> {236 defm NAME : DMR_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;237 let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {238 def PM#NAME239 : MMIRR_XX3Form_X8Y4P2_XAp5B6<240 opcode, !or(xo, 0x01), (outs dmr:$AT),241 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK)),242 !strconcat("pm"#asmbase#" ", asmstr#", $XMSK, $YMSK, $PMSK"),243 IIC_VecFP, []>,244 RegConstraint<"@earlyclobber $AT">;245 def PM#NAME#PP246 : MMIRR_XX3Form_X8Y4P2_XAp5B6<247 opcode, xo, (outs dmr:$AT),248 !con((ins dmr:$ATi),249 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),250 !strconcat("pm"#asmbase#"pp ", asmstr#", $XMSK, $YMSK, $PMSK"),251 IIC_VecFP, []>,252 RegConstraint<"$ATi = $AT">;253 }254}255 256multiclass DMR_NEG_UM_M284_XOXORf939a0<bits<6> opcode, bits<8> xo, dag IOL,257 string asmbase, string asmstr> {258 defm NAME : DMR_BF16_UM_M284_XOEO<opcode, xo, IOL, asmbase, asmstr>;259 let Predicates = [MMA, IsISAFuture] in {260 def PN261 : XX3Form_AT3_XAp5B6<opcode, !xor(xo, 0xF9), (outs dmr:$AT),262 !con((ins dmr:$ATi), IOL),263 !strconcat(asmbase#"pn ", asmstr), IIC_VecFP, []>,264 RegConstraint<"$ATi = $AT">;265 def NP266 : XX3Form_AT3_XAp5B6<opcode, !xor(xo, 0x39), (outs dmr:$AT),267 !con((ins dmr:$ATi), IOL),268 !strconcat(asmbase#"np ", asmstr), IIC_VecFP, []>,269 RegConstraint<"$ATi = $AT">;270 def NN271 : XX3Form_AT3_XAp5B6<opcode, !xor(xo, 0xA0), (outs dmr:$AT),272 !con((ins dmr:$ATi), IOL),273 !strconcat(asmbase#"nn ", asmstr), IIC_VecFP, []>,274 RegConstraint<"$ATi = $AT">;275 }276 let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {277 def PM#NAME#PN278 : MMIRR_XX3Form_X8Y4P2_XAp5B6<279 opcode, !xor(xo, 0xF9), (outs dmr:$AT),280 !con((ins dmr:$ATi),281 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),282 !strconcat("pm"#asmbase#"pn ", asmstr#", $XMSK, $YMSK, $PMSK"),283 IIC_VecFP, []>,284 RegConstraint<"$ATi = $AT">;285 def PM#NAME#NP286 : MMIRR_XX3Form_X8Y4P2_XAp5B6<287 opcode, !xor(xo, 0x39), (outs dmr:$AT),288 !con((ins dmr:$ATi),289 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),290 !strconcat("pm"#asmbase#"np ", asmstr#", $XMSK, $YMSK, $PMSK"),291 IIC_VecFP, []>,292 RegConstraint<"$ATi = $AT">;293 def PM#NAME#NN294 : MMIRR_XX3Form_X8Y4P2_XAp5B6<295 opcode, !xor(xo, 0xA0), (outs dmr:$AT),296 !con((ins dmr:$ATi),297 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),298 !strconcat("pm"#asmbase#"nn ", asmstr#", $XMSK, $YMSK, $PMSK"),299 IIC_VecFP, []>,300 RegConstraint<"$ATi = $AT">;301 }302}303 304multiclass DMR_NEG_UM_M284_XOXORd11188<bits<6> opcode, bits<8> xo, dag IOL,305 string asmbase, string asmstr> {306 defm NAME : DMR_F16_UM_M284_XOEO<opcode, xo, IOL, asmbase, asmstr>;307 let Predicates = [MMA, IsISAFuture] in {308 def PN309 : XX3Form_AT3_XAp5B6<opcode, !xor(xo, 0xD1), (outs dmr:$AT),310 !con((ins dmr:$ATi), IOL),311 !strconcat(asmbase#"pn ", asmstr), IIC_VecFP, []>,312 RegConstraint<"$ATi = $AT">;313 def NP314 : XX3Form_AT3_XAp5B6<opcode, !xor(xo, 0x11), (outs dmr:$AT),315 !con((ins dmr:$ATi), IOL),316 !strconcat(asmbase#"np ", asmstr), IIC_VecFP, []>,317 RegConstraint<"$ATi = $AT">;318 def NN319 : XX3Form_AT3_XAp5B6<opcode, !xor(xo, 0x88), (outs dmr:$AT),320 !con((ins dmr:$ATi), IOL),321 !strconcat(asmbase#"nn ", asmstr), IIC_VecFP, []>,322 RegConstraint<"$ATi = $AT">;323 }324 let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {325 def PM#NAME#PN326 : MMIRR_XX3Form_X8Y4P2_XAp5B6<327 opcode, !xor(xo, 0xD1), (outs dmr:$AT),328 !con((ins dmr:$ATi),329 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),330 !strconcat("pm"#asmbase#"pn ", asmstr#", $XMSK, $YMSK, $PMSK"),331 IIC_VecFP, []>,332 RegConstraint<"$ATi = $AT">;333 def PM#NAME#NP334 : MMIRR_XX3Form_X8Y4P2_XAp5B6<335 opcode, !xor(xo, 0x11), (outs dmr:$AT),336 !con((ins dmr:$ATi),337 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),338 !strconcat("pm"#asmbase#"np ", asmstr#", $XMSK, $YMSK, $PMSK"),339 IIC_VecFP, []>,340 RegConstraint<"$ATi = $AT">;341 def PM#NAME#NN342 : MMIRR_XX3Form_X8Y4P2_XAp5B6<343 opcode, !xor(xo, 0x88), (outs dmr:$AT),344 !con((ins dmr:$ATi),345 !con(IOL, (ins u8imm:$XMSK, u4imm:$YMSK, u2imm:$PMSK))),346 !strconcat("pm"#asmbase#"nn ", asmstr#", $XMSK, $YMSK, $PMSK"),347 IIC_VecFP, []>,348 RegConstraint<"$ATi = $AT">;349 }350}351 352class XForm_AT3_T1_AB3<bits<6> opcode, bits<5> o, bits<10> xo, dag OOL, dag IOL,353 string asmstr, list<dag> pattern>354 : I<opcode, OOL, IOL, asmstr, NoItinerary> {355 bits<3> AT;356 bits<3> AB;357 bits<1> T;358 359 let Pattern = pattern;360 361 let Inst{6...8} = AT{2...0};362 let Inst{9} = 0;363 let Inst{10} = T;364 let Inst{11...15} = o;365 let Inst{16...18} = AB{2...0};366 let Inst{19...20} = 0;367 let Inst{21...30} = xo;368 let Inst{31} = 0;369}370 371class XForm_ATp2_SR5<bits<6> opcode, bits<5> o, bits<10> xo, dag OOL, dag IOL,372 string asmstr, list<dag> pattern>373 : I<opcode, OOL, IOL, asmstr, NoItinerary> {374 bits<2> ATp;375 bits<5> SR;376 377 let Pattern = pattern;378 379 let Inst{6...7} = ATp{1...0};380 let Inst{8...10} = 0;381 let Inst{11...15} = o;382 let Inst{16...20} = SR{4...0};383 let Inst{21...30} = xo;384 let Inst{31} = 0;385}386 387class XX2Form_AT3_XB6_ID2_E1_BL2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,388 string asmstr, list<dag> pattern>389 : I<opcode, OOL, IOL, asmstr, NoItinerary> {390 bits<3> AT;391 bits<6> XB;392 bits<2> ID;393 bits<1> E;394 bits<2> BL;395 396 let Pattern = pattern;397 398 let Inst{6...8} = AT{2...0};399 let Inst{9...10} = 0;400 let Inst{11...12} = ID{1...0};401 let Inst{13} = E;402 let Inst{14...15} = BL{1...0};403 let Inst{16...20} = XB{4...0};404 let Inst{21...29} = xo;405 let Inst{30} = XB{5};406 let Inst{31} = 0;407}408 409//-------------------------- Instruction definitions -------------------------//410// Predicate combinations available:411// [MMA, IsISAFuture]412// [MMA, PrefixInstrs, IsISAFuture]413 414let Predicates = [MMA, IsISAFuture] in {415 def DMXXEXTFDMR512416 : XX3Form_AT3_XABp5_P1<60, 226, (outs vsrprc:$XAp, vsrprc:$XBp),417 (ins wacc:$AT),418 "dmxxextfdmr512 $XAp, $XBp, $AT, 0", []> {419 let P = 0;420 }421 422 def DMXXEXTFDMR512_HI423 : XX3Form_AT3_XABp5_P1<60, 226, (outs vsrprc:$XAp, vsrprc:$XBp),424 (ins wacc_hi:$AT),425 "dmxxextfdmr512 $XAp, $XBp, $AT, 1", []> {426 let P = 1;427 }428 429 def DMXXINSTDMR512430 : XX3Form_AT3_XABp5_P1<60, 234, (outs wacc:$AT),431 (ins vsrprc:$XAp, vsrprc:$XBp),432 "dmxxinstdmr512 $AT, $XAp, $XBp, 0", []> {433 let P = 0;434 }435 436 def DMXXINSTDMR512_HI437 : XX3Form_AT3_XABp5_P1<60, 234, (outs wacc_hi:$AT),438 (ins vsrprc:$XAp, vsrprc:$XBp),439 "dmxxinstdmr512 $AT, $XAp, $XBp, 1", []> {440 let P = 1;441 }442 443 def DMXXEXTFDMR256 : XX2Form_AT3_XBp5_P2<60, 484, (outs vsrprc:$XBp),444 (ins dmrrowp:$AT, u2imm:$P),445 "dmxxextfdmr256 $XBp, $AT, $P", []>;446 447 def DMXXINSTDMR256 : XX2Form_AT3_XBp5_P2<60, 485, (outs dmrrowp:$AT),448 (ins vsrprc:$XBp, u2imm:$P),449 "dmxxinstdmr256 $AT, $XBp, $P", []>;450 451 def DMMR452 : XForm_ATB3<31, 6, 177, (outs dmr:$AT), (ins dmr:$AB), "dmmr $AT, $AB",453 [(set v1024i1:$AT, (int_ppc_mma_dmmr v1024i1:$AB))]>;454 455 def DMXOR : XForm_ATB3<31, 7, 177, (outs dmr:$AT), (ins dmr:$ATi, dmr:$AB),456 "dmxor $AT, $AB",457 [(set v1024i1:$AT, (int_ppc_mma_dmxor v1024i1:$ATi,458 v1024i1:$AB))]>,459 RegConstraint<"$ATi = $AT">;460 461 def DMSETDMRZ462 : XForm_AT3<31, 2, 177, (outs dmr:$AT), (ins), "dmsetdmrz $AT",463 NoItinerary, [(set v1024i1:$AT, (int_ppc_mma_dmsetdmrz))]>;464 465 // DMXVI8GERX4, DMXVI8GERX4PP, PMDMXVI8GERX4, PMDMXVI8GERX4PP466 defm DMXVI8GERX4 : DMR_UM_M448_XOEO<59, 10, (ins vsrprc:$XAp, vsrc:$XB),467 "dmxvi8gerx4", "$AT, $XAp, $XB">;468 469 // DMXVBF16GERX2, DMXVBF16GERX2PP, DMXVBF16GERX2PN, dMXVBF16GERX2NP,470 // DMXVBF16GERX2NN PMDMXVBF16GERX2, PMDMXVBF16GERX2PP, PMDMXVBF16GERX2PN,471 // PMDMXVBF16GERX2NP, PMDMXVBF16GERX2NN472 defm DMXVBF16GERX2473 : DMR_NEG_UM_M284_XOXORf939a0<59, 74, (ins vsrprc:$XAp, vsrc:$XB),474 "dmxvbf16gerx2", "$AT, $XAp, $XB">;475 476 // DMXVF16GERX2, DMXVF16GERX2PP, DMXVF16GERX2PN, dMXVF16GERX2NP,477 // DMXVF16GERX2NN PMDMXVF16GERX2, PMDMXVF16GERX2PP, PMDMXVF16GERX2PN,478 // PMDMXVF16GERX2NP, PMDMXVF16GERX2NN479 defm DMXVF16GERX2480 : DMR_NEG_UM_M284_XOXORd11188<59, 66, (ins vsrprc:$XAp, vsrc:$XB),481 "dmxvf16gerx2", "$AT, $XAp, $XB">;482 483 // DMF cryptography [support] Instructions484 def DMSHA2HASH485 : XForm_AT3_T1_AB3<486 31, 14, 177, (outs dmr:$AT), (ins dmr:$ATi, dmr:$AB, u1imm:$T),487 "dmsha2hash $AT, $AB, $T",488 [(set v1024i1:$AT, (int_ppc_mma_dmsha2hash v1024i1:$ATi,489 v1024i1:$AB, timm:$T))]>,490 RegConstraint<"$ATi = $AT">;491 def DMSHA3HASH492 : XForm_ATp2_SR5<31, 15, 177, (outs dmrp:$ATp),493 (ins dmrp:$ATpi, u5imm:$SR), "dmsha3hash $ATp, $SR",494 [(set v2048i1:$ATp,495 (int_ppc_mma_dmsha3hash v2048i1:$ATpi, timm:$SR))]>,496 RegConstraint<"$ATpi = $ATp">;497 def DMXXSHAPAD498 : XX2Form_AT3_XB6_ID2_E1_BL2<60, 421, (outs dmr:$AT),499 (ins dmr:$ATi, vsrc:$XB, u2imm:$ID, u1imm:$E,500 u2imm:$BL),501 "dmxxshapad $AT, $XB, $ID, $E, $BL", []>,502 RegConstraint<"$ATi = $AT">;503 504 // MMA+ accumulating/non-accumulating instructions.505 def DMXVI8GERX4SPP506 : XX3Form_AT3_XAp5B6<59, 98, (outs dmr:$AT),507 (ins dmr:$ATi, vsrprc:$XAp, vsrc:$XB),508 "dmxvi8gerx4spp $AT, $XAp, $XB", IIC_VecGeneral, []>,509 RegConstraint<"$ATi = $AT">;510 511} // End of [MMA, IsISAFuture]512 513let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {514 def PMDMXVI8GERX4SPP515 : MMIRR_XX3Form_X8YP4_XAp5B6<516 59, 98, (outs dmr:$AT),517 (ins dmr:$ATi, vsrprc:$XAp, vsrc:$XB, u8imm:$XMSK, u4imm:$YMSK,518 u4imm:$PMSK),519 "pmdmxvi8gerx4spp $AT, $XAp, $XB, $XMSK, $YMSK, $PMSK",520 IIC_VecGeneral, []>,521 RegConstraint<"$ATi = $AT">;522}523 524//---------------------------- Anonymous Patterns ----------------------------//525// Predicate combinations available:526// [MMA, IsISAFuture]527// [MMA, PrefixInstrs, IsISAFuture]528 529let Predicates = [MMA, IsISAFuture] in {530 // MMA+ Intrinsics531 def : Pat<(v1024i1 (int_ppc_mma_dmxvi8gerx4 v256i1:$XAp, v16i8:$XB)),532 (DMXVI8GERX4 $XAp, RCCp.BToVSRC)>;533 def : Pat<(v1024i1 (int_ppc_mma_dmxvi8gerx4pp v1024i1:$ATi, v256i1:$XAp,534 v16i8:$XB)),535 (DMXVI8GERX4PP $ATi, $XAp, RCCp.BToVSRC)>;536 def : Pat<(v1024i1 (int_ppc_mma_dmxvi8gerx4spp v1024i1:$ATi, v256i1:$XAp,537 v16i8:$XB)),538 (DMXVI8GERX4SPP $ATi, $XAp, RCCp.BToVSRC)>;539 def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2 v256i1:$XAp, v16i8:$XB)),540 (DMXVBF16GERX2 $XAp, RCCp.BToVSRC)>;541 def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2pp v1024i1:$ATi, v256i1:$XAp,542 v16i8:$XB)),543 (DMXVBF16GERX2PP $ATi, $XAp, RCCp.BToVSRC)>;544 def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2pn v1024i1:$ATi, v256i1:$XAp,545 v16i8:$XB)),546 (DMXVBF16GERX2PN $ATi, $XAp, RCCp.BToVSRC)>;547 def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2np v1024i1:$ATi, v256i1:$XAp,548 v16i8:$XB)),549 (DMXVBF16GERX2NP $ATi, $XAp, RCCp.BToVSRC)>;550 def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2nn v1024i1:$ATi, v256i1:$XAp,551 v16i8:$XB)),552 (DMXVBF16GERX2NN $ATi, $XAp, RCCp.BToVSRC)>;553 def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2 v256i1:$XAp, v16i8:$XB)),554 (DMXVF16GERX2 $XAp, RCCp.BToVSRC)>;555 def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2pp v1024i1:$ATi, v256i1:$XAp,556 v16i8:$XB)),557 (DMXVF16GERX2PP $ATi, $XAp, RCCp.BToVSRC)>;558 def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2pn v1024i1:$ATi, v256i1:$XAp,559 v16i8:$XB)),560 (DMXVF16GERX2PN $ATi, $XAp, RCCp.BToVSRC)>;561 def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2np v1024i1:$ATi, v256i1:$XAp,562 v16i8:$XB)),563 (DMXVF16GERX2NP $ATi, $XAp, RCCp.BToVSRC)>;564 def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2nn v1024i1:$ATi, v256i1:$XAp,565 v16i8:$XB)),566 (DMXVF16GERX2NN $ATi, $XAp, RCCp.BToVSRC)>;567 568 // Cryptography Intrinsic569 def : Pat<(v1024i1 (int_ppc_mma_dmxxshapad v1024i1:$ATi, v16i8:$XB, timm:$ID,570 timm:$E, timm:$BL)),571 (DMXXSHAPAD $ATi, RCCp.BToVSRC, $ID, $E, $BL)>;572}573 574let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {575 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvi8gerx4 v256i1:$XAp, v16i8:$XB,576 Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk4Imm:$PMSK)),577 (PMDMXVI8GERX4 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK, Msk4Imm:$YMSK,578 Msk4Imm:$PMSK)>;579 580 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvi8gerx4pp v1024i1:$ATi, v256i1:$XAp,581 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk4Imm:$PMSK)),582 (PMDMXVI8GERX4PP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,583 Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;584 585 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvi8gerx4spp v1024i1:$ATi, v256i1:$XAp,586 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk4Imm:$PMSK)),587 (PMDMXVI8GERX4SPP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,588 Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;589 590 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2 v256i1:$XAp, v16i8:$XB,591 Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),592 (PMDMXVBF16GERX2 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK, Msk4Imm:$YMSK,593 Msk2Imm:$PMSK)>;594 595 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2pp v1024i1:$ATi, v256i1:$XAp,596 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),597 (PMDMXVBF16GERX2PP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,598 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;599 600 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2pn v1024i1:$ATi, v256i1:$XAp,601 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),602 (PMDMXVBF16GERX2PN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,603 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;604 605 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2np v1024i1:$ATi, v256i1:$XAp,606 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),607 (PMDMXVBF16GERX2NP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,608 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;609 610 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2nn v1024i1:$ATi, v256i1:$XAp,611 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),612 (PMDMXVBF16GERX2NN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,613 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;614 615 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2 v256i1:$XAp, v16i8:$XB,616 Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),617 (PMDMXVF16GERX2 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK, Msk4Imm:$YMSK,618 Msk2Imm:$PMSK)>;619 620 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2pp v1024i1:$ATi, v256i1:$XAp,621 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),622 (PMDMXVF16GERX2PP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,623 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;624 625 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2pn v1024i1:$ATi, v256i1:$XAp,626 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),627 (PMDMXVF16GERX2PN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,628 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;629 630 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2np v1024i1:$ATi, v256i1:$XAp,631 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),632 (PMDMXVF16GERX2NP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,633 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;634 635 def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2nn v1024i1:$ATi, v256i1:$XAp,636 v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),637 (PMDMXVF16GERX2NN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,638 Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;639}640 641//---------------------------- Instruction aliases ---------------------------//642 643let Predicates = [MMA, IsISAFuture] in {644 def : InstAlias<"dmsha256hash $AT, $AB", (DMSHA2HASH dmr:$AT, dmr:$AB, 0)>;645 def : InstAlias<"dmsha512hash $AT, $AB", (DMSHA2HASH dmr:$AT, dmr:$AB, 1)>;646 def : InstAlias<"dmsha3dw $ATp", (DMSHA3HASH dmrp:$ATp, 0)>;647 def : InstAlias<"dmcryshash $ATp", (DMSHA3HASH dmrp:$ATp, 12)>;648 def : InstAlias<"dmxxsha3512pad $AT, $XB, $E", (DMXXSHAPAD dmr:$AT, vsrc:$XB,649 0, u1imm:$E, 0)>;650 def : InstAlias<"dmxxsha3384pad $AT, $XB, $E", (DMXXSHAPAD dmr:$AT, vsrc:$XB,651 0, u1imm:$E, 1)>;652 def : InstAlias<"dmxxsha3256pad $AT, $XB, $E", (DMXXSHAPAD dmr:$AT, vsrc:$XB,653 0, u1imm:$E, 2)>;654 def : InstAlias<"dmxxsha3224pad $AT, $XB, $E", (DMXXSHAPAD dmr:$AT, vsrc:$XB,655 0, u1imm:$E, 3)>;656 def : InstAlias<"dmxxshake256pad $AT, $XB, $E", (DMXXSHAPAD dmr:$AT, vsrc:$XB,657 1, u1imm:$E, 0)>;658 def : InstAlias<"dmxxshake128pad $AT, $XB, $E", (DMXXSHAPAD dmr:$AT, vsrc:$XB,659 1, u1imm:$E, 1)>;660 def : InstAlias<"dmxxsha384512pad $AT, $XB", (DMXXSHAPAD dmr:$AT, vsrc:$XB, 2,661 0, 0)>;662 def : InstAlias<"dmxxsha224256pad $AT, $XB", (DMXXSHAPAD dmr:$AT, vsrc:$XB, 3,663 0, 0)>;664}665