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1//=- RISCVCombine.td - Define RISC-V Combine Rules -----------*- tablegen -*-=//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9//10//===----------------------------------------------------------------------===//11 12include "llvm/Target/GlobalISel/Combine.td"13 14def RISCVPreLegalizerCombiner: GICombiner<15 "RISCVPreLegalizerCombinerImpl", [all_combines]> {16}17 18def RISCVO0PreLegalizerCombiner: GICombiner<19 "RISCVO0PreLegalizerCombinerImpl", [optnone_combines]> {20}21 22// Rule: fold store (fp +0.0) -> store (int zero [XLEN])23def fp_zero_store_matchdata : GIDefMatchData<"Register">;24def fold_fp_zero_store : GICombineRule<25 (defs root:$root, fp_zero_store_matchdata:$matchinfo),26 (match (G_STORE $src, $addr):$root,27 [{ return matchFoldFPZeroStore(*${root}, MRI, STI, ${matchinfo}); }]),28 (apply [{ applyFoldFPZeroStore(*${root}, MRI, B, STI, ${matchinfo}); }])>;29 30// Post-legalization combines which are primarily optimizations.31// TODO: Add more combines.32def RISCVPostLegalizerCombiner33 : GICombiner<"RISCVPostLegalizerCombinerImpl",34 [sub_to_add, combines_for_extload, redundant_and,35 identity_combines, shift_immed_chain,36 commute_constant_to_rhs, simplify_neg_minmax,37 fold_fp_zero_store]> {38}39