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1//===-- RISCVGIsel.td - RISC-V GlobalISel Patterns ---------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9/// \file10/// This file contains patterns that are relevant to GlobalISel, including11/// GIComplexOperandMatcher definitions for equivalent SelectionDAG12/// ComplexPatterns.13//14//===----------------------------------------------------------------------===//15 16include "RISCV.td"17include "RISCVCombine.td"18 19def simm12Plus1 : ImmLeaf<XLenVT, [{20 return (isInt<12>(Imm) && Imm != -2048) || Imm == 2048;}]>;21def simm12Plus1i32 : ImmLeaf<i32, [{22 return (isInt<12>(Imm) && Imm != -2048) || Imm == 2048;}]>;23 24// FIXME: This doesn't check that the G_CONSTANT we're deriving the immediate25// from is only used once26def simm12Minus1Nonzero : ImmLeaf<XLenVT, [{27 return (Imm >= -2049 && Imm < 0) || (Imm > 0 && Imm <= 2046);}]>;28 29def simm12Minus1NonzeroNonNeg1 : ImmLeaf<XLenVT, [{30 return (Imm >= -2049 && Imm < -1) || (Imm > 0 && Imm <= 2046);}]>;31 32// Return an immediate value plus 1.33def ImmPlus1 : SDNodeXForm<imm, [{34 return CurDAG->getTargetConstant(N->getSExtValue() + 1, SDLoc(N),35 N->getValuePtrVTpe(0));}]>;36def GIImmPlus1 :37 GICustomOperandRenderer<"renderImmPlus1">,38 GISDNodeXFormEquiv<ImmPlus1>;39 40// Ptr type used in patterns with GlobalISelEmitter41def PtrVT : PtrValueTypeByHwMode<XLenVT, 0>;42 43// Define pattern expansions for pointer ult/slt conditional codes44def : Pat<(XLenVT (setult (PtrVT GPR:$rs1), simm12_lo:$imm12)),45 (SLTIU GPR:$rs1, simm12_lo:$imm12)>;46def : Pat<(XLenVT (setult (PtrVT GPR:$rs1), (PtrVT GPR:$rs2))),47 (SLTU GPR:$rs1, GPR:$rs2)>;48def : Pat<(XLenVT (setlt (PtrVT GPR:$rs1), simm12_lo:$imm12)),49 (SLTI GPR:$rs1, simm12_lo:$imm12)>;50def : Pat<(XLenVT (setlt (PtrVT GPR:$rs1), (PtrVT GPR:$rs2))),51 (SLT GPR:$rs1, GPR:$rs2)>;52 53// Define pattern expansions for setcc operations that aren't directly54// handled by a RISC-V instruction.55foreach Ty = [PtrVT, XLenVT] in {56def : Pat<(XLenVT (seteq (Ty GPR:$rs1), (Ty 0))), (SLTIU GPR:$rs1, 1)>;57def : Pat<(XLenVT (seteq (Ty GPR:$rs1), (Ty simm12Plus1:$imm12))),58 (SLTIU (ADDI GPR:$rs1, (NegImm simm12Plus1:$imm12)), 1)>;59def : Pat<(XLenVT (seteq (Ty GPR:$rs1), (Ty GPR:$rs2))),60 (SLTIU (XOR GPR:$rs1, GPR:$rs2), 1)>;61def : Pat<(XLenVT (setne (Ty GPR:$rs1), (Ty 0))), (SLTU (XLenVT X0), GPR:$rs1)>;62def : Pat<(XLenVT (setne (Ty GPR:$rs1), (Ty simm12Plus1:$imm12))),63 (SLTU (XLenVT X0), (ADDI GPR:$rs1, (NegImm simm12Plus1:$imm12)))>;64def : Pat<(XLenVT (setne (Ty GPR:$rs1), (Ty GPR:$rs2))),65 (SLTU (XLenVT X0), (XOR GPR:$rs1, GPR:$rs2))>;66def : Pat<(XLenVT (setugt (Ty GPR:$rs1), (Ty simm12Minus1NonzeroNonNeg1:$imm))),67 (XORI (SLTIU GPR:$rs1,68 (ImmPlus1 simm12Minus1NonzeroNonNeg1:$imm)), 1)>;69def : Pat<(XLenVT (setugt (Ty GPR:$rs1), (Ty GPR:$rs2))),70 (SLTU GPR:$rs2, GPR:$rs1)>;71def : Pat<(XLenVT (setgt (Ty GPR:$rs1), (Ty simm12Minus1Nonzero:$imm))),72 (XORI (SLTI GPR:$rs1, (ImmPlus1 simm12Minus1Nonzero:$imm)), 1)>;73def : Pat<(XLenVT (setgt (Ty GPR:$rs1), (Ty GPR:$rs2))),74 (SLT GPR:$rs2, GPR:$rs1)>;75def : Pat<(XLenVT (setuge (XLenVT GPR:$rs1), (Ty simm12_lo:$imm))),76 (XORI (SLTIU GPR:$rs1, simm12_lo:$imm), 1)>;77def : Pat<(XLenVT (setuge (Ty GPR:$rs1), (Ty GPR:$rs2))),78 (XORI (SLTU GPR:$rs1, GPR:$rs2), 1)>;79def : Pat<(XLenVT (setge (Ty GPR:$rs1), (Ty simm12_lo:$imm))),80 (XORI (SLTI GPR:$rs1, simm12_lo:$imm), 1)>;81def : Pat<(XLenVT (setge (Ty GPR:$rs1), (Ty GPR:$rs2))),82 (XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;83def : Pat<(XLenVT (setule (Ty GPR:$rs1), (Ty simm12Minus1NonzeroNonNeg1:$imm))),84 (SLTIU GPR:$rs1, (ImmPlus1 simm12Minus1NonzeroNonNeg1:$imm))>;85def : Pat<(XLenVT (setule (Ty GPR:$rs1), (Ty GPR:$rs2))),86 (XORI (SLTU GPR:$rs2, GPR:$rs1), 1)>;87def : Pat<(XLenVT (setle (Ty GPR:$rs1), (Ty simm12Minus1Nonzero:$imm))),88 (SLTI GPR:$rs1, (ImmPlus1 simm12Minus1Nonzero:$imm))>;89def : Pat<(XLenVT (setle (Ty GPR:$rs1), (Ty GPR:$rs2))),90 (XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;91}92 93let Predicates = [IsRV32] in {94def : LdPat<load, LW, PtrVT>;95def : StPat<store, SW, GPR, PtrVT>;96}97 98let Predicates = [IsRV64] in {99def : LdPat<load, LD, PtrVT>;100def : StPat<store, SD, GPR, PtrVT>;101}102 103//===----------------------------------------------------------------------===//104// RV64 i32 patterns not used by SelectionDAG105//===----------------------------------------------------------------------===//106 107let Predicates = [IsRV64] in {108def : Pat<(sext_inreg (i64 (add GPR:$rs1, simm12_lo:$imm)), i32),109 (ADDIW GPR:$rs1, simm12_lo:$imm)>;110}111