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1//===-- RISCVInstrInfoXSpacemiT.td -------------------------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file describes the vendor extensions defined by SpacemiT.10//11//===----------------------------------------------------------------------===//12 13//===----------------------------------------------------------------------===//14// Operand definitions.15//===----------------------------------------------------------------------===//16 17class SMTVDotOpcode<bits<7> val> {18 bits<7> Value = val;19}20 21class SMTVEncoding2<bits<2> val> {22 bits<2> Value = val;23}24 25def OPMMA : SMTVDotOpcode<0b1110001>;26def OPMMA_SLIDE : SMTVDotOpcode<0b1110011>;27 28//===----------------------------------------------------------------------===//29// Vector Dot-Product Sign Encoding30// Defines the signed/unsigned mixing modes for vector dot-product operations.31// Encoding format: [1:0] bits32// 00: UU (Unsigned x Unsigned)33// 01: US (Unsigned x Signed)34// 10: SU (Signed x Unsigned)35// 11: SS (Signed x Signed)36//===----------------------------------------------------------------------===//37def SMT_VDot_UU : SMTVEncoding2<0b00>;38def SMT_VDot_US : SMTVEncoding2<0b01>;39def SMT_VDot_SU : SMTVEncoding2<0b10>;40def SMT_VDot_SS : SMTVEncoding2<0b11>;41 42//===----------------------------------------------------------------------===//43// Vector Dot-Product Sliding Window Modes44// Encoding format: [1:0] bits45// 00: Slide1 (1-element sliding stride)46// 01: Slide2 (2-element sliding stride)47// 10: Slide3 (3-element sliding stride)48// 11: Reserved49//50// Used in sliding-window dot-product operations:51// vd = vs1 • vs2.slide{1|2|3} // • = dot product52//===----------------------------------------------------------------------===//53def SMT_VDot_Slide1 : SMTVEncoding2<0b00>;54def SMT_VDot_Slide2 : SMTVEncoding2<0b01>;55def SMT_VDot_Slide3 : SMTVEncoding2<0b10>;56 57//===----------------------------------------------------------------------===//58// Instruction formats59//===----------------------------------------------------------------------===//60 61let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {62// Base vector dot product (no slide) format.63class RVInstSMTVDot<SMTVEncoding2 sign, string opcodestr>64 : RVInst<(outs VRM2:$vd), (ins VR:$vs1, VR:$vs2), opcodestr,65 "$vd, $vs1, $vs2", [], InstFormatR> {66 bits<5> vd;67 bits<5> vs1;68 bits<5> vs2;69 70 let Inst{31-25} = OPMMA.Value;71 let Inst{24-20} = vs2;72 let Inst{19-15} = vs1;73 let Inst{14} = 0b0;74 let Inst{13-12} = sign.Value;75 let Inst{11-8} = vd{4-1};76 let Inst{7} = 0b0;77 let Inst{6-0} = OPC_CUSTOM_1.Value;78}79 80// Sliding-window vector dot product format.81class RVInstSMTVDotSlide<SMTVEncoding2 funct2, SMTVEncoding2 sign, string opcodestr>82 : RVInst<(outs VRM2:$vd), (ins VRM2:$vs1, VR:$vs2), opcodestr,83 "$vd, $vs1, $vs2", [], InstFormatR> {84 bits<5> vd;85 bits<5> vs1;86 bits<5> vs2;87 88 let Inst{31-25} = OPMMA_SLIDE.Value;89 let Inst{24-20} = vs2;90 let Inst{19-16} = vs1{4-1};91 let Inst{15-14} = funct2.Value;92 let Inst{13-12} = sign.Value;93 let Inst{11-8} = vd{4-1};94 let Inst{7} = 0b0;95 let Inst{6-0} = OPC_CUSTOM_1.Value;96}97}98 99//===----------------------------------------------------------------------===//100// Instructions101//===----------------------------------------------------------------------===//102 103let DecoderNamespace = "XSMT" in {104 105let Predicates = [HasVendorXSMTVDot], ElementsDependOn = EltDepsVL in {106// Base vector dot product (no slide) instructions107// NOTE: Destination registers (vd) MUST be even-numbered (v0, v2, ..., v30)108// due to hardware alignment constraints. Using odd registers may cause undefined behavior.109def SMT_VMADOT : RVInstSMTVDot<SMT_VDot_SS, "smt.vmadot">;110def SMT_VMADOTU : RVInstSMTVDot<SMT_VDot_UU, "smt.vmadotu">;111def SMT_VMADOTSU : RVInstSMTVDot<SMT_VDot_SU, "smt.vmadotsu">;112def SMT_VMADOTUS : RVInstSMTVDot<SMT_VDot_US, "smt.vmadotus">;113 114//===----------------------------------------------------------------------===//115// Sliding-window Vector Dot Product Instructions116//117// The numeric suffix (1, 2, 3) specifies the stride of the sliding window:118// 1: Window slides by 1 element per operation119// 2: Window slides by 2 elements per operation120// 3: Window slides by 3 elements per operation121//122// These instructions compute dot products with overlapping operand windows123// where the window position increments by <N> elements between computations.124//===----------------------------------------------------------------------===//125// NOTE: Destination registers (vd) and first source register (vs1) MUST be126// even-numbered (v0, v2, ..., v30) due to hardware alignment constraints.127// Using odd registers may cause undefined behavior.128def SMT_VMADOT1 : RVInstSMTVDotSlide<SMT_VDot_Slide1, SMT_VDot_SS, "smt.vmadot1">;129def SMT_VMADOT1U : RVInstSMTVDotSlide<SMT_VDot_Slide1, SMT_VDot_UU, "smt.vmadot1u">;130def SMT_VMADOT1SU : RVInstSMTVDotSlide<SMT_VDot_Slide1, SMT_VDot_SU, "smt.vmadot1su">;131def SMT_VMADOT1US : RVInstSMTVDotSlide<SMT_VDot_Slide1, SMT_VDot_US, "smt.vmadot1us">;132def SMT_VMADOT2 : RVInstSMTVDotSlide<SMT_VDot_Slide2, SMT_VDot_SS, "smt.vmadot2">;133def SMT_VMADOT2U : RVInstSMTVDotSlide<SMT_VDot_Slide2, SMT_VDot_UU, "smt.vmadot2u">;134def SMT_VMADOT2SU : RVInstSMTVDotSlide<SMT_VDot_Slide2, SMT_VDot_SU, "smt.vmadot2su">;135def SMT_VMADOT2US : RVInstSMTVDotSlide<SMT_VDot_Slide2, SMT_VDot_US, "smt.vmadot2us">;136def SMT_VMADOT3 : RVInstSMTVDotSlide<SMT_VDot_Slide3, SMT_VDot_SS, "smt.vmadot3">;137def SMT_VMADOT3U : RVInstSMTVDotSlide<SMT_VDot_Slide3, SMT_VDot_UU, "smt.vmadot3u">;138def SMT_VMADOT3SU : RVInstSMTVDotSlide<SMT_VDot_Slide3, SMT_VDot_SU, "smt.vmadot3su">;139def SMT_VMADOT3US : RVInstSMTVDotSlide<SMT_VDot_Slide3, SMT_VDot_US, "smt.vmadot3us">;140}141} // DecoderNamespace = "XSMT"142