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1//===------ RISCVProfiles.td - RISC-V Profiles -------------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9//===----------------------------------------------------------------------===//10// Profile Featuyre Lists11//===----------------------------------------------------------------------===//12 13// RVI Profile Family14 15defvar RVI20U32Features = [Feature32Bit, FeatureStdExtI];16defvar RVI20U64Features = [Feature64Bit, FeatureStdExtI];17 18// RVA Profile Family19 20defvar RVA20U64BaseFeatures = [Feature64Bit,21 FeatureStdExtI,22 FeatureStdExtM,23 FeatureStdExtA,24 FeatureStdExtF,25 FeatureStdExtD,26 FeatureStdExtC,27 FeatureStdExtZicsr,28 FeatureStdExtZicntr,29 FeatureStdExtZiccif,30 FeatureStdExtZiccrse,31 FeatureStdExtZiccamoa,32 FeatureStdExtZicclsm];33defvar RVA20U64Features = !listconcat(RVA20U64BaseFeatures,34 [FeatureStdExtZa128rs]);35 36defvar RVA20S64BaseFeatures = [FeatureStdExtZifencei,37 FeatureStdExtSvbare,38 FeatureStdExtSvade,39 FeatureStdExtSsccptr,40 FeatureStdExtSstvecd,41 FeatureStdExtSstvala];42defvar RVA20S64Features = !listconcat(RVA20U64Features,43 RVA20S64BaseFeatures);44 45defvar RVA22U64Features = !listconcat(RVA20U64BaseFeatures,46 [FeatureStdExtZa64rs,47 FeatureStdExtZihpm,48 FeatureStdExtZihintpause,49 FeatureStdExtB,50 FeatureStdExtZic64b,51 FeatureStdExtZicbom,52 FeatureStdExtZicbop,53 FeatureStdExtZicboz,54 FeatureStdExtZfhmin,55 FeatureStdExtZkt]);56 57defvar RVA22S64BaseFeatures = !listconcat(RVA20S64BaseFeatures,58 [FeatureStdExtSscounterenw,59 FeatureStdExtSvpbmt,60 FeatureStdExtSvinval]);61defvar RVA22S64Features = !listconcat(RVA22U64Features,62 RVA22S64BaseFeatures);63 64defvar RVA23U64Features = !listconcat(RVA22U64Features,65 [FeatureStdExtV,66 FeatureStdExtZvfhmin,67 FeatureStdExtZvbb,68 FeatureStdExtZvkt,69 FeatureStdExtZihintntl,70 FeatureStdExtZicond,71 FeatureStdExtZimop,72 FeatureStdExtZcmop,73 FeatureStdExtZcb,74 FeatureStdExtZfa,75 FeatureStdExtZawrs,76 FeatureStdExtSupm]);77 78defvar RVA23S64BaseFeatures = !listconcat(RVA22S64BaseFeatures,79 [FeatureStdExtSvnapot,80 FeatureStdExtSstc,81 FeatureStdExtSscofpmf,82 FeatureStdExtSsnpm,83 FeatureStdExtSsu64xl,84 FeatureStdExtSha]);85defvar RVA23S64Features = !listconcat(RVA23U64Features,86 RVA23S64BaseFeatures);87 88// RVB Profile Family89 90defvar RVB23U64Features = !listconcat(RVA20U64BaseFeatures,91 [FeatureStdExtZihpm,92 FeatureStdExtZa64rs,93 FeatureStdExtZihintpause,94 FeatureStdExtB,95 FeatureStdExtZic64b,96 FeatureStdExtZicbom,97 FeatureStdExtZicbop,98 FeatureStdExtZicboz,99 FeatureStdExtZkt,100 FeatureStdExtZihintntl,101 FeatureStdExtZicond,102 FeatureStdExtZimop,103 FeatureStdExtZcmop,104 FeatureStdExtZcb,105 FeatureStdExtZfa,106 FeatureStdExtZawrs]);107 108defvar RVB23S64Features = !listconcat(RVB23U64Features,109 [FeatureStdExtZifencei,110 FeatureStdExtSvnapot,111 FeatureStdExtSvbare,112 FeatureStdExtSvade,113 FeatureStdExtSsccptr,114 FeatureStdExtSstvecd,115 FeatureStdExtSstvala,116 FeatureStdExtSscounterenw,117 FeatureStdExtSvpbmt,118 FeatureStdExtSvinval,119 FeatureStdExtSstc,120 FeatureStdExtSscofpmf,121 FeatureStdExtSsu64xl]);122 123// RVM Profile Family124 125defvar RVM23U32Features = [Feature32Bit,126 FeatureStdExtI,127 FeatureStdExtM,128 FeatureStdExtB,129 FeatureStdExtZicond,130 FeatureStdExtZihintpause,131 FeatureStdExtZihintntl,132 FeatureStdExtZce,133 FeatureStdExtZicbop,134 FeatureStdExtZimop,135 FeatureStdExtZcmop];136 137//===----------------------------------------------------------------------===//138// Profile Definitions for ISA String139//===----------------------------------------------------------------------===//140 141class RISCVProfile<string name, list<SubtargetFeature> features>142 : SubtargetFeature<name, "Is" # NAME, "true",143 "RISC-V " # name # " profile", features> {144 // Indicates if the profile is not yet ratified, so should be treated as145 // experimental.146 bit Experimental = false;147}148class RISCVExperimentalProfile<string name, list<SubtargetFeature> features>149 : RISCVProfile<"experimental-"#name, features> {150 let Experimental = true;151}152 153def RVI20U32 : RISCVProfile<"rvi20u32", RVI20U32Features>;154def RVI20U64 : RISCVProfile<"rvi20u64", RVI20U64Features>;155def RVA20U64 : RISCVProfile<"rva20u64", RVA20U64Features>;156def RVA20S64 : RISCVProfile<"rva20s64", RVA20S64Features>;157def RVA22U64 : RISCVProfile<"rva22u64", RVA22U64Features>;158def RVA22S64 : RISCVProfile<"rva22s64", RVA22S64Features>;159def RVA23U64 : RISCVProfile<"rva23u64", RVA23U64Features>;160def RVA23S64 : RISCVProfile<"rva23s64", RVA23S64Features>;161def RVB23U64 : RISCVProfile<"rvb23u64", RVB23U64Features>;162def RVB23S64 : RISCVProfile<"rvb23s64", RVB23S64Features>;163def RVM23U32 : RISCVExperimentalProfile<"rvm23u32", RVM23U32Features>;164