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1//===-- RISCVSchedule.td - RISC-V Scheduling Definitions ---*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9/// Define scheduler resources associated with def operands.10def WriteIALU : SchedWrite; // 32 or 64-bit integer ALU operations11def WriteIALU32 : SchedWrite; // 32-bit integer ALU operations on RV64I12def WriteShiftImm : SchedWrite; // 32 or 64-bit shift by immediate operations13def WriteShiftImm32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix14def WriteShiftReg : SchedWrite; // 32 or 64-bit shift by immediate operations15def WriteShiftReg32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix16def WriteIDiv : SchedWrite; // 32-bit or 64-bit divide17def WriteIDiv32 : SchedWrite; // 32-bit divide on RV64I18def WriteIRem : SchedWrite; // 32-bit or 64-bit remainder19def WriteIRem32 : SchedWrite; // 32-bit remainder on RV64I20def WriteIMul : SchedWrite; // 32-bit or 64-bit multiply21def WriteIMul32 : SchedWrite; // 32-bit multiply on RV64I22def WriteJmp : SchedWrite; // Jump23def WriteJal : SchedWrite; // Jump and link24def WriteJalr : SchedWrite; // Jump and link register25def WriteNop : SchedWrite;26def WriteLDB : SchedWrite; // Load byte27def WriteLDH : SchedWrite; // Load half-word28def WriteLDW : SchedWrite; // Load word29def WriteLDD : SchedWrite; // Load double-word30def WriteCSR : SchedWrite; // CSR instructions31def WriteSTB : SchedWrite; // Store byte32def WriteSTH : SchedWrite; // Store half-word33def WriteSTW : SchedWrite; // Store word34def WriteSTD : SchedWrite; // Store double-word35def WriteAtomicB : SchedWrite; //Atomic memory operation byte size36def WriteAtomicH : SchedWrite; //Atomic memory operation halfword size37def WriteAtomicW : SchedWrite; //Atomic memory operation word size38def WriteAtomicD : SchedWrite; //Atomic memory operation double word size39def WriteAtomicLDW : SchedWrite; // Atomic load word40def WriteAtomicLDD : SchedWrite; // Atomic load double word41def WriteAtomicSTW : SchedWrite; // Atomic store word42def WriteAtomicSTD : SchedWrite; // Atomic store double word43def WriteFAdd16 : SchedWrite; // 16-bit floating point addition/subtraction44def WriteFAdd32 : SchedWrite; // 32-bit floating point addition/subtraction45def WriteFAdd64 : SchedWrite; // 64-bit floating point addition/subtraction46def WriteFAdd128 : SchedWrite; // 128-bit floating point addition/subtraction47def WriteFMul16 : SchedWrite; // 16-bit floating point multiply48def WriteFMul32 : SchedWrite; // 32-bit floating point multiply49def WriteFMul64 : SchedWrite; // 64-bit floating point multiply50def WriteFMul128 : SchedWrite; // 128-bit floating point multiply51def WriteFMA16 : SchedWrite; // 16-bit floating point fused multiply-add52def WriteFMA32 : SchedWrite; // 32-bit floating point fused multiply-add53def WriteFMA64 : SchedWrite; // 64-bit floating point fused multiply-add54def WriteFMA128 : SchedWrite; // 128-bit floating point fused multiply-add55def WriteFDiv16 : SchedWrite; // 16-bit floating point divide56def WriteFDiv32 : SchedWrite; // 32-bit floating point divide57def WriteFDiv64 : SchedWrite; // 64-bit floating point divide58def WriteFDiv128 : SchedWrite; // 128-bit floating point divide59def WriteFSqrt16 : SchedWrite; // 16-bit floating point sqrt60def WriteFSqrt32 : SchedWrite; // 32-bit floating point sqrt61def WriteFSqrt64 : SchedWrite; // 64-bit floating point sqrt62def WriteFSqrt128 : SchedWrite; // 128-bit floating point sqrt63 64// Integer to float conversions65def WriteFCvtI32ToF16 : SchedWrite;66def WriteFCvtI32ToF32 : SchedWrite;67def WriteFCvtI32ToF64 : SchedWrite;68def WriteFCvtI32ToF128 : SchedWrite;69def WriteFCvtI64ToF16 : SchedWrite; // RV64I only70def WriteFCvtI64ToF32 : SchedWrite; // RV64I only71def WriteFCvtI64ToF64 : SchedWrite; // RV64I only72def WriteFCvtI64ToF128 : SchedWrite; // RV64I only73 74// Float to integer conversions75def WriteFCvtF16ToI32 : SchedWrite;76def WriteFCvtF16ToI64 : SchedWrite; // RV64I only77def WriteFCvtF32ToI32 : SchedWrite;78def WriteFCvtF32ToI64 : SchedWrite; // RV64I only79def WriteFCvtF64ToI32 : SchedWrite;80def WriteFCvtF64ToI64 : SchedWrite; // RV64I only81def WriteFCvtF128ToI32 : SchedWrite;82def WriteFCvtF128ToI64 : SchedWrite; // RV64I only83 84// Float to float conversions85def WriteFCvtF32ToF64 : SchedWrite;86def WriteFCvtF64ToF32 : SchedWrite;87def WriteFCvtF16ToF32 : SchedWrite;88def WriteFCvtF32ToF16 : SchedWrite;89def WriteFCvtF16ToF64 : SchedWrite;90def WriteFCvtF64ToF16 : SchedWrite;91def WriteFCvtF128ToF32 : SchedWrite;92def WriteFCvtF128ToF64 : SchedWrite;93def WriteFCvtF32ToF128 : SchedWrite;94def WriteFCvtF64ToF128 : SchedWrite;95 96// Zfa fround instructions.97def WriteFRoundF32 : SchedWrite;98def WriteFRoundF64 : SchedWrite;99def WriteFRoundF16 : SchedWrite;100def WriteFRoundF128 : SchedWrite;101 102def WriteFClass16 : SchedWrite; // 16-bit floating point classify103def WriteFClass32 : SchedWrite; // 32-bit floating point classify104def WriteFClass64 : SchedWrite; // 64-bit floating point classify105def WriteFClass128 : SchedWrite; // 128-bit floating point classify106def WriteFCmp16 : SchedWrite; // 16-bit floating point compare107def WriteFCmp32 : SchedWrite; // 32-bit floating point compare108def WriteFCmp64 : SchedWrite; // 64-bit floating point compare109def WriteFCmp128 : SchedWrite; // 128-bit floating point compare110def WriteFSGNJ16 : SchedWrite; // 16-bit floating point sign-injection111def WriteFSGNJ32 : SchedWrite; // 32-bit floating point sign-injection112def WriteFSGNJ64 : SchedWrite; // 64-bit floating point sign-injection113def WriteFSGNJ128 : SchedWrite; // 128-bit floating point sign-injection114def WriteFMinMax16 : SchedWrite; // 16-bit floating point min or max115def WriteFMinMax32 : SchedWrite; // 32-bit floating point min or max116def WriteFMinMax64 : SchedWrite; // 64-bit floating point min or max117def WriteFMinMax128 : SchedWrite; // 128-bit floating point min or max118 119def WriteFMovF16ToI16 : SchedWrite;120def WriteFMovI16ToF16 : SchedWrite;121def WriteFMovF32ToI32 : SchedWrite;122def WriteFMovI32ToF32 : SchedWrite;123def WriteFMovF64ToI64 : SchedWrite; // RV64I only124def WriteFMovI64ToF64 : SchedWrite; // RV64I only125 126def WriteFLI16 : SchedWrite; // Floating point constant load127def WriteFLI32 : SchedWrite; // Floating point constant load128def WriteFLI64 : SchedWrite; // Floating point constant load129def WriteFLI128 : SchedWrite; // Floating point constant load130 131def WriteFLD16 : SchedWrite; // Floating point sp load132def WriteFLD32 : SchedWrite; // Floating point sp load133def WriteFLD64 : SchedWrite; // Floating point dp load134def WriteFLD128 : SchedWrite; // Floating point qp load135def WriteFST16 : SchedWrite; // Floating point sp store136def WriteFST32 : SchedWrite; // Floating point sp store137def WriteFST64 : SchedWrite; // Floating point dp store138def WriteFST128 : SchedWrite; // Floating point qp store139 140// short forward branch for Bullet141def WriteSFB : SchedWrite;142def ReadSFBJmp : SchedRead;143def ReadSFBALU : SchedRead;144 145/// Define scheduler resources associated with use operands.146def ReadJmp : SchedRead;147def ReadJalr : SchedRead;148def ReadCSR : SchedRead;149def ReadMemBase : SchedRead;150def ReadFMemBase : SchedRead;151def ReadStoreData : SchedRead;152def ReadFStoreData : SchedRead;153def ReadIALU : SchedRead;154def ReadIALU32 : SchedRead; // 32-bit integer ALU operations on RV64I155def ReadShiftImm : SchedRead;156def ReadShiftImm32 : SchedRead; // 32-bit shift by immediate operations on RV64Ix157def ReadShiftReg : SchedRead;158def ReadShiftReg32 : SchedRead; // 32-bit shift by register operations on RV64Ix159def ReadIDiv : SchedRead;160def ReadIDiv32 : SchedRead;161def ReadIRem : SchedRead;162def ReadIRem32 : SchedRead;163def ReadIMul : SchedRead;164def ReadIMul32 : SchedRead;165def ReadAtomicBA : SchedRead;166def ReadAtomicBD : SchedRead;167def ReadAtomicHA : SchedRead;168def ReadAtomicHD : SchedRead;169def ReadAtomicWA : SchedRead;170def ReadAtomicWD : SchedRead;171def ReadAtomicDA : SchedRead;172def ReadAtomicDD : SchedRead;173def ReadAtomicLDW : SchedRead; // Atomic load word174def ReadAtomicLDD : SchedRead; // Atomic load double word175def ReadAtomicSTW : SchedRead; // Atomic store word176def ReadAtomicSTD : SchedRead; // Atomic store double word177def ReadFAdd16 : SchedRead; // 16-bit floating point addition/subtraction178def ReadFAdd32 : SchedRead; // 32-bit floating point addition/subtraction179def ReadFAdd64 : SchedRead; // 64-bit floating point addition/subtraction180def ReadFAdd128 : SchedRead; // 128-bit floating point addition/subtraction181def ReadFMul16 : SchedRead; // 16-bit floating point multiply182def ReadFMul32 : SchedRead; // 32-bit floating point multiply183def ReadFMul64 : SchedRead; // 64-bit floating point multiply184def ReadFMul128 : SchedRead; // 128-bit floating point multiply185def ReadFMA16 : SchedRead; // 16-bit floating point fused multiply-add186def ReadFMA16Addend : SchedRead; // 16-bit floating point fused multiply-add (addend)187def ReadFMA32 : SchedRead; // 32-bit floating point fused multiply-add188def ReadFMA32Addend : SchedRead; // 32-bit floating point fused multiply-add (addend)189def ReadFMA64 : SchedRead; // 64-bit floating point fused multiply-add190def ReadFMA64Addend : SchedRead; // 64-bit floating point fused multiply-add (addend)191def ReadFMA128 : SchedRead; // 128-bit floating point fused multiply-add192def ReadFMA128Addend: SchedRead; // 128-bit floating point fused multiply-add (addend)193def ReadFDiv16 : SchedRead; // 16-bit floating point divide194def ReadFDiv32 : SchedRead; // 32-bit floating point divide195def ReadFDiv64 : SchedRead; // 64-bit floating point divide196def ReadFDiv128 : SchedRead; // 128-bit floating point divide197def ReadFSqrt16 : SchedRead; // 16-bit floating point sqrt198def ReadFSqrt32 : SchedRead; // 32-bit floating point sqrt199def ReadFSqrt64 : SchedRead; // 64-bit floating point sqrt200def ReadFSqrt128 : SchedRead; // 128-bit floating point sqrt201def ReadFCmp16 : SchedRead;202def ReadFCmp32 : SchedRead;203def ReadFCmp64 : SchedRead;204def ReadFCmp128 : SchedRead;205def ReadFSGNJ16 : SchedRead;206def ReadFSGNJ32 : SchedRead;207def ReadFSGNJ64 : SchedRead;208def ReadFSGNJ128 : SchedRead;209def ReadFMinMax16 : SchedRead;210def ReadFMinMax32 : SchedRead;211def ReadFMinMax64 : SchedRead;212def ReadFMinMax128 : SchedRead;213def ReadFCvtF16ToI32 : SchedRead;214def ReadFCvtF16ToI64 : SchedRead;215def ReadFCvtF32ToI32 : SchedRead;216def ReadFCvtF32ToI64 : SchedRead;217def ReadFCvtF64ToI32 : SchedRead;218def ReadFCvtF64ToI64 : SchedRead;219def ReadFCvtF128ToI32 : SchedRead;220def ReadFCvtF128ToI64 : SchedRead;221def ReadFCvtI32ToF16 : SchedRead;222def ReadFCvtI32ToF32 : SchedRead;223def ReadFCvtI32ToF64 : SchedRead;224def ReadFCvtI32ToF128 : SchedRead;225def ReadFCvtI64ToF16 : SchedRead;226def ReadFCvtI64ToF32 : SchedRead;227def ReadFCvtI64ToF64 : SchedRead;228def ReadFCvtI64ToF128 : SchedRead;229def ReadFMovF16ToI16 : SchedRead;230def ReadFMovI16ToF16 : SchedRead;231def ReadFMovF32ToI32 : SchedRead;232def ReadFMovI32ToF32 : SchedRead;233def ReadFMovF64ToI64 : SchedRead;234def ReadFMovI64ToF64 : SchedRead;235def ReadFCvtF32ToF64 : SchedRead;236def ReadFCvtF64ToF32 : SchedRead;237def ReadFCvtF16ToF32 : SchedRead;238def ReadFCvtF32ToF16 : SchedRead;239def ReadFCvtF16ToF64 : SchedRead;240def ReadFCvtF64ToF16 : SchedRead;241def ReadFCvtF128ToF32 : SchedRead;242def ReadFCvtF128ToF64 : SchedRead;243def ReadFCvtF32ToF128 : SchedRead;244def ReadFCvtF64ToF128 : SchedRead;245 246def ReadFRoundF16 : SchedRead;247def ReadFRoundF32 : SchedRead;248def ReadFRoundF64 : SchedRead;249def ReadFRoundF128 : SchedRead;250 251def ReadFClass16 : SchedRead;252def ReadFClass32 : SchedRead;253def ReadFClass64 : SchedRead;254def ReadFClass128 : SchedRead;255 256// For CPUs that support Zfhmin, but not Zfh.257multiclass UnsupportedSchedZfh {258let Unsupported = true in {259def : WriteRes<WriteFAdd16, []>;260def : WriteRes<WriteFClass16, []>;261def : WriteRes<WriteFCvtI64ToF16, []>;262def : WriteRes<WriteFCvtI32ToF16, []>;263def : WriteRes<WriteFCvtF16ToI64, []>;264def : WriteRes<WriteFCvtF16ToI32, []>;265def : WriteRes<WriteFDiv16, []>;266def : WriteRes<WriteFCmp16, []>;267def : WriteRes<WriteFMA16, []>;268def : WriteRes<WriteFMinMax16, []>;269def : WriteRes<WriteFMul16, []>;270def : WriteRes<WriteFSGNJ16, []>;271def : WriteRes<WriteFSqrt16, []>;272 273def : ReadAdvance<ReadFAdd16, 0>;274def : ReadAdvance<ReadFClass16, 0>;275def : ReadAdvance<ReadFCvtI64ToF16, 0>;276def : ReadAdvance<ReadFCvtI32ToF16, 0>;277def : ReadAdvance<ReadFCvtF16ToI64, 0>;278def : ReadAdvance<ReadFCvtF16ToI32, 0>;279def : ReadAdvance<ReadFDiv16, 0>;280def : ReadAdvance<ReadFCmp16, 0>;281def : ReadAdvance<ReadFMA16, 0>;282def : ReadAdvance<ReadFMA16Addend, 0>;283def : ReadAdvance<ReadFMinMax16, 0>;284def : ReadAdvance<ReadFMul16, 0>;285def : ReadAdvance<ReadFSGNJ16, 0>;286def : ReadAdvance<ReadFSqrt16, 0>;287} // Unsupported = true288}289 290// For CPUs that support neither Zfhmin or Zfh.291multiclass UnsupportedSchedZfhmin : UnsupportedSchedZfh {292let Unsupported = true in {293def : WriteRes<WriteFCvtF16ToF64, []>;294def : WriteRes<WriteFCvtF64ToF16, []>;295def : WriteRes<WriteFCvtF16ToF32, []>;296def : WriteRes<WriteFCvtF32ToF16, []>;297def : WriteRes<WriteFLD16, []>;298def : WriteRes<WriteFMovI16ToF16, []>;299def : WriteRes<WriteFMovF16ToI16, []>;300def : WriteRes<WriteFST16, []>;301 302def : ReadAdvance<ReadFCvtF16ToF64, 0>;303def : ReadAdvance<ReadFCvtF64ToF16, 0>;304def : ReadAdvance<ReadFCvtF16ToF32, 0>;305def : ReadAdvance<ReadFCvtF32ToF16, 0>;306def : ReadAdvance<ReadFMovI16ToF16, 0>;307def : ReadAdvance<ReadFMovF16ToI16, 0>;308} // Unsupported = true309}310 311multiclass UnsupportedSchedQ {312let Unsupported = true in {313def : WriteRes<WriteFST128, []>;314def : WriteRes<WriteFLD128, []>;315def : WriteRes<WriteFAdd128, []>;316def : WriteRes<WriteFSGNJ128, []>;317def : WriteRes<WriteFMinMax128, []>;318def : WriteRes<WriteFCvtI32ToF128, []>;319def : WriteRes<WriteFCvtI64ToF128, []>;320def : WriteRes<WriteFCvtF128ToI32, []>;321def : WriteRes<WriteFCvtF128ToI64, []>;322def : WriteRes<WriteFCvtF32ToF128, []>;323def : WriteRes<WriteFCvtF128ToF32, []>;324def : WriteRes<WriteFCvtF64ToF128, []>;325def : WriteRes<WriteFCvtF128ToF64, []>;326def : WriteRes<WriteFClass128, []>;327def : WriteRes<WriteFCmp128, []>;328def : WriteRes<WriteFMul128, []>;329def : WriteRes<WriteFMA128, []>;330def : WriteRes<WriteFDiv128, []>;331def : WriteRes<WriteFSqrt128, []>;332 333def : ReadAdvance<ReadFAdd128, 0>;334def : ReadAdvance<ReadFMul128, 0>;335def : ReadAdvance<ReadFMA128, 0>;336def : ReadAdvance<ReadFMA128Addend, 0>;337def : ReadAdvance<ReadFDiv128, 0>;338def : ReadAdvance<ReadFSqrt128, 0>;339def : ReadAdvance<ReadFCmp128, 0>;340def : ReadAdvance<ReadFSGNJ128, 0>;341def : ReadAdvance<ReadFMinMax128, 0>;342def : ReadAdvance<ReadFCvtF128ToI32, 0>;343def : ReadAdvance<ReadFCvtF128ToI64, 0>;344def : ReadAdvance<ReadFCvtI32ToF128, 0>;345def : ReadAdvance<ReadFCvtI64ToF128, 0>;346def : ReadAdvance<ReadFCvtF32ToF128, 0>;347def : ReadAdvance<ReadFCvtF128ToF32, 0>;348def : ReadAdvance<ReadFCvtF64ToF128, 0>;349def : ReadAdvance<ReadFCvtF128ToF64, 0>;350def : ReadAdvance<ReadFClass128, 0>;351} // Unsupported = true352}353 354multiclass UnsupportedSchedD : UnsupportedSchedQ {355let Unsupported = true in {356def : WriteRes<WriteFST64, []>;357def : WriteRes<WriteFLD64, []>;358def : WriteRes<WriteFAdd64, []>;359def : WriteRes<WriteFSGNJ64, []>;360def : WriteRes<WriteFMinMax64, []>;361def : WriteRes<WriteFCvtI32ToF64, []>;362def : WriteRes<WriteFCvtI64ToF64, []>;363def : WriteRes<WriteFCvtF64ToI32, []>;364def : WriteRes<WriteFCvtF64ToI64, []>;365def : WriteRes<WriteFCvtF32ToF64, []>;366def : WriteRes<WriteFCvtF64ToF32, []>;367def : WriteRes<WriteFClass64, []>;368def : WriteRes<WriteFCmp64, []>;369def : WriteRes<WriteFMovF64ToI64, []>;370def : WriteRes<WriteFMovI64ToF64, []>;371def : WriteRes<WriteFMul64, []>;372def : WriteRes<WriteFMA64, []>;373def : WriteRes<WriteFDiv64, []>;374def : WriteRes<WriteFSqrt64, []>;375 376def : ReadAdvance<ReadFAdd64, 0>;377def : ReadAdvance<ReadFMul64, 0>;378def : ReadAdvance<ReadFMA64, 0>;379def : ReadAdvance<ReadFMA64Addend, 0>;380def : ReadAdvance<ReadFDiv64, 0>;381def : ReadAdvance<ReadFSqrt64, 0>;382def : ReadAdvance<ReadFCmp64, 0>;383def : ReadAdvance<ReadFSGNJ64, 0>;384def : ReadAdvance<ReadFMinMax64, 0>;385def : ReadAdvance<ReadFCvtF64ToI32, 0>;386def : ReadAdvance<ReadFCvtF64ToI64, 0>;387def : ReadAdvance<ReadFCvtI32ToF64, 0>;388def : ReadAdvance<ReadFCvtI64ToF64, 0>;389def : ReadAdvance<ReadFCvtF32ToF64, 0>;390def : ReadAdvance<ReadFCvtF64ToF32, 0>;391def : ReadAdvance<ReadFMovF64ToI64, 0>;392def : ReadAdvance<ReadFMovI64ToF64, 0>;393def : ReadAdvance<ReadFClass64, 0>;394} // Unsupported = true395}396 397// For CPUs with no floating point.398multiclass UnsupportedSchedF : UnsupportedSchedD, UnsupportedSchedZfhmin {399let Unsupported = true in {400def : WriteRes<WriteFST32, []>;401def : WriteRes<WriteFLD32, []>;402def : WriteRes<WriteFAdd32, []>;403def : WriteRes<WriteFSGNJ32, []>;404def : WriteRes<WriteFMinMax32, []>;405def : WriteRes<WriteFCvtI32ToF32, []>;406def : WriteRes<WriteFCvtI64ToF32, []>;407def : WriteRes<WriteFCvtF32ToI32, []>;408def : WriteRes<WriteFCvtF32ToI64, []>;409def : WriteRes<WriteFClass32, []>;410def : WriteRes<WriteFCmp32, []>;411def : WriteRes<WriteFMovF32ToI32, []>;412def : WriteRes<WriteFMovI32ToF32, []>;413def : WriteRes<WriteFMul32, []>;414def : WriteRes<WriteFMA32, []>;415def : WriteRes<WriteFDiv32, []>;416def : WriteRes<WriteFSqrt32, []>;417 418def : ReadAdvance<ReadFAdd32, 0>;419def : ReadAdvance<ReadFMul32, 0>;420def : ReadAdvance<ReadFMA32, 0>;421def : ReadAdvance<ReadFMA32Addend, 0>;422def : ReadAdvance<ReadFDiv32, 0>;423def : ReadAdvance<ReadFSqrt32, 0>;424def : ReadAdvance<ReadFCmp32, 0>;425def : ReadAdvance<ReadFSGNJ32, 0>;426def : ReadAdvance<ReadFMinMax32, 0>;427def : ReadAdvance<ReadFCvtF32ToI32, 0>;428def : ReadAdvance<ReadFCvtF32ToI64, 0>;429def : ReadAdvance<ReadFCvtI32ToF32, 0>;430def : ReadAdvance<ReadFCvtI64ToF32, 0>;431def : ReadAdvance<ReadFMovF32ToI32, 0>;432def : ReadAdvance<ReadFMovI32ToF32, 0>;433def : ReadAdvance<ReadFClass32, 0>;434def : ReadAdvance<ReadFStoreData, 0>;435def : ReadAdvance<ReadFMemBase, 0>;436} // Unsupported = true437}438 439multiclass UnsupportedSchedSFB {440let Unsupported = true in {441def : WriteRes<WriteSFB, []>;442 443def : ReadAdvance<ReadSFBJmp, 0>;444def : ReadAdvance<ReadSFBALU, 0>;445} // Unsupported = true446}447 448multiclass UnsupportedSchedZfaWithQ {449let Unsupported = true in {450def : WriteRes<WriteFRoundF128, []>;451def : WriteRes<WriteFLI128, []>;452 453def : ReadAdvance<ReadFRoundF128, 0>;454}455}456 457multiclass UnsupportedSchedZfaWithD : UnsupportedSchedZfaWithQ {458let Unsupported = true in {459def : WriteRes<WriteFRoundF64, []>;460def : WriteRes<WriteFLI64, []>;461 462def : ReadAdvance<ReadFRoundF64, 0>;463}464}465 466multiclass UnsupportedSchedZfaWithZfh {467let Unsupported = true in {468def : WriteRes<WriteFRoundF16, []>;469def : WriteRes<WriteFLI16, []>;470 471def : ReadAdvance<ReadFRoundF16, 0>;472}473}474 475multiclass UnsupportedSchedZfa : UnsupportedSchedZfaWithD,476 UnsupportedSchedZfaWithZfh {477let Unsupported = true in {478def : WriteRes<WriteFRoundF32, []>;479def : WriteRes<WriteFLI32, []>;480 481def : ReadAdvance<ReadFRoundF32, 0>;482} // Unsupported = true483}484 485multiclass UnsupportedSchedZabha {486let Unsupported = true in {487def : WriteRes<WriteAtomicB, []>;488def : WriteRes<WriteAtomicH, []>;489 490def : ReadAdvance<ReadAtomicBA, 0>;491def : ReadAdvance<ReadAtomicBD, 0>;492def : ReadAdvance<ReadAtomicHA, 0>;493def : ReadAdvance<ReadAtomicHD, 0>;494} // Unsupported = true495}496 497multiclass UnsupportedSchedA {498let Unsupported = true in {499def : WriteRes<WriteAtomicW, []>;500def : WriteRes<WriteAtomicD, []>;501def : WriteRes<WriteAtomicLDW, []>;502def : WriteRes<WriteAtomicLDD, []>;503def : WriteRes<WriteAtomicSTW, []>;504def : WriteRes<WriteAtomicSTD, []>;505 506def : ReadAdvance<ReadAtomicWA, 0>;507def : ReadAdvance<ReadAtomicWD, 0>;508def : ReadAdvance<ReadAtomicDA, 0>;509def : ReadAdvance<ReadAtomicDD, 0>;510def : ReadAdvance<ReadAtomicLDW, 0>;511def : ReadAdvance<ReadAtomicLDD, 0>;512def : ReadAdvance<ReadAtomicSTW, 0>;513def : ReadAdvance<ReadAtomicSTD, 0>;514} // Unsupported = true515}516 517// Include the scheduler resources for other instruction extensions.518include "RISCVScheduleZb.td"519include "RISCVScheduleV.td"520include "RISCVScheduleXSf.td"521include "RISCVScheduleZvk.td"522 523// Vendor Extensions524multiclass UnsupportedSchedXsf {525 defm : UnsupportedSchedXsfvcp;526 defm : UnsupportedSchedXSfvfexp;527 defm : UnsupportedSchedXSfvfexpa;528 defm : UnsupportedSchedXSfvfnrclipxfqf;529 defm : UnsupportedSchedXSfvfwmaccqqq;530 defm : UnsupportedSchedXSfvqmaccdod;531 defm : UnsupportedSchedXSfvqmaccqoq;532}533