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1//===-- SPIRV.td - Describe the SPIR-V Target Machine ------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9include "llvm/Target/Target.td"10 11include "SPIRVRegisterInfo.td"12include "SPIRVRegisterBanks.td"13include "SPIRVInstrInfo.td"14include "SPIRVCombine.td"15include "SPIRVBuiltins.td"16 17defm : RemapAllTargetPseudoPointerOperands<pID>;18 19def SPIRVInstrInfo : InstrInfo;20 21class Proc<string Name, list<SubtargetFeature> Features>22 : Processor<Name, NoItineraries, Features>;23 24def : Proc<"generic", []>;25 26def SPIRVInstPrinter : AsmWriter {27 string AsmWriterClassName = "InstPrinter";28 bit isMCAsmWriter = 1;29}30 31def SPIRV : Target {32 let InstructionSet = SPIRVInstrInfo;33 let AssemblyWriters = [SPIRVInstPrinter];34}35