54 lines · plain
1//===-- SPIRVRegisterInfo.td - SPIR-V Register defs --------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// Declarations that describe the SPIR-V register file.10//11//===----------------------------------------------------------------------===//12 13let Namespace = "SPIRV" in {14 // Pointer types for patterns with the GlobalISelEmitter15 def p64 : PtrValueType <i64, 0>;16 17 class VTPtrVec<int nelem, PtrValueType ptr>18 : VTVec<nelem, ValueType<ptr.Size, ptr.LLVMName>, ptr.LLVMName> {19 int isPointer = true;20 }21 22 def v2p64 : VTPtrVec<2, p64>;23 24 // Class for type registers25 def TYPE0 : Register<"TYPE0">;26 def TYPE : RegisterClass<"SPIRV", [i64], 64, (add TYPE0)>;27 28 // Class for non-type registers29 def ID0 : Register<"ID0">;30 def fID0 : Register<"fID0">;31 def pID0 : Register<"pID0">;32 def vID0 : Register<"vID0">;33 def vfID0 : Register<"vfID0">;34 def vpID0 : Register<"vpID0">;35 36 def iID : RegisterClass<"SPIRV", [i64], 64, (add ID0)>;37 def fID : RegisterClass<"SPIRV", [f64], 64, (add fID0)>;38 def pID : RegisterClass<"SPIRV", [p64], 64, (add pID0)>;39 def vID : RegisterClass<"SPIRV", [v2i64], 64, (add vID0)>;40 def vfID : RegisterClass<"SPIRV", [v2f64], 64, (add vfID0)>;41 def vpID : RegisterClass<"SPIRV", [v2p64], 64, (add vpID0)>;42 43 def ID : RegisterClass<44 "SPIRV",45 [i64, f64, p64, v2i64, v2f64, v2p64],46 64,47 (add iID, fID, pID, vID, vfID, vpID)>;48 49 // A few instructions like OpName can take ids from both type and non-type50 // instructions, so we need a super-class to allow for both to count as valid51 // arguments for these instructions.52 def ANY : RegisterClass<"SPIRV", [i64], 64, (add TYPE, ID)>;53}54