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1//===-- SparcSchedule.td - Describe the Sparc Itineraries ----*- tablegen -*-=//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9//10//===----------------------------------------------------------------------===//11 12def IIC_iu_or_fpu_instr : InstrItinClass;13def IIC_iu_instr : InstrItinClass;14def IIC_fpu_normal_instr : InstrItinClass;15def IIC_fpu_fast_instr : InstrItinClass;16def IIC_jmp_or_call : InstrItinClass;17def IIC_ldd : InstrItinClass;18def IIC_st : InstrItinClass;19def IIC_std : InstrItinClass;20def IIC_iu_smul : InstrItinClass;21def IIC_iu_umul : InstrItinClass;22def IIC_iu_div : InstrItinClass;23def IIC_ticc : InstrItinClass;24def IIC_ldstub : InstrItinClass;25def IIC_fpu_muls : InstrItinClass;26def IIC_fpu_muld : InstrItinClass;27def IIC_fpu_divs : InstrItinClass;28def IIC_fpu_divd : InstrItinClass;29def IIC_fpu_sqrts : InstrItinClass;30def IIC_fpu_sqrtd : InstrItinClass;31def IIC_fpu_abs : InstrItinClass;32def IIC_fpu_movs : InstrItinClass;33def IIC_fpu_negs : InstrItinClass;34def IIC_smac_umac : InstrItinClass;35def IIC_fpu_stod : InstrItinClass;36 37def LEONIU : FuncUnit; // integer unit38def LEONFPU : FuncUnit; // floating-point unit39 40// Ref: http://www.atmel.com/Images/doc4226.pdf41 42def LEON2Itineraries : ProcessorItineraries<43[LEONIU, LEONFPU], [], [44 InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,45 InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,46 InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,47 InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,48 InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,49 InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,50 InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,51 InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,52 InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [5, 1]>,53 InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [5, 1]>,54 InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,55 InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>,56 InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,57 InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [16, 1]>,58 InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [21, 1]>,59 InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [20, 1]>,60 InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [36, 1]>,61 InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [37, 1]>,62 InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [65, 1]>,63 InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,64 InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,65 InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,66 InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [2, 1]>67]>;68 69def LEON3Itineraries : ProcessorItineraries<70[LEONIU, LEONFPU], [], [71 InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,72 InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,73 InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,74 InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>,75 InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,76 InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,77 InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>,78 InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,79 InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>,80 InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>,81 InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,82 InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>,83 InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,84 InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,85 InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>,86 InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>,87 InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>,88 InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>,89 InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>,90 InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>,91 InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,92 InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,93 InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,94 InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]>95]>;96 97def LEON4Itineraries : ProcessorItineraries<98[LEONIU, LEONFPU], [], [99 InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,100 InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,101 InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,102 InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>,103 InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,104 InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,105 InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,106 InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,107 InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>,108 InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>,109 InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,110 InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>,111 InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,112 InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,113 InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>,114 InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>,115 InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>,116 InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>,117 InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>,118 InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>,119 InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,120 InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,121 InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,122 InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]>123]>;124