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1//===-- SystemZ.td - Describe the SystemZ target machine -----*- tblgen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9//===----------------------------------------------------------------------===//10// Target-independent interfaces which we are implementing11//===----------------------------------------------------------------------===//12 13include "llvm/Target/Target.td"14 15//===----------------------------------------------------------------------===//16// SystemZ subtarget features17//===----------------------------------------------------------------------===//18 19include "SystemZFeatures.td"20 21//===----------------------------------------------------------------------===//22// SystemZ subtarget scheduling models23//===----------------------------------------------------------------------===//24 25include "SystemZSchedule.td"26 27//===----------------------------------------------------------------------===//28// SystemZ supported processors29//===----------------------------------------------------------------------===//30 31include "SystemZProcessors.td"32 33//===----------------------------------------------------------------------===//34// Register file description35//===----------------------------------------------------------------------===//36 37include "SystemZRegisterInfo.td"38 39//===----------------------------------------------------------------------===//40// Calling convention description41//===----------------------------------------------------------------------===//42 43include "SystemZCallingConv.td"44 45//===----------------------------------------------------------------------===//46// Instruction descriptions47//===----------------------------------------------------------------------===//48 49include "SystemZOperators.td"50include "SystemZOperands.td"51include "SystemZPatterns.td"52include "SystemZInstrFormats.td"53include "SystemZInstrInfo.td"54include "SystemZInstrVector.td"55include "SystemZInstrFP.td"56include "SystemZInstrHFP.td"57include "SystemZInstrDFP.td"58include "SystemZInstrSystem.td"59 60 61defm : RemapAllTargetPseudoPointerOperands<ADDR64Bit>;62 63def SystemZInstrInfo : InstrInfo { let guessInstructionProperties = 0; }64 65//===----------------------------------------------------------------------===//66// Assembly parser67//===----------------------------------------------------------------------===//68 69def SystemZAsmParser : AsmParser {70 let ShouldEmitMatchRegisterName = 0;71}72 73def GNUAsmParserVariant : AsmParserVariant {74 int Variant = 0;75 76 // Variant name.77 string Name = "gnu";78}79 80def HLASMAsmParserVariant : AsmParserVariant {81 int Variant = 1;82 83 // Variant name.84 string Name = "hlasm";85}86 87//===----------------------------------------------------------------------===//88// Assembly writer89//===----------------------------------------------------------------------===//90 91// The SystemZ target supports two different syntaxes for emitting machine code.92def GNUAsmWriter : AsmWriter {93 string AsmWriterClassName = "GNUInstPrinter";94 int Variant = 0;95}96def HLASMAsmWriter : AsmWriter {97 string AsmWriterClassName = "HLASMInstPrinter";98 int Variant = 1;99}100 101//===----------------------------------------------------------------------===//102// Top-level target declaration103//===----------------------------------------------------------------------===//104 105def SystemZ : Target {106 let InstructionSet = SystemZInstrInfo;107 let AssemblyParsers = [SystemZAsmParser];108 let AssemblyParserVariants = [GNUAsmParserVariant, HLASMAsmParserVariant];109 let AssemblyWriters = [GNUAsmWriter, HLASMAsmWriter];110 let AllowRegisterRenaming = 1;111}112