brintos / llvm-project-archived public Read only

1//-- SystemZScheduleZ15.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file defines the machine model for Z15 to support instruction10// scheduling and other instruction cost heuristics.11//12// Pseudos expanded right after isel do not need to be modelled here.13//14//===----------------------------------------------------------------------===//15 16def Z15Model : SchedMachineModel {17 18    let UnsupportedFeatures = Arch13UnsupportedFeatures.List;19 20    let IssueWidth = 6;             // Number of instructions decoded per cycle.21    let MicroOpBufferSize = 60;     // Issue queues22    let LoadLatency = 1;            // Optimistic load latency.23 24    let PostRAScheduler = 1;25 26    // Extra cycles for a mispredicted branch.27    let MispredictPenalty = 20;28}29 30let SchedModel = Z15Model in  {31// These definitions need the SchedModel value. They could be put in a32// subtarget common include file, but it seems the include system in Tablegen33// currently (2016) rejects multiple includes of same file.34 35// Decoder grouping rules36let NumMicroOps = 1 in {37  def : WriteRes<NormalGr, []>;38  def : WriteRes<BeginGroup, []> { let BeginGroup  = 1; }39  def : WriteRes<EndGroup, []>   { let EndGroup    = 1; }40}41def : WriteRes<Cracked, []> {42  let NumMicroOps = 2;43  let BeginGroup  = 1;44}45def : WriteRes<GroupAlone, []> {46  let NumMicroOps = 3;47  let BeginGroup  = 1;48  let EndGroup    = 1;49}50def : WriteRes<GroupAlone2, []> {51  let NumMicroOps = 6;52  let BeginGroup  = 1;53  let EndGroup    = 1;54}55def : WriteRes<GroupAlone3, []> {56  let NumMicroOps = 9;57  let BeginGroup  = 1;58  let EndGroup    = 1;59}60 61// Incoming latency removed from the register operand which is used together62// with a memory operand by the instruction.63def : ReadAdvance<RegReadAdv, 4>;64 65// LoadLatency (above) is not used for instructions in this file. This is66// instead the role of LSULatency, which is the latency value added to the67// result of loads and instructions with folded memory operands.68def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }69 70let NumMicroOps = 0 in {71  foreach L = 1-30 in72    def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }73}74 75// Execution units.76def Z15_FXaUnit     : ProcResource<2>;77def Z15_FXbUnit     : ProcResource<2>;78def Z15_LSUnit      : ProcResource<2>;79def Z15_VecUnit     : ProcResource<2>;80def Z15_VecFPdUnit  : ProcResource<2> { let BufferSize = 1; /* blocking */ }81def Z15_VBUnit      : ProcResource<2>;82def Z15_MCD         : ProcResource<1>;83 84// Subtarget specific definitions of scheduling resources.85let NumMicroOps = 0 in {86  def : WriteRes<FXa, [Z15_FXaUnit]>;87  def : WriteRes<FXb, [Z15_FXbUnit]>;88  def : WriteRes<LSU, [Z15_LSUnit]>;89  def : WriteRes<VecBF,  [Z15_VecUnit]>;90  def : WriteRes<VecDF,  [Z15_VecUnit]>;91  def : WriteRes<VecDFX, [Z15_VecUnit]>;92  def : WriteRes<VecMul,  [Z15_VecUnit]>;93  def : WriteRes<VecStr,  [Z15_VecUnit]>;94  def : WriteRes<VecXsPm, [Z15_VecUnit]>;95  foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in {96    def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z15_FXaUnit]>;97    def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z15_FXbUnit]>;98    def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z15_LSUnit]>;99    def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z15_VecUnit]>;100    def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z15_VecUnit]>;101    def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z15_VecUnit]>;102    def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z15_VecUnit]>;103    def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z15_VecUnit]>;104    def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z15_VecUnit]>;105  }}106 107  def : WriteRes<VecFPd,  [Z15_VecFPdUnit]> { let ReleaseAtCycles = [30]; }108 109  def : WriteRes<VBU,     [Z15_VBUnit]>; // Virtual Branching Unit110}111 112def : WriteRes<MCD, [Z15_MCD]> { let NumMicroOps = 3;113                                    let BeginGroup  = 1;114                                    let EndGroup    = 1; }115 116// -------------------------- INSTRUCTIONS ---------------------------------- //117 118// InstRW constructs have been used in order to preserve the119// readability of the InstrInfo files.120 121// For each instruction, as matched by a regexp, provide a list of122// resources that it needs. These will be combined into a SchedClass.123 124//===----------------------------------------------------------------------===//125// Stack allocation126//===----------------------------------------------------------------------===//127 128// Pseudo -> LA / LAY129def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>;130 131//===----------------------------------------------------------------------===//132// Branch instructions133//===----------------------------------------------------------------------===//134 135// Branch136def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;137def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>;138def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>;139def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>;140def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "BI(C)?(Asm.*)?$")>;141def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>;142def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>;143def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>;144def : InstRW<[WLat1, FXa2, FXb2, GroupAlone2],145             (instregex "B(R)?X(H|L).*$")>;146 147// Compare and branch148def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;149def : InstRW<[WLat1, FXb2, GroupAlone],150             (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;151 152//===----------------------------------------------------------------------===//153// Trap instructions154//===----------------------------------------------------------------------===//155 156// Trap157def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>;158 159// Compare and trap160def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;161def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;162def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;163def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>;164 165//===----------------------------------------------------------------------===//166// Call and return instructions167//===----------------------------------------------------------------------===//168 169// Call170def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>;171def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL(_XPLINK64)?$")>;172def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?(_XPLINK64|_STACKEXT)?$")>;173def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;174 175// Return176def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return(_XPLINK)?$")>;177def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn(_XPLINK)?$")>;178 179//===----------------------------------------------------------------------===//180// Move instructions181//===----------------------------------------------------------------------===//182 183// Moves184def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;185def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>;186 187// Move character188def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;189def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;190def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "MVCRL$")>;191 192// Pseudo -> reg move193def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;194def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>;195def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>;196def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>;197 198// Loads199def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;200def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>;201def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;202def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;203 204def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>;205def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>;206 207def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>;208def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>;209def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR$")>;210 211// Load and zero rightmost byte212def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>;213 214// Load and trap215def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>;216 217// Load and test218def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>;219def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>;220 221// Stores222def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>;223def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>;224def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;225 226// String moves.227def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;228 229//===----------------------------------------------------------------------===//230// Conditional move instructions231//===----------------------------------------------------------------------===//232 233def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>;234def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>;235def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>;236def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],237             (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>;238def : InstRW<[WLat1, FXb, LSU, NormalGr],239             (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>;240 241def : InstRW<[WLat2, FXa, NormalGr], (instregex "SELRMux$")>;242def : InstRW<[WLat2, FXa, NormalGr], (instregex "SEL(G|FH)?R(Asm.*)?$")>;243 244//===----------------------------------------------------------------------===//245// Sign extensions246//===----------------------------------------------------------------------===//247 248def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>;249def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>;250 251def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>;252def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>;253 254def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;255def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>;256def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;257def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>;258def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>;259 260//===----------------------------------------------------------------------===//261// Zero extensions262//===----------------------------------------------------------------------===//263 264def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>;265def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>;266def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>;267def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;268def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;269def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>;270def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;271def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;272 273// Load and zero rightmost byte274def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>;275 276// Load and trap277def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>;278 279//===----------------------------------------------------------------------===//280// Truncations281//===----------------------------------------------------------------------===//282 283def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;284def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;285def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;286 287//===----------------------------------------------------------------------===//288// Multi-register moves289//===----------------------------------------------------------------------===//290 291// Load multiple (estimated average of 5 ops)292def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;293 294// Load multiple disjoint295def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;296 297// Store multiple298def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;299 300//===----------------------------------------------------------------------===//301// Byte swaps302//===----------------------------------------------------------------------===//303 304def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>;305def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>;306def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>;307def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;308 309//===----------------------------------------------------------------------===//310// Load address instructions311//===----------------------------------------------------------------------===//312 313def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>;314 315// Load the Global Offset Table address ( -> larl )316def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>;317 318//===----------------------------------------------------------------------===//319// Absolute and Negation320//===----------------------------------------------------------------------===//321 322def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LP(G)?R$")>;323def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "L(N|P)GFR$")>;324def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LN(R|GR)$")>;325def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>;326def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>;327 328//===----------------------------------------------------------------------===//329// Insertion330//===----------------------------------------------------------------------===//331 332def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>;333def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],334             (instregex "IC32(Y)?$")>;335def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr],336             (instregex "ICM(H|Y)?$")>;337def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>;338def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>;339def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>;340def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>;341def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>;342def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>;343def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>;344 345//===----------------------------------------------------------------------===//346// Addition347//===----------------------------------------------------------------------===//348 349def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],350             (instregex "A(Y)?$")>;351def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],352             (instregex "AH(Y)?$")>;353def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>;354def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>;355def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],356             (instregex "AG$")>;357def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>;358def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>;359def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>;360def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>;361def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>;362def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],363             (instregex "AL(Y)?$")>;364def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>;365def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],366             (instregex "ALG(F)?$")>;367def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>;368def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>;369def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>;370def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>;371def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>;372def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>;373def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>;374def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>;375def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>;376 377// Logical addition with carry378def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],379             (instregex "ALC(G)?$")>;380def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>;381 382// Add with sign extension (16/32 -> 64)383def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],384             (instregex "AG(F|H)$")>;385def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>;386 387//===----------------------------------------------------------------------===//388// Subtraction389//===----------------------------------------------------------------------===//390 391def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],392             (instregex "S(G|Y)?$")>;393def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],394             (instregex "SH(Y)?$")>;395def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>;396def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>;397def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],398             (instregex "SL(G|GF|Y)?$")>;399def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>;400def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>;401def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>;402def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>;403def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>;404def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>;405 406// Subtraction with borrow407def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],408             (instregex "SLB(G)?$")>;409def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>;410 411// Subtraction with sign extension (16/32 -> 64)412def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],413             (instregex "SG(F|H)$")>;414def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>;415 416//===----------------------------------------------------------------------===//417// AND418//===----------------------------------------------------------------------===//419 420def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],421             (instregex "N(G|Y)?$")>;422def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>;423def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;424def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>;425def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>;426def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>;427def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>;428def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>;429def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>;430def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>;431def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>;432def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>;433 434//===----------------------------------------------------------------------===//435// OR436//===----------------------------------------------------------------------===//437 438def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],439             (instregex "O(G|Y)?$")>;440def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>;441def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>;442def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;443def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>;444def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>;445def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>;446def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>;447def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>;448def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>;449def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>;450def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>;451 452//===----------------------------------------------------------------------===//453// XOR454//===----------------------------------------------------------------------===//455 456def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],457             (instregex "X(G|Y)?$")>;458def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>;459def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>;460def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>;461def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>;462def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>;463def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>;464def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>;465 466//===----------------------------------------------------------------------===//467// Combined logical operations468//===----------------------------------------------------------------------===//469 470def : InstRW<[WLat1, FXa, NormalGr], (instregex "NC(G)?RK$")>;471def : InstRW<[WLat1, FXa, NormalGr], (instregex "OC(G)?RK$")>;472def : InstRW<[WLat1, FXa, NormalGr], (instregex "NN(G)?RK$")>;473def : InstRW<[WLat1, FXa, NormalGr], (instregex "NO(G)?RK$")>;474def : InstRW<[WLat1, FXa, NormalGr], (instregex "NOT(G)?R$")>;475def : InstRW<[WLat1, FXa, NormalGr], (instregex "NX(G)?RK$")>;476 477//===----------------------------------------------------------------------===//478// Multiplication479//===----------------------------------------------------------------------===//480 481def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr],482             (instregex "MS(GF|Y)?$")>;483def : InstRW<[WLat5, FXa, NormalGr], (instregex "MS(R|FI)$")>;484def : InstRW<[WLat7LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>;485def : InstRW<[WLat7, FXa, NormalGr], (instregex "MSGR$")>;486def : InstRW<[WLat5, FXa, NormalGr], (instregex "MSGF(I|R)$")>;487def : InstRW<[WLat8LSU, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MLG$")>;488def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MLGR$")>;489def : InstRW<[WLat4, FXa, NormalGr], (instregex "MGHI$")>;490def : InstRW<[WLat4, FXa, NormalGr], (instregex "MHI$")>;491def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>;492def : InstRW<[WLat6, FXa2, GroupAlone], (instregex "M(L)?R$")>;493def : InstRW<[WLat6LSU, RegReadAdv, FXa2, LSU, GroupAlone],494             (instregex "M(FY|L)?$")>;495def : InstRW<[WLat8, RegReadAdv, FXa, LSU, NormalGr], (instregex "MGH$")>;496def : InstRW<[WLat12, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MG$")>;497def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MGRK$")>;498def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, FXa, LSU, NormalGr],499             (instregex "MSC$")>;500def : InstRW<[WLat8LSU, WLat8LSU, RegReadAdv, FXa, LSU, NormalGr],501             (instregex "MSGC$")>;502def : InstRW<[WLat6, WLat6, FXa, NormalGr], (instregex "MSRKC$")>;503def : InstRW<[WLat8, WLat8, FXa, NormalGr], (instregex "MSGRKC$")>;504 505//===----------------------------------------------------------------------===//506// Division and remainder507//===----------------------------------------------------------------------===//508 509def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>;510def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>;511def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>;512def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2],513             (instregex "DSG(F)?$")>;514def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>;515def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>;516def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2],517             (instregex "DL(G)?$")>;518 519//===----------------------------------------------------------------------===//520// Shifts521//===----------------------------------------------------------------------===//522 523def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>;524def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>;525def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>;526def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>;527def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],528             (instregex "S(L|R)D(A|L)$")>;529 530// Rotate531def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;532 533// Rotate and insert534def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)(Opt)?$")>;535def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)(Opt)?$")>;536def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?(Z)?(Opt)?$")>;537def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;538 539// Rotate and Select540def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "R(N|O|X)SBG(Opt)?$")>;541 542//===----------------------------------------------------------------------===//543// Comparison544//===----------------------------------------------------------------------===//545 546def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],547             (instregex "C(G|Y|Mux)?$")>;548def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>;549def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>;550def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>;551def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;552def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>;553def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>;554def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>;555def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>;556def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],557             (instregex "CL(Y|Mux)?$")>;558def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>;559def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>;560def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>;561def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;562def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>;563def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>;564def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>;565def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>;566def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>;567def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>;568def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;569def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>;570def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>;571def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>;572def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>;573def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>;574def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>;575 576// Compare halfword577def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>;578def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>;579def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;580def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>;581def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>;582 583// Compare with sign extension (32 -> 64)584def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>;585def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>;586def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>;587 588// Compare logical character589def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>;590def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;591def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;592 593// Test under mask594def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>;595def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>;596def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>;597def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>;598def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>;599def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>;600 601// Compare logical characters under mask602def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr],603             (instregex "CLM(H|Y)?$")>;604 605//===----------------------------------------------------------------------===//606// Prefetch and execution hint607//===----------------------------------------------------------------------===//608 609def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>;610def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>;611def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>;612def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>;613 614//===----------------------------------------------------------------------===//615// Atomic operations616//===----------------------------------------------------------------------===//617 618def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>;619 620def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>;621def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>;622def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>;623def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>;624def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>;625 626// Test and set627def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>;628 629// Compare and swap630def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone],631             (instregex "CS(G|Y)?$")>;632 633// Compare double and swap634def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2],635             (instregex "CDS(Y)?$")>;636def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3,637              GroupAlone3], (instregex "CDSG$")>;638 639// Compare and swap and store640def : InstRW<[WLat30, MCD], (instregex "CSST$")>;641 642// Perform locked operation643def : InstRW<[WLat30, MCD], (instregex "PLO$")>;644 645// Load/store pair from/to quadword646def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;647def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>;648 649// Load pair disjoint650def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;651 652//===----------------------------------------------------------------------===//653// Translate and convert654//===----------------------------------------------------------------------===//655 656def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>;657def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2],658             (instregex "TRT$")>;659def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;660def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;661def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;662def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;663def : InstRW<[WLat30, WLat30, WLat30, MCD],664             (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;665def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;666 667//===----------------------------------------------------------------------===//668// Message-security assist669//===----------------------------------------------------------------------===//670 671def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],672             (instregex "KM(C|F|O|CTR|A)?$")>;673def : InstRW<[WLat30, WLat30, WLat30, MCD],674             (instregex "(KIMD|KLMD|KMAC|KDSA)$")>;675def : InstRW<[WLat30, WLat30, WLat30, MCD],676             (instregex "(PCC|PPNO|PRNO)$")>;677 678//===----------------------------------------------------------------------===//679// Guarded storage680//===----------------------------------------------------------------------===//681 682def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LGG$")>;683def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLGFSG$")>;684def : InstRW<[WLat30, MCD], (instregex "(L|ST)GSC$")>;685 686//===----------------------------------------------------------------------===//687// Decimal arithmetic688//===----------------------------------------------------------------------===//689 690def : InstRW<[WLat20, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2],691             (instregex "CVBG$")>;692def : InstRW<[WLat20, RegReadAdv, FXb, VecDF, LSU, GroupAlone2],693             (instregex "CVB(Y)?$")>;694def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>;695def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>;696def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;697def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;698def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;699def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>;700 701def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2],702             (instregex "(A|S|ZA)P$")>;703def : InstRW<[WLat1, FXb, VecDFX2, LSU3, GroupAlone2], (instregex "MP$")>;704def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "DP$")>;705def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>;706def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>;707def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>;708def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;709 710//===----------------------------------------------------------------------===//711// Access registers712//===----------------------------------------------------------------------===//713 714// Extract/set/copy access register715def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;716 717// Load address extended718def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>;719 720// Load/store access multiple (not modeled precisely)721def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;722def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>;723 724//===----------------------------------------------------------------------===//725// Program mask and addressing mode726//===----------------------------------------------------------------------===//727 728// Insert Program Mask729def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>;730 731// Set Program Mask732def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;733 734// Branch and link735def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>;736 737// Test addressing mode738def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>;739 740// Set addressing mode741def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>;742 743// Branch (and save) and set mode.744def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>;745def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>;746 747//===----------------------------------------------------------------------===//748// Transactional execution749//===----------------------------------------------------------------------===//750 751// Transaction begin752def : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>;753 754// Transaction end755def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>;756 757// Transaction abort758def : InstRW<[WLat30, MCD], (instregex "TABORT$")>;759 760// Extract Transaction Nesting Depth761def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>;762 763// Nontransactional store764def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>;765 766//===----------------------------------------------------------------------===//767// Processor assist768//===----------------------------------------------------------------------===//769 770def : InstRW<[WLat1, FXb, GroupAlone], (instregex "PPA$")>;771 772//===----------------------------------------------------------------------===//773// Miscellaneous Instructions.774//===----------------------------------------------------------------------===//775 776// Find leftmost one777def : InstRW<[WLat5, WLat5, FXa2, GroupAlone], (instregex "FLOGR$")>;778 779// Population count780def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT(Opt)?$")>;781 782// String instructions783def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;784def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;785 786// Various complex instructions787def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;788def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],789             (instregex "UPT$")>;790def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;791def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;792def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "SORTL$")>;793def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "DFLTCC$")>;794 795// Execute796def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>;797 798//===----------------------------------------------------------------------===//799// .insn directive instructions800//===----------------------------------------------------------------------===//801 802// An "empty" sched-class will be assigned instead of the "invalid sched-class".803// getNumDecoderSlots() will then return 1 instead of 0.804def : InstRW<[], (instregex "Insn.*")>;805 806 807// ----------------------------- Floating point ----------------------------- //808 809//===----------------------------------------------------------------------===//810// FP: Move instructions811//===----------------------------------------------------------------------===//812 813// Load zero814def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER|ER_16)$")>;815def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>;816 817// Load818def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER(16)?$")>;819def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R16|R32|GR)$")>;820def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>;821def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>;822 823// Load and Test824def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>;825def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXBR$")>;826 827// Copy sign828def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s|h)(d|s|h)$")>;829 830//===----------------------------------------------------------------------===//831// FP: Load instructions832//===----------------------------------------------------------------------===//833 834def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "L(E16|E)(Y)?$")>;835def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>;836def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;837 838//===----------------------------------------------------------------------===//839// FP: Store instructions840//===----------------------------------------------------------------------===//841 842def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E16|E|D)(Y)?$")>;843def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>;844 845//===----------------------------------------------------------------------===//846// FP: Conversion instructions847//===----------------------------------------------------------------------===//848 849// Load rounded850def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LEDBR(A)?$")>;851def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;852 853// Load lengthened854def : InstRW<[WLat6LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>;855def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LDEBR$")>;856def : InstRW<[WLat7LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;857def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>;858 859// Convert from fixed / logical860def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>;861def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>;862def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>;863def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>;864 865// Convert to fixed / logical866def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked],867             (instregex "C(F|G)(E|D)BR(A)?$")>;868def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked],869             (instregex "C(F|G)XBR(A)?$")>;870def : InstRW<[WLat9, WLat9, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>;871def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "CLFDBR$")>;872def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>;873def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>;874 875//===----------------------------------------------------------------------===//876// FP: Unary arithmetic877//===----------------------------------------------------------------------===//878 879// Load Complement / Negative / Positive880def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;881def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32|_16)?$")>;882def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>;883 884// Square root885def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>;886def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>;887def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>;888 889// Load FP integer890def : InstRW<[WLat6, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>;891def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>;892 893//===----------------------------------------------------------------------===//894// FP: Binary arithmetic895//===----------------------------------------------------------------------===//896 897// Addition898def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],899             (instregex "A(E|D)B$")>;900def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "A(E|D)BR$")>;901def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>;902 903// Subtraction904def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],905             (instregex "S(E|D)B$")>;906def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "S(E|D)BR$")>;907def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>;908 909// Multiply910def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],911             (instregex "M(D|DE|EE)B$")>;912def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>;913def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone],914             (instregex "MXDB$")>;915def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MXDBR$")>;916def : InstRW<[WLat15, VecDF4, GroupAlone], (instregex "MXBR$")>;917 918// Multiply and add / subtract919def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],920             (instregex "M(A|S)EB$")>;921def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>;922def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],923             (instregex "M(A|S)DB$")>;924def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(A|S)DBR$")>;925 926// Division927def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],928             (instregex "D(E|D)B$")>;929def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>;930def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>;931 932// Divide to integer933def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;934 935//===----------------------------------------------------------------------===//936// FP: Comparisons937//===----------------------------------------------------------------------===//938 939// Compare940def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr],941             (instregex "(K|C)(E|D)B$")>;942def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>;943def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>;944 945// Test Data Class946def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>;947def : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>;948 949//===----------------------------------------------------------------------===//950// FP: Floating-point control register instructions951//===----------------------------------------------------------------------===//952 953def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>;954def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>;955def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>;956def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>;957def : InstRW<[WLat30, MCD], (instregex "SFASR$")>;958def : InstRW<[WLat30, MCD], (instregex "LFAS$")>;959def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>;960 961 962// --------------------- Hexadecimal floating point ------------------------- //963 964//===----------------------------------------------------------------------===//965// HFP: Move instructions966//===----------------------------------------------------------------------===//967 968// Load and Test969def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>;970def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>;971 972//===----------------------------------------------------------------------===//973// HFP: Conversion instructions974//===----------------------------------------------------------------------===//975 976// Load rounded977def : InstRW<[WLat6, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>;978def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LEXR$")>;979def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>;980 981// Load lengthened982def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;983def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>;984def : InstRW<[WLat7LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>;985def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>;986 987// Convert from fixed988def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>;989def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>;990 991// Convert to fixed992def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>;993def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>;994 995// Convert BFP to HFP / HFP to BFP.996def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "THD(E)?R$")>;997def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "TB(E)?DR$")>;998 999//===----------------------------------------------------------------------===//1000// HFP: Unary arithmetic1001//===----------------------------------------------------------------------===//1002 1003// Load Complement / Negative / Positive1004def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;1005def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>;1006 1007// Halve1008def : InstRW<[WLat6, VecBF, NormalGr], (instregex "H(E|D)R$")>;1009 1010// Square root1011def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>;1012def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>;1013def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>;1014 1015// Load FP integer1016def : InstRW<[WLat6, VecBF, NormalGr], (instregex "FI(E|D)R$")>;1017def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>;1018 1019//===----------------------------------------------------------------------===//1020// HFP: Binary arithmetic1021//===----------------------------------------------------------------------===//1022 1023// Addition1024def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1025             (instregex "A(E|D|U|W)$")>;1026def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>;1027def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>;1028 1029// Subtraction1030def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1031             (instregex "S(E|D|U|W)$")>;1032def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>;1033def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>;1034 1035// Multiply1036def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1037             (instregex "M(D|DE|E|EE)$")>;1038def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>;1039def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone],1040             (instregex "MXD$")>;1041def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MXDR$")>;1042def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>;1043def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone], (instregex "MY$")>;1044def : InstRW<[WLat6LSU, RegReadAdv, VecBF2, LSU, GroupAlone],1045             (instregex "MY(H|L)$")>;1046def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MYR$")>;1047def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "MY(H|L)R$")>;1048 1049// Multiply and add / subtract1050def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],1051             (instregex "M(A|S)(E|D)$")>;1052def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>;1053def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone],1054             (instregex "MAY$")>;1055def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],1056             (instregex "MAY(H|L)$")>;1057def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MAYR$")>;1058def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>;1059 1060// Division1061def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], (instregex "D(E|D)$")>;1062def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>;1063def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>;1064 1065//===----------------------------------------------------------------------===//1066// HFP: Comparisons1067//===----------------------------------------------------------------------===//1068 1069// Compare1070def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1071             (instregex "C(E|D)$")>;1072def : InstRW<[WLat6, VecBF, NormalGr], (instregex "C(E|D)R$")>;1073def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>;1074 1075 1076// ------------------------ Decimal floating point -------------------------- //1077 1078//===----------------------------------------------------------------------===//1079// DFP: Move instructions1080//===----------------------------------------------------------------------===//1081 1082// Load and Test1083def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>;1084def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>;1085 1086//===----------------------------------------------------------------------===//1087// DFP: Conversion instructions1088//===----------------------------------------------------------------------===//1089 1090// Load rounded1091def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>;1092def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>;1093 1094// Load lengthened1095def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>;1096def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>;1097 1098// Convert from fixed / logical1099def : InstRW<[WLat15, FXb, VecDF, Cracked], (instregex "CDFTR(A)?$")>;1100def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDGTR(A)?$")>;1101def : InstRW<[WLat15, FXb, VecDF4, GroupAlone2], (instregex "CXFTR(A)?$")>;1102def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXGTR(A)?$")>;1103def : InstRW<[WLat15, FXb, VecDF, Cracked], (instregex "CDLFTR$")>;1104def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDLGTR$")>;1105def : InstRW<[WLat15, FXb, VecDF4, GroupAlone2], (instregex "CXLFTR$")>;1106def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXLGTR$")>;1107 1108// Convert to fixed / logical1109def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked],1110             (instregex "C(F|G)DTR(A)?$")>;1111def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked],1112             (instregex "C(F|G)XTR(A)?$")>;1113def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>;1114def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>;1115 1116// Convert from / to signed / unsigned packed1117def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>;1118def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>;1119def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>;1120def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>;1121 1122// Convert from / to zoned1123def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>;1124def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>;1125def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>;1126def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>;1127 1128// Convert from / to packed1129def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>;1130def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>;1131def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>;1132def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>;1133 1134// Perform floating-point operation1135def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;1136 1137//===----------------------------------------------------------------------===//1138// DFP: Unary arithmetic1139//===----------------------------------------------------------------------===//1140 1141// Load FP integer1142def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>;1143def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>;1144 1145// Extract biased exponent1146def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>;1147def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>;1148 1149// Extract significance1150def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>;1151def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>;1152 1153//===----------------------------------------------------------------------===//1154// DFP: Binary arithmetic1155//===----------------------------------------------------------------------===//1156 1157// Addition1158def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>;1159def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>;1160 1161// Subtraction1162def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>;1163def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>;1164 1165// Multiply1166def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>;1167def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>;1168 1169// Division1170def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>;1171def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>;1172 1173// Quantize1174def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>;1175def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>;1176 1177// Reround1178def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>;1179def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>;1180 1181// Shift significand left/right1182def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>;1183def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;1184 1185// Insert biased exponent1186def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>;1187def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>;1188 1189//===----------------------------------------------------------------------===//1190// DFP: Comparisons1191//===----------------------------------------------------------------------===//1192 1193// Compare1194def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>;1195def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>;1196 1197// Compare biased exponent1198def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>;1199def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>;1200 1201// Test Data Class/Group1202def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>;1203def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;1204 1205 1206// --------------------------------- Vector --------------------------------- //1207 1208//===----------------------------------------------------------------------===//1209// Vector: Move instructions1210//===----------------------------------------------------------------------===//1211 1212def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;1213def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;1214def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;1215def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;1216 1217//===----------------------------------------------------------------------===//1218// Vector: Immediate instructions1219//===----------------------------------------------------------------------===//1220 1221def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;1222def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;1223def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>;1224def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>;1225def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>;1226def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>;1227 1228//===----------------------------------------------------------------------===//1229// Vector: Loads1230//===----------------------------------------------------------------------===//1231 1232def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(Align)?$")>;1233def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(L|BB)$")>;1234def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(16|32|64)$")>;1235def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H|LF)?$")>;1236def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>;1237def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],1238             (instregex "VLE(B|F|G|H)$")>;1239def : InstRW<[WLat5LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked],1240             (instregex "VGE(F|G)$")>;1241def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone],1242             (instregex "VLM(Align)?$")>;1243def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLRL(R)?$")>;1244 1245//===----------------------------------------------------------------------===//1246// Vector: Stores1247//===----------------------------------------------------------------------===//1248 1249def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|16|32|64)?$")>;1250def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>;1251def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>;1252def : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM(Align)?$")>;1253def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>;1254def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTRL(R)?$")>;1255 1256//===----------------------------------------------------------------------===//1257// Vector: Byte swaps1258//===----------------------------------------------------------------------===//1259 1260def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLBR(H|F|G|Q)?$")>;1261def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLER(H|F|G)?$")>;1262def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],1263             (instregex "VLEBR(H|F|G)$")>;1264def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEBRZ(H|F|G|E)?$")>;1265def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLBRREP(H|F|G)?$")>;1266def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTBR(H|F|G|Q)?$")>;1267def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTER(H|F|G)?$")>;1268def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTEBRH$")>;1269def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTEBR(F|G)$")>;1270 1271//===----------------------------------------------------------------------===//1272// Vector: Selects and permutes1273//===----------------------------------------------------------------------===//1274 1275def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>;1276def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>;1277def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>;1278def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>;1279def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VBPERM$")>;1280def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>;1281def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>;1282 1283//===----------------------------------------------------------------------===//1284// Vector: Widening and narrowing1285//===----------------------------------------------------------------------===//1286 1287def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>;1288def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>;1289def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>;1290def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>;1291def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>;1292def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>;1293def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>;1294def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>;1295def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>;1296def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>;1297 1298//===----------------------------------------------------------------------===//1299// Vector: Integer arithmetic1300//===----------------------------------------------------------------------===//1301 1302def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>;1303def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>;1304def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>;1305def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>;1306def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O|N|X)?$")>;1307def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO(C)?$")>;1308def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>;1309def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>;1310def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>;1311def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>;1312def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>;1313def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>;1314def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>;1315def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>;1316def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>;1317def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>;1318def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>;1319def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>;1320def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>;1321def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>;1322def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>;1323def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>;1324def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>;1325def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>;1326def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>;1327def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>;1328def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>;1329def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>;1330def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>;1331def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>;1332def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>;1333def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>;1334def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>;1335def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VMSL(G)?$")>;1336 1337def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT(B|F|G|H)?$")>;1338 1339def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>;1340def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>;1341def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>;1342def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>;1343def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>;1344def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>;1345def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>;1346def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>;1347def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>;1348 1349def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>;1350def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLB$")>;1351def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;1352def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>;1353def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLD$")>;1354def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSRD$")>;1355 1356def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>;1357def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>;1358def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>;1359 1360def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>;1361def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>;1362def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>;1363 1364//===----------------------------------------------------------------------===//1365// Vector: Integer comparison1366//===----------------------------------------------------------------------===//1367 1368def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>;1369def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>;1370def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;1371def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;1372def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>;1373def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>;1374def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>;1375def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>;1376def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;1377 1378//===----------------------------------------------------------------------===//1379// Vector: Floating-point arithmetic1380//===----------------------------------------------------------------------===//1381 1382// Conversion and rounding1383def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCFP(S|L)$")>;1384def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCD(L)?G$")>;1385def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCD(L)?GB$")>;1386def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WCD(L)?GB$")>;1387def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCE(L)?FB$")>;1388def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WCE(L)?FB$")>;1389def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(S|L)FP$")>;1390def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?GD$")>;1391def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?GDB$")>;1392def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WC(L)?GDB$")>;1393def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?FEB$")>;1394def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WC(L)?FEB$")>;1395def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VL(DE|ED)$")>;1396def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VL(DE|ED)B$")>;1397def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>;1398def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFL(L|R)$")>;1399def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFL(LS|RD)$")>;1400def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFL(LS|RD)$")>;1401def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFLLD$")>;1402def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFLRX$")>;1403def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFI(DB)?$")>;1404def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFIDB$")>;1405def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFISB$")>;1406def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFISB$")>;1407def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFIXB$")>;1408 1409// Sign operations1410def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>;1411def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>;1412def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSOSB$")>;1413def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFPSOXB$")>;1414def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>;1415def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)SB$")>;1416def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFL(C|N|P)XB$")>;1417 1418// Minimum / maximum1419def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)$")>;1420def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)DB$")>;1421def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)DB$")>;1422def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)SB$")>;1423def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)SB$")>;1424def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WF(MAX|MIN)XB$")>;1425 1426// Test data class1427def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>;1428def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>;1429def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCISB$")>;1430def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFTCIXB$")>;1431 1432// Add / subtract1433def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)$")>;1434def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)DB$")>;1435def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(A|S)DB$")>;1436def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)SB$")>;1437def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(A|S)SB$")>;1438def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WF(A|S)XB$")>;1439 1440// Multiply / multiply-and-add/subtract1441def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFM(DB)?$")>;1442def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFM(D|S)B$")>;1443def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFMSB$")>;1444def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>;1445def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)$")>;1446def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>;1447def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>;1448def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)SB$")>;1449def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>;1450def : InstRW<[WLat30, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>;1451 1452// Divide / square root1453def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;1454def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>;1455def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDSB$")>;1456def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFDXB$")>;1457def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>;1458def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>;1459def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQSB$")>;1460def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFSQXB$")>;1461 1462//===----------------------------------------------------------------------===//1463// Vector: Floating-point comparison1464//===----------------------------------------------------------------------===//1465 1466def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)$")>;1467def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)DB$")>;1468def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>;1469def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)DB$")>;1470def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)SB$")>;1471def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SB$")>;1472def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SB$")>;1473def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XB$")>;1474def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XB$")>;1475def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>;1476def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFK(E|H|HE)DBS$")>;1477def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr],1478             (instregex "WF(C|K)(E|H|HE)DBS$")>;1479def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr],1480             (instregex "VF(C|K)(E|H|HE)SBS$")>;1481def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SBS$")>;1482def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SBS$")>;1483def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XBS$")>;1484def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XBS$")>;1485def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>;1486def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>;1487def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)SB$")>;1488def : InstRW<[WLat3, VecDFX, NormalGr], (instregex "WF(C|K)XB$")>;1489 1490//===----------------------------------------------------------------------===//1491// Vector: Floating-point insertion and extraction1492//===----------------------------------------------------------------------===//1493 1494def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR(_16)?$")>;1495def : InstRW<[WLat3, FXb, NormalGr], (instregex "LFER(_16)?$")>;1496 1497//===----------------------------------------------------------------------===//1498// Vector: String instructions1499//===----------------------------------------------------------------------===//1500 1501def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>;1502def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>;1503def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>;1504def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>;1505def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>;1506def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>;1507def : InstRW<[WLat4, WLat4, VecStr, NormalGr],1508             (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>;1509def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>;1510def : InstRW<[WLat4, WLat4, VecStr, NormalGr],1511             (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>;1512def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>;1513def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>;1514def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>;1515def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>;1516def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>;1517def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>;1518def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRS(B|F|H)?$")>;1519def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRSZ(B|F|H)$")>;1520 1521//===----------------------------------------------------------------------===//1522// Vector: Packed-decimal instructions1523//===----------------------------------------------------------------------===//1524 1525def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "VLIP$")>;1526def : InstRW<[WLat6, VecDFX, LSU, GroupAlone2], (instregex "VPKZ$")>;1527def : InstRW<[WLat1, VecDFX, FXb, LSU2, GroupAlone2], (instregex "VUPKZ$")>;1528def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone],1529             (instregex "VCVB(G)?(Opt)?$")>;1530def : InstRW<[WLat15, WLat15, VecDF2, FXb, GroupAlone],1531             (instregex "VCVD(G)?$")>;1532def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "V(A|S)P$")>;1533def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "VM(S)?P$")>;1534def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "V(D|R)P$")>;1535def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "VSDP$")>;1536def : InstRW<[WLat10, WLat10, VecDF2, NormalGr], (instregex "VSRP$")>;1537def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "VPSOP$")>;1538def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "V(T|C)P$")>;1539 1540 1541// -------------------------------- System ---------------------------------- //1542 1543//===----------------------------------------------------------------------===//1544// System: Program-Status Word Instructions1545//===----------------------------------------------------------------------===//1546 1547def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;1548def : InstRW<[WLat20, GroupAlone3], (instregex "LPSW(E)?$")>;1549def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>;1550def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;1551def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;1552def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;1553def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>;1554def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;1555 1556//===----------------------------------------------------------------------===//1557// System: Control Register Instructions1558//===----------------------------------------------------------------------===//1559 1560def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;1561def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>;1562def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;1563def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;1564def : InstRW<[WLat30, MCD], (instregex "ESEA$")>;1565 1566//===----------------------------------------------------------------------===//1567// System: Prefix-Register Instructions1568//===----------------------------------------------------------------------===//1569 1570def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;1571 1572//===----------------------------------------------------------------------===//1573// System: Storage-Key and Real Memory Instructions1574//===----------------------------------------------------------------------===//1575 1576def : InstRW<[WLat30, MCD], (instregex "ISKE$")>;1577def : InstRW<[WLat30, MCD], (instregex "IVSK$")>;1578def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;1579def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;1580def : InstRW<[WLat30, MCD], (instregex "IRBM$")>;1581def : InstRW<[WLat30, MCD], (instregex "PFMF$")>;1582def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;1583def : InstRW<[WLat30, MCD], (instregex "PGIN$")>;1584def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;1585 1586//===----------------------------------------------------------------------===//1587// System: Dynamic-Address-Translation Instructions1588//===----------------------------------------------------------------------===//1589 1590def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;1591def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;1592def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>;1593def : InstRW<[WLat30, MCD], (instregex "PTLB$")>;1594def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;1595def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;1596def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;1597def : InstRW<[WLat30, MCD], (instregex "STRAG$")>;1598def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;1599def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;1600def : InstRW<[WLat30, MCD], (instregex "TPROT$")>;1601 1602//===----------------------------------------------------------------------===//1603// System: Memory-move Instructions1604//===----------------------------------------------------------------------===//1605 1606def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;1607def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;1608def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;1609def : InstRW<[WLat30, MCD], (instregex "MVPG$")>;1610 1611//===----------------------------------------------------------------------===//1612// System: Address-Space Instructions1613//===----------------------------------------------------------------------===//1614 1615def : InstRW<[WLat30, MCD], (instregex "LASP$")>;1616def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;1617def : InstRW<[WLat30, MCD], (instregex "PC$")>;1618def : InstRW<[WLat30, MCD], (instregex "PR$")>;1619def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;1620def : InstRW<[WLat30, MCD], (instregex "RP$")>;1621def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;1622def : InstRW<[WLat30, MCD], (instregex "TAR$")>;1623 1624//===----------------------------------------------------------------------===//1625// System: Linkage-Stack Instructions1626//===----------------------------------------------------------------------===//1627 1628def : InstRW<[WLat30, MCD], (instregex "BAKR$")>;1629def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;1630def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;1631 1632//===----------------------------------------------------------------------===//1633// System: Time-Related Instructions1634//===----------------------------------------------------------------------===//1635 1636def : InstRW<[WLat30, MCD], (instregex "PTFF$")>;1637def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>;1638def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>;1639def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>;1640def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>;1641def : InstRW<[WLat30, MCD], (instregex "STCKC$")>;1642def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>;1643 1644//===----------------------------------------------------------------------===//1645// System: CPU-Related Instructions1646//===----------------------------------------------------------------------===//1647 1648def : InstRW<[WLat30, MCD], (instregex "STAP$")>;1649def : InstRW<[WLat30, MCD], (instregex "STIDP$")>;1650def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;1651def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;1652def : InstRW<[WLat30, MCD], (instregex "ECAG$")>;1653def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;1654def : InstRW<[WLat30, MCD], (instregex "PTF$")>;1655def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;1656 1657//===----------------------------------------------------------------------===//1658// System: Miscellaneous Instructions1659//===----------------------------------------------------------------------===//1660 1661def : InstRW<[WLat30, MCD], (instregex "SVC$")>;1662def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>;1663def : InstRW<[WLat30, MCD], (instregex "DIAG$")>;1664def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>;1665def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;1666def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;1667def : InstRW<[WLat30, MCD], (instregex "SIE$")>;1668 1669//===----------------------------------------------------------------------===//1670// System: CPU-Measurement Facility Instructions1671//===----------------------------------------------------------------------===//1672 1673def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>;1674def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;1675def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;1676def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;1677def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;1678def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;1679def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;1680 1681//===----------------------------------------------------------------------===//1682// System: I/O Instructions1683//===----------------------------------------------------------------------===//1684 1685def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;1686def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;1687def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;1688def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;1689def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;1690def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;1691def : InstRW<[WLat30, MCD], (instregex "SAL$")>;1692 1693//===----------------------------------------------------------------------===//1694// NOPs1695//===----------------------------------------------------------------------===//1696 1697def : InstRW<[WLat1, FXb, NormalGr], (instregex "NOP(R)?(Opt)?$")>;1698def : InstRW<[WLat1, VBU, NormalGr], (instregex "J(G)?NOP$")>;1699}1700 1701