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1//--- SystemZScheduleZ17.td - SystemZ Scheduling Definitions ---*- tblgen -*-=//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file defines the machine model for Z17 to support instruction10// scheduling and other instruction cost heuristics.11//12// Pseudos expanded right after isel do not need to be modelled here.13//14//===----------------------------------------------------------------------===//15 16def Z17Model : SchedMachineModel {17 18 let UnsupportedFeatures = Arch15UnsupportedFeatures.List;19 20 let IssueWidth = 6; // Number of instructions decoded per cycle.21 let MicroOpBufferSize = 60; // Issue queues22 let LoadLatency = 1; // Optimistic load latency.23 24 let PostRAScheduler = 1;25 26 // Extra cycles for a mispredicted branch.27 let MispredictPenalty = 20;28}29 30let SchedModel = Z17Model in {31// These definitions need the SchedModel value. They could be put in a32// subtarget common include file, but it seems the include system in Tablegen33// currently (2016) rejects multiple includes of same file.34 35// Decoder grouping rules36let NumMicroOps = 1 in {37 def : WriteRes<NormalGr, []>;38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; }39 def : WriteRes<EndGroup, []> { let EndGroup = 1; }40}41def : WriteRes<Cracked, []> {42 let NumMicroOps = 2;43 let BeginGroup = 1;44}45def : WriteRes<GroupAlone, []> {46 let NumMicroOps = 3;47 let BeginGroup = 1;48 let EndGroup = 1;49}50def : WriteRes<GroupAlone2, []> {51 let NumMicroOps = 6;52 let BeginGroup = 1;53 let EndGroup = 1;54}55def : WriteRes<GroupAlone3, []> {56 let NumMicroOps = 9;57 let BeginGroup = 1;58 let EndGroup = 1;59}60 61// Incoming latency removed from the register operand which is used together62// with a memory operand by the instruction.63def : ReadAdvance<RegReadAdv, 4>;64 65// LoadLatency (above) is not used for instructions in this file. This is66// instead the role of LSULatency, which is the latency value added to the67// result of loads and instructions with folded memory operands.68def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }69 70let NumMicroOps = 0 in {71 foreach L = 1-30 in72 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }73}74 75// Execution units.76def Z17_FXaUnit : ProcResource<2>;77def Z17_FXbUnit : ProcResource<2>;78def Z17_LSUnit : ProcResource<2>;79def Z17_VecUnit : ProcResource<2>;80def Z17_VecFPdUnit : ProcResource<2> { let BufferSize = 1; /* blocking */ }81def Z17_VBUnit : ProcResource<2>;82def Z17_MCD : ProcResource<1>;83 84// Subtarget specific definitions of scheduling resources.85let NumMicroOps = 0 in {86 def : WriteRes<FXa, [Z17_FXaUnit]>;87 def : WriteRes<FXb, [Z17_FXbUnit]>;88 def : WriteRes<LSU, [Z17_LSUnit]>;89 def : WriteRes<VecBF, [Z17_VecUnit]>;90 def : WriteRes<VecDF, [Z17_VecUnit]>;91 def : WriteRes<VecDFX, [Z17_VecUnit]>;92 def : WriteRes<VecMul, [Z17_VecUnit]>;93 def : WriteRes<VecStr, [Z17_VecUnit]>;94 def : WriteRes<VecXsPm, [Z17_VecUnit]>;95 foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in {96 def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z17_FXaUnit]>;97 def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z17_FXbUnit]>;98 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z17_LSUnit]>;99 def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z17_VecUnit]>;100 def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z17_VecUnit]>;101 def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z17_VecUnit]>;102 def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z17_VecUnit]>;103 def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z17_VecUnit]>;104 def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z17_VecUnit]>;105 }}106 107 def : WriteRes<VecFPd, [Z17_VecFPdUnit]> { let ReleaseAtCycles = [30]; }108 def : WriteRes<VecFPd20, [Z17_VecFPdUnit]> { let ReleaseAtCycles = [20]; }109 110 def : WriteRes<VBU, [Z17_VBUnit]>; // Virtual Branching Unit111}112 113def : WriteRes<MCD, [Z17_MCD]> { let NumMicroOps = 3;114 let BeginGroup = 1;115 let EndGroup = 1; }116 117// -------------------------- INSTRUCTIONS ---------------------------------- //118 119// InstRW constructs have been used in order to preserve the120// readability of the InstrInfo files.121 122// For each instruction, as matched by a regexp, provide a list of123// resources that it needs. These will be combined into a SchedClass.124 125//===----------------------------------------------------------------------===//126// Stack allocation127//===----------------------------------------------------------------------===//128 129// Pseudo -> LA / LAY130def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>;131 132//===----------------------------------------------------------------------===//133// Branch instructions134//===----------------------------------------------------------------------===//135 136// Branch137def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;138def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>;139def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>;140def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>;141def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "BI(C)?(Asm.*)?$")>;142def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>;143def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>;144def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>;145def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "B(R)?X(H|L).*$")>;146 147// Compare and branch148def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;149def : InstRW<[WLat1, FXb2, GroupAlone],150 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;151 152//===----------------------------------------------------------------------===//153// Trap instructions154//===----------------------------------------------------------------------===//155 156// Trap157def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>;158 159// Compare and trap160def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;161def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;162def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;163def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>;164 165//===----------------------------------------------------------------------===//166// Call and return instructions167//===----------------------------------------------------------------------===//168 169// Call170def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>;171def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL(_XPLINK64)?$")>;172def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?(_XPLINK64|_STACKEXT)?$")>;173def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;174 175// Return176def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return(_XPLINK)?$")>;177def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn(_XPLINK)?$")>;178 179//===----------------------------------------------------------------------===//180// Move instructions181//===----------------------------------------------------------------------===//182 183// Moves184def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;185def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>;186 187// Move character188def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;189def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;190def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "MVCRL$")>;191 192// Pseudo -> reg move193def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;194def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>;195def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>;196def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>;197 198// Loads199def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;200def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>;201def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;202def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;203 204def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>;205def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>;206 207def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>;208def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>;209def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR$")>;210 211// Load and zero rightmost byte212def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>;213 214// Load and trap215def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>;216 217// Load and test218def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>;219def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>;220 221// Stores222def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>;223def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>;224def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;225 226// String moves.227def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;228 229//===----------------------------------------------------------------------===//230// Conditional move instructions231//===----------------------------------------------------------------------===//232 233def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>;234def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>;235def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>;236def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],237 (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>;238def : InstRW<[WLat1, FXb, LSU, NormalGr],239 (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>;240 241def : InstRW<[WLat2, FXa, NormalGr], (instregex "SELRMux$")>;242def : InstRW<[WLat2, FXa, NormalGr], (instregex "SEL(G|FH)?R(Asm.*)?$")>;243 244//===----------------------------------------------------------------------===//245// Sign extensions246//===----------------------------------------------------------------------===//247 248def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>;249def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>;250 251def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>;252def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>;253 254def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;255def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>;256def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;257def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>;258def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>;259 260//===----------------------------------------------------------------------===//261// Zero extensions262//===----------------------------------------------------------------------===//263 264def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>;265def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>;266def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>;267def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;268def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;269def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>;270def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;271def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;272 273// Load and zero rightmost byte274def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>;275 276// Load and trap277def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>;278 279//===----------------------------------------------------------------------===//280// Truncations281//===----------------------------------------------------------------------===//282 283def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;284def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;285def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;286 287//===----------------------------------------------------------------------===//288// Multi-register moves289//===----------------------------------------------------------------------===//290 291// Load multiple (estimated average of 5 ops)292def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;293 294// Load multiple disjoint295def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;296 297// Store multiple298def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;299 300//===----------------------------------------------------------------------===//301// Byte swaps302//===----------------------------------------------------------------------===//303 304def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>;305def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>;306def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>;307def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;308 309//===----------------------------------------------------------------------===//310// Load address instructions311//===----------------------------------------------------------------------===//312 313def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>;314 315// Load the Global Offset Table address ( -> larl )316def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>;317 318// Load (logical) indexed address.319def : InstRW<[WLat2, FXa2, NormalGr], (instregex "(L)?LXA(B|H|F|G|Q)$")>;320 321//===----------------------------------------------------------------------===//322// Absolute and Negation323//===----------------------------------------------------------------------===//324 325def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LP(G)?R$")>;326def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "L(N|P)GFR$")>;327def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LN(R|GR)$")>;328def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>;329def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>;330 331//===----------------------------------------------------------------------===//332// Insertion333//===----------------------------------------------------------------------===//334 335def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>;336def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],337 (instregex "IC32(Y)?$")>;338def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr],339 (instregex "ICM(H|Y)?$")>;340def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>;341def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>;342def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>;343def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>;344def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>;345def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>;346def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>;347 348//===----------------------------------------------------------------------===//349// Addition350//===----------------------------------------------------------------------===//351 352def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],353 (instregex "A(Y)?$")>;354def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],355 (instregex "AH(Y)?$")>;356def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>;357def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>;358def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],359 (instregex "AG$")>;360def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>;361def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>;362def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>;363def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>;364def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>;365def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],366 (instregex "AL(Y)?$")>;367def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>;368def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],369 (instregex "ALG(F)?$")>;370def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>;371def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>;372def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>;373def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>;374def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>;375def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>;376def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>;377def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>;378def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>;379 380// Logical addition with carry381def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],382 (instregex "ALC(G)?$")>;383def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>;384 385// Add with sign extension (16/32 -> 64)386def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],387 (instregex "AG(F|H)$")>;388def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>;389 390//===----------------------------------------------------------------------===//391// Subtraction392//===----------------------------------------------------------------------===//393 394def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],395 (instregex "S(G|Y)?$")>;396def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],397 (instregex "SH(Y)?$")>;398def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>;399def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>;400def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],401 (instregex "SL(G|GF|Y)?$")>;402def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>;403def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>;404def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>;405def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>;406def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>;407def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>;408 409// Subtraction with borrow410def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],411 (instregex "SLB(G)?$")>;412def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>;413 414// Subtraction with sign extension (16/32 -> 64)415def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],416 (instregex "SG(F|H)$")>;417def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>;418 419//===----------------------------------------------------------------------===//420// AND421//===----------------------------------------------------------------------===//422 423def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],424 (instregex "N(G|Y)?$")>;425def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>;426def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;427def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>;428def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>;429def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>;430def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>;431def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>;432def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>;433def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>;434def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>;435def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>;436 437//===----------------------------------------------------------------------===//438// OR439//===----------------------------------------------------------------------===//440 441def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],442 (instregex "O(G|Y)?$")>;443def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>;444def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>;445def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;446def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>;447def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>;448def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>;449def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>;450def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>;451def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>;452def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>;453def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>;454 455//===----------------------------------------------------------------------===//456// XOR457//===----------------------------------------------------------------------===//458 459def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],460 (instregex "X(G|Y)?$")>;461def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>;462def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>;463def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>;464def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>;465def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>;466def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>;467def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>;468 469//===----------------------------------------------------------------------===//470// Combined logical operations471//===----------------------------------------------------------------------===//472 473def : InstRW<[WLat1, FXa, NormalGr], (instregex "NC(G)?RK$")>;474def : InstRW<[WLat1, FXa, NormalGr], (instregex "OC(G)?RK$")>;475def : InstRW<[WLat1, FXa, NormalGr], (instregex "NN(G)?RK$")>;476def : InstRW<[WLat1, FXa, NormalGr], (instregex "NO(G)?RK$")>;477def : InstRW<[WLat1, FXa, NormalGr], (instregex "NOT(G)?R$")>;478def : InstRW<[WLat1, FXa, NormalGr], (instregex "NX(G)?RK$")>;479 480//===----------------------------------------------------------------------===//481// Multiplication482//===----------------------------------------------------------------------===//483 484def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr],485 (instregex "MS(GF|Y)?$")>;486def : InstRW<[WLat4, FXa, NormalGr], (instregex "MS(R|FI)$")>;487def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>;488def : InstRW<[WLat4, FXa, NormalGr], (instregex "MSGR$")>;489def : InstRW<[WLat4, FXa, NormalGr], (instregex "MSGF(I|R)$")>;490def : InstRW<[WLat5LSU, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MLG$")>;491def : InstRW<[WLat5, FXa2, GroupAlone], (instregex "MLGR$")>;492def : InstRW<[WLat4, FXa, NormalGr], (instregex "MGHI$")>;493def : InstRW<[WLat4, FXa, NormalGr], (instregex "MHI$")>;494def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>;495def : InstRW<[WLat5, FXa2, GroupAlone], (instregex "M(L)?R$")>;496def : InstRW<[WLat5LSU, RegReadAdv, FXa2, LSU, GroupAlone],497 (instregex "M(FY|L)?$")>;498def : InstRW<[WLat8, RegReadAdv, FXa, LSU, NormalGr], (instregex "MGH$")>;499def : InstRW<[WLat9, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MG$")>;500def : InstRW<[WLat5, FXa2, GroupAlone], (instregex "MGRK$")>;501def : InstRW<[WLat4LSU, WLat4LSU, RegReadAdv, FXa, LSU, NormalGr],502 (instregex "MSC$")>;503def : InstRW<[WLat4LSU, WLat4LSU, RegReadAdv, FXa, LSU, NormalGr],504 (instregex "MSGC$")>;505def : InstRW<[WLat4, WLat4, FXa, NormalGr], (instregex "MSRKC$")>;506def : InstRW<[WLat4, WLat4, FXa, NormalGr], (instregex "MSGRKC$")>;507 508//===----------------------------------------------------------------------===//509// Division and remainder510//===----------------------------------------------------------------------===//511 512def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>;513def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>;514def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>;515def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2],516 (instregex "DSG(F)?$")>;517def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>;518def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>;519def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2],520 (instregex "DL(G)?$")>;521 522//===----------------------------------------------------------------------===//523// Shifts524//===----------------------------------------------------------------------===//525 526def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>;527def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>;528def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>;529def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>;530def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],531 (instregex "S(L|R)D(A|L)$")>;532 533// Rotate534def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;535 536// Rotate and insert537def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)(Opt)?$")>;538def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)(Opt)?$")>;539def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?(Z)?(Opt)?$")>;540def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;541 542// Rotate and Select543def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "R(N|O|X)SBG(Opt)?$")>;544 545//===----------------------------------------------------------------------===//546// Comparison547//===----------------------------------------------------------------------===//548 549def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],550 (instregex "C(G|Y|Mux)?$")>;551def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>;552def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>;553def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>;554def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;555def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>;556def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>;557def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>;558def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>;559def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],560 (instregex "CL(Y|Mux)?$")>;561def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>;562def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>;563def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>;564def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;565def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>;566def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>;567def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>;568def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>;569def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>;570def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>;571def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;572def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>;573def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>;574def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>;575def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>;576def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>;577def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>;578 579// Compare halfword580def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>;581def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>;582def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;583def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>;584def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>;585 586// Compare with sign extension (32 -> 64)587def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>;588def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>;589def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>;590 591// Compare logical character592def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>;593def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;594def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;595 596// Test under mask597def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>;598def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>;599def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>;600def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>;601def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>;602def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>;603 604// Compare logical characters under mask605def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr],606 (instregex "CLM(H|Y)?$")>;607 608//===----------------------------------------------------------------------===//609// Prefetch and execution hint610//===----------------------------------------------------------------------===//611 612def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>;613def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>;614def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>;615def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>;616 617//===----------------------------------------------------------------------===//618// Atomic operations619//===----------------------------------------------------------------------===//620 621def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>;622 623def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>;624def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>;625def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>;626def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>;627def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>;628 629// Test and set630def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>;631 632// Compare and swap633def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone],634 (instregex "CS(G|Y)?$")>;635 636// Compare double and swap637def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2],638 (instregex "CDS(Y)?$")>;639def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3,640 GroupAlone3], (instregex "CDSG$")>;641 642// Compare and swap and store643def : InstRW<[WLat30, MCD], (instregex "CSST$")>;644 645// Perform locked operation646def : InstRW<[WLat30, MCD], (instregex "PLO$")>;647 648// Load/store pair from/to quadword649def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;650def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>;651 652// Load pair disjoint653def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;654 655// Compare and load656def : InstRW<[WLat30, MCD], (instregex "CAL(G|GF)?$")>;657 658// Perform functions with concurrent results659def : InstRW<[WLat30, MCD], (instregex "PFCR$")>;660 661//===----------------------------------------------------------------------===//662// Translate and convert663//===----------------------------------------------------------------------===//664 665def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>;666def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2],667 (instregex "TRT$")>;668def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;669def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;670def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;671def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;672def : InstRW<[WLat30, WLat30, WLat30, MCD],673 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;674def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;675 676//===----------------------------------------------------------------------===//677// Message-security assist678//===----------------------------------------------------------------------===//679 680def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],681 (instregex "KM(C|F|O|CTR|A)?$")>;682def : InstRW<[WLat30, WLat30, WLat30, MCD],683 (instregex "(KIMD|KLMD|KMAC|KDSA)(Opt)?$")>;684def : InstRW<[WLat30, WLat30, WLat30, MCD],685 (instregex "(PCC|PPNO|PRNO)$")>;686 687//===----------------------------------------------------------------------===//688// Guarded storage689//===----------------------------------------------------------------------===//690 691def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LGG$")>;692def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLGFSG$")>;693def : InstRW<[WLat30, MCD], (instregex "(L|ST)GSC$")>;694 695//===----------------------------------------------------------------------===//696// Decimal arithmetic697//===----------------------------------------------------------------------===//698 699def : InstRW<[WLat20, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2],700 (instregex "CVBG$")>;701def : InstRW<[WLat20, RegReadAdv, FXb, VecDF, LSU, GroupAlone2],702 (instregex "CVB(Y)?$")>;703def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>;704def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>;705def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;706def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;707def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;708def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>;709 710def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2],711 (instregex "(A|S|ZA)P$")>;712def : InstRW<[WLat1, FXb, VecDFX2, LSU3, GroupAlone2], (instregex "MP$")>;713def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "DP$")>;714def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>;715def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>;716def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>;717def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;718 719//===----------------------------------------------------------------------===//720// Access registers721//===----------------------------------------------------------------------===//722 723// Extract/set/copy access register724def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;725 726// Load address extended727def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>;728 729// Load/store access multiple (not modeled precisely)730def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;731def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>;732 733//===----------------------------------------------------------------------===//734// Program mask and addressing mode735//===----------------------------------------------------------------------===//736 737// Insert Program Mask738def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>;739 740// Set Program Mask741def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;742 743// Branch and link744def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>;745 746// Test addressing mode747def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>;748 749// Set addressing mode750def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>;751 752// Branch (and save) and set mode.753def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>;754def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>;755 756//===----------------------------------------------------------------------===//757// Transactional execution758//===----------------------------------------------------------------------===//759 760// Transaction begin761def : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>;762 763// Transaction end764def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>;765 766// Transaction abort767def : InstRW<[WLat30, MCD], (instregex "TABORT$")>;768 769// Extract Transaction Nesting Depth770def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>;771 772// Nontransactional store773def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>;774 775//===----------------------------------------------------------------------===//776// Processor assist777//===----------------------------------------------------------------------===//778 779def : InstRW<[WLat1, FXb, GroupAlone], (instregex "PPA$")>;780 781//===----------------------------------------------------------------------===//782// Miscellaneous Instructions.783//===----------------------------------------------------------------------===//784 785// Count leading/trailing zeros.786def : InstRW<[WLat3, FXa, NormalGr], (instregex "C(L|T)ZG$")>;787 788// Find leftmost one789def : InstRW<[WLat5, WLat5, FXa2, GroupAlone], (instregex "FLOGR$")>;790 791// Population count792def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT(Opt)?$")>;793 794// Bit deposit and bit extract.795def : InstRW<[WLat4, FXa, NormalGr], (instregex "(BDEPG|BEXTG)$")>;796 797// String instructions798def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;799def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;800 801// Various complex instructions802def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;803def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],804 (instregex "UPT$")>;805def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;806def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;807def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "SORTL$")>;808def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "DFLTCC$")>;809def : InstRW<[WLat30, WLat30, MCD], (instregex "NNPA$")>;810 811// Execute812def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>;813 814//===----------------------------------------------------------------------===//815// .insn directive instructions816//===----------------------------------------------------------------------===//817 818// An "empty" sched-class will be assigned instead of the "invalid sched-class".819// getNumDecoderSlots() will then return 1 instead of 0.820def : InstRW<[], (instregex "Insn.*")>;821 822 823// ----------------------------- Floating point ----------------------------- //824 825//===----------------------------------------------------------------------===//826// FP: Move instructions827//===----------------------------------------------------------------------===//828 829// Load zero830def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER|ER_16)$")>;831def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>;832 833// Load834def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER(16)?$")>;835def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R16|R32|GR)$")>;836def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>;837def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>;838 839// Load and Test840def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>;841def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXBR$")>;842 843// Copy sign844def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s|h)(d|s|h)$")>;845 846//===----------------------------------------------------------------------===//847// FP: Load instructions848//===----------------------------------------------------------------------===//849 850def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "L(E16|E)(Y)?$")>;851def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>;852def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;853 854//===----------------------------------------------------------------------===//855// FP: Store instructions856//===----------------------------------------------------------------------===//857 858def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E16|E|D)(Y)?$")>;859def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>;860 861//===----------------------------------------------------------------------===//862// FP: Conversion instructions863//===----------------------------------------------------------------------===//864 865// Load rounded866def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LEDBR(A)?$")>;867def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;868 869// Load lengthened870def : InstRW<[WLat6LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>;871def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LDEBR$")>;872def : InstRW<[WLat7LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;873def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>;874 875// Convert from fixed / logical876def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>;877def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>;878def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>;879def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>;880 881// Convert to fixed / logical882def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked],883 (instregex "C(F|G)(E|D)BR(A)?$")>;884def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked],885 (instregex "C(F|G)XBR(A)?$")>;886def : InstRW<[WLat9, WLat9, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>;887def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "CLFDBR$")>;888def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>;889def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>;890 891//===----------------------------------------------------------------------===//892// FP: Unary arithmetic893//===----------------------------------------------------------------------===//894 895// Load Complement / Negative / Positive896def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;897def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32|_16)?$")>;898def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>;899 900// Square root901def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>;902def : InstRW<[WLat20, VecFPd20, NormalGr], (instregex "SQEBR$")>;903def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQDBR$")>;904def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>;905 906// Load FP integer907def : InstRW<[WLat6, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>;908def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>;909 910//===----------------------------------------------------------------------===//911// FP: Binary arithmetic912//===----------------------------------------------------------------------===//913 914// Addition915def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],916 (instregex "A(E|D)B$")>;917def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "A(E|D)BR$")>;918def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>;919 920// Subtraction921def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],922 (instregex "S(E|D)B$")>;923def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "S(E|D)BR$")>;924def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>;925 926// Multiply927def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],928 (instregex "M(D|DE|EE)B$")>;929def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>;930def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone],931 (instregex "MXDB$")>;932def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MXDBR$")>;933def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>;934 935// Multiply and add / subtract936def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],937 (instregex "M(A|S)EB$")>;938def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>;939def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],940 (instregex "M(A|S)DB$")>;941def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(A|S)DBR$")>;942 943// Division944def : InstRW<[WLat20, RegReadAdv, VecFPd20, LSU, NormalGr], (instregex "DEB$")>;945def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], (instregex "DDB$")>;946def : InstRW<[WLat20, VecFPd20, NormalGr], (instregex "DEBR$")>;947def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "DDBR$")>;948def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>;949 950// Divide to integer951def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;952 953//===----------------------------------------------------------------------===//954// FP: Comparisons955//===----------------------------------------------------------------------===//956 957// Compare958def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr],959 (instregex "(K|C)(E|D)B$")>;960def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>;961def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>;962 963// Test Data Class964def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>;965def : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>;966 967//===----------------------------------------------------------------------===//968// FP: Floating-point control register instructions969//===----------------------------------------------------------------------===//970 971def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>;972def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>;973def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>;974def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>;975def : InstRW<[WLat30, MCD], (instregex "SFASR$")>;976def : InstRW<[WLat30, MCD], (instregex "LFAS$")>;977def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>;978 979 980// --------------------- Hexadecimal floating point ------------------------- //981 982//===----------------------------------------------------------------------===//983// HFP: Move instructions984//===----------------------------------------------------------------------===//985 986// Load and Test987def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>;988def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>;989 990//===----------------------------------------------------------------------===//991// HFP: Conversion instructions992//===----------------------------------------------------------------------===//993 994// Load rounded995def : InstRW<[WLat6, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>;996def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LEXR$")>;997def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>;998 999// Load lengthened1000def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;1001def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>;1002def : InstRW<[WLat7LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>;1003def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>;1004 1005// Convert from fixed1006def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>;1007def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>;1008 1009// Convert to fixed1010def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>;1011def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>;1012 1013// Convert BFP to HFP / HFP to BFP.1014def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "THD(E)?R$")>;1015def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "TB(E)?DR$")>;1016 1017//===----------------------------------------------------------------------===//1018// HFP: Unary arithmetic1019//===----------------------------------------------------------------------===//1020 1021// Load Complement / Negative / Positive1022def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;1023def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>;1024 1025// Halve1026def : InstRW<[WLat6, VecBF, NormalGr], (instregex "H(E|D)R$")>;1027 1028// Square root1029def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>;1030def : InstRW<[WLat20, VecFPd20, NormalGr], (instregex "SQER$")>;1031def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQDR$")>;1032def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>;1033 1034// Load FP integer1035def : InstRW<[WLat6, VecBF, NormalGr], (instregex "FI(E|D)R$")>;1036def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>;1037 1038//===----------------------------------------------------------------------===//1039// HFP: Binary arithmetic1040//===----------------------------------------------------------------------===//1041 1042// Addition1043def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1044 (instregex "A(E|D|U|W)$")>;1045def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>;1046def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>;1047 1048// Subtraction1049def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1050 (instregex "S(E|D|U|W)$")>;1051def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>;1052def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>;1053 1054// Multiply1055def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1056 (instregex "M(D|DE|E|EE)$")>;1057def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>;1058def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone],1059 (instregex "MXD$")>;1060def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MXDR$")>;1061def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXR$")>;1062def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone], (instregex "MY$")>;1063def : InstRW<[WLat6LSU, RegReadAdv, VecBF2, LSU, GroupAlone],1064 (instregex "MY(H|L)$")>;1065def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MYR$")>;1066def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "MY(H|L)R$")>;1067 1068// Multiply and add / subtract1069def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],1070 (instregex "M(A|S)(E|D)$")>;1071def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>;1072def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone],1073 (instregex "MAY$")>;1074def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],1075 (instregex "MAY(H|L)$")>;1076def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MAYR$")>;1077def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>;1078 1079// Division1080def : InstRW<[WLat20, RegReadAdv, VecFPd20, LSU, NormalGr], (instregex "DE$")>;1081def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], (instregex "DD$")>;1082def : InstRW<[WLat20, VecFPd20, NormalGr], (instregex "DER$")>;1083def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "DDR$")>;1084def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>;1085 1086//===----------------------------------------------------------------------===//1087// HFP: Comparisons1088//===----------------------------------------------------------------------===//1089 1090// Compare1091def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr],1092 (instregex "C(E|D)$")>;1093def : InstRW<[WLat6, VecBF, NormalGr], (instregex "C(E|D)R$")>;1094def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>;1095 1096 1097// ------------------------ Decimal floating point -------------------------- //1098 1099//===----------------------------------------------------------------------===//1100// DFP: Move instructions1101//===----------------------------------------------------------------------===//1102 1103// Load and Test1104def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>;1105def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>;1106 1107//===----------------------------------------------------------------------===//1108// DFP: Conversion instructions1109//===----------------------------------------------------------------------===//1110 1111// Load rounded1112def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>;1113def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>;1114 1115// Load lengthened1116def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>;1117def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>;1118 1119// Convert from fixed / logical1120def : InstRW<[WLat15, FXb, VecDF, Cracked], (instregex "CDFTR(A)?$")>;1121def : InstRW<[WLat20, FXb, VecDF, Cracked], (instregex "CDGTR(A)?$")>;1122def : InstRW<[WLat15, FXb, VecDF4, GroupAlone2], (instregex "CXFTR(A)?$")>;1123def : InstRW<[WLat20, FXb, VecDF4, GroupAlone2], (instregex "CXGTR(A)?$")>;1124def : InstRW<[WLat15, FXb, VecDF, Cracked], (instregex "CDLFTR$")>;1125def : InstRW<[WLat20, FXb, VecDF, Cracked], (instregex "CDLGTR$")>;1126def : InstRW<[WLat15, FXb, VecDF4, GroupAlone2], (instregex "CXLFTR$")>;1127def : InstRW<[WLat20, FXb, VecDF4, GroupAlone2], (instregex "CXLGTR$")>;1128 1129// Convert to fixed / logical1130def : InstRW<[WLat20, WLat20, FXb, VecDF, Cracked],1131 (instregex "C(F|G)DTR(A)?$")>;1132def : InstRW<[WLat20, WLat20, FXb, VecDF2, Cracked],1133 (instregex "C(F|G)XTR(A)?$")>;1134def : InstRW<[WLat20, WLat20, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>;1135def : InstRW<[WLat20, WLat20, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>;1136 1137// Convert from / to signed / unsigned packed1138def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>;1139def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>;1140def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>;1141def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>;1142 1143// Convert from / to zoned1144def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>;1145def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>;1146def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>;1147def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>;1148 1149// Convert from / to packed1150def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>;1151def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>;1152def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>;1153def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>;1154 1155// Perform floating-point operation1156def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;1157 1158//===----------------------------------------------------------------------===//1159// DFP: Unary arithmetic1160//===----------------------------------------------------------------------===//1161 1162// Load FP integer1163def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>;1164def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>;1165 1166// Extract biased exponent1167def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>;1168def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>;1169 1170// Extract significance1171def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>;1172def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>;1173 1174//===----------------------------------------------------------------------===//1175// DFP: Binary arithmetic1176//===----------------------------------------------------------------------===//1177 1178// Addition1179def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>;1180def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>;1181 1182// Subtraction1183def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>;1184def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>;1185 1186// Multiply1187def : InstRW<[WLat20, VecDF, NormalGr], (instregex "MDTR(A)?$")>;1188def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>;1189 1190// Division1191def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>;1192def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>;1193 1194// Quantize1195def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>;1196def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>;1197 1198// Reround1199def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>;1200def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>;1201 1202// Shift significand left/right1203def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>;1204def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;1205 1206// Insert biased exponent1207def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>;1208def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>;1209 1210//===----------------------------------------------------------------------===//1211// DFP: Comparisons1212//===----------------------------------------------------------------------===//1213 1214// Compare1215def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>;1216def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>;1217 1218// Compare biased exponent1219def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>;1220def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>;1221 1222// Test Data Class/Group1223def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>;1224def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;1225 1226 1227// --------------------------------- Vector --------------------------------- //1228 1229//===----------------------------------------------------------------------===//1230// Vector: Move instructions1231//===----------------------------------------------------------------------===//1232 1233def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;1234def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;1235def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;1236def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;1237 1238//===----------------------------------------------------------------------===//1239// Vector: Immediate instructions1240//===----------------------------------------------------------------------===//1241 1242def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;1243def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;1244def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>;1245def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>;1246def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>;1247def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>;1248 1249//===----------------------------------------------------------------------===//1250// Vector: Loads1251//===----------------------------------------------------------------------===//1252 1253def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(Align)?$")>;1254def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(L|BB)$")>;1255def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(16|32|64)$")>;1256def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H|LF)?$")>;1257def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>;1258def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],1259 (instregex "VLE(B|F|G|H)$")>;1260def : InstRW<[WLat5LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked],1261 (instregex "VGE(F|G)$")>;1262def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone],1263 (instregex "VLM(Align)?$")>;1264def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLRL(R)?$")>;1265 1266//===----------------------------------------------------------------------===//1267// Vector: Stores1268//===----------------------------------------------------------------------===//1269 1270def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|16|32|64)?$")>;1271def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>;1272def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>;1273def : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM(Align)?$")>;1274def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>;1275def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTRL(R)?$")>;1276 1277//===----------------------------------------------------------------------===//1278// Vector: Byte swaps1279//===----------------------------------------------------------------------===//1280 1281def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLBR(H|F|G|Q)?$")>;1282def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLER(H|F|G)?$")>;1283def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],1284 (instregex "VLEBR(H|F|G)$")>;1285def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEBRZ(H|F|G|E)?$")>;1286def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLBRREP(H|F|G)?$")>;1287def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTBR(H|F|G|Q)?$")>;1288def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTER(H|F|G)?$")>;1289def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTEBRH$")>;1290def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTEBR(F|G)$")>;1291 1292//===----------------------------------------------------------------------===//1293// Vector: Selects and permutes1294//===----------------------------------------------------------------------===//1295 1296def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>;1297def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>;1298def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>;1299def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>;1300def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VBPERM$")>;1301def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>;1302def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>;1303def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VBLEND(B|F|G|H|Q)?$")>;1304 1305//===----------------------------------------------------------------------===//1306// Vector: Widening and narrowing1307//===----------------------------------------------------------------------===//1308 1309def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>;1310def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>;1311def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>;1312def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>;1313def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>;1314def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>;1315def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGEM(B|H|F|G|Q)?$")>;1316def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H|G)?$")>;1317def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F|G)?$")>;1318def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|G|W)?$")>;1319def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H|G)?$")>;1320 1321//===----------------------------------------------------------------------===//1322// Vector: Integer arithmetic1323//===----------------------------------------------------------------------===//1324 1325def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>;1326def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>;1327def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H|Q)?$")>;1328def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H|Q)?$")>;1329def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O|N|X)?$")>;1330def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO(C)?$")>;1331def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>;1332def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H|Q)?$")>;1333def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H|Q)?$")>;1334def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VD(L)?(F|G|Q)?$")>;1335def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VEVAL$")>;1336def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>;1337def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>;1338def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>;1339def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>;1340def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H|Q)?$")>;1341def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H|Q)?$")>;1342def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H|Q)?$")>;1343def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H|Q)?$")>;1344def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H|Q)?$")>;1345def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H|Q)?$")>;1346def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F|G|Q)?$")>;1347def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H|G)?$")>;1348def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|G|Q|W)?$")>;1349def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H|G)?$")>;1350def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H|G)?$")>;1351def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H|G)?$")>;1352def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H|G|Q)?$")>;1353def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H|G)?$")>;1354def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H|G|Q)?$")>;1355def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F|G|Q)?$")>;1356def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H|G)?$")>;1357def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|G|Q|W)?$")>;1358def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H|G)?$")>;1359def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H|G)?$")>;1360def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VMSL(G)?$")>;1361 1362def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT(B|F|G|H)?$")>;1363 1364def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VR(L)?(F|G|Q)?$")>;1365 1366def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>;1367def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>;1368def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>;1369def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>;1370def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>;1371def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>;1372def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>;1373def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>;1374def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>;1375 1376def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>;1377def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLB$")>;1378def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;1379def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>;1380def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLD$")>;1381def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSRD$")>;1382 1383def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>;1384def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>;1385def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>;1386 1387def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>;1388def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>;1389def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>;1390 1391//===----------------------------------------------------------------------===//1392// Vector: Integer comparison1393//===----------------------------------------------------------------------===//1394 1395def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H|Q)?$")>;1396def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H|Q)?$")>;1397def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H|Q)?$")>;1398def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H|Q)S$")>;1399def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H|Q)?$")>;1400def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H|Q)S$")>;1401def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H|Q)?$")>;1402def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H|Q)S$")>;1403def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;1404 1405//===----------------------------------------------------------------------===//1406// Vector: Floating-point arithmetic1407//===----------------------------------------------------------------------===//1408 1409// Conversion and rounding1410def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCFP(S|L)$")>;1411def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCD(L)?G$")>;1412def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCD(L)?GB$")>;1413def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WCD(L)?GB$")>;1414def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCE(L)?FB$")>;1415def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WCE(L)?FB$")>;1416def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(S|L)FP$")>;1417def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?GD$")>;1418def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?GDB$")>;1419def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WC(L)?GDB$")>;1420def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?FEB$")>;1421def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WC(L)?FEB$")>;1422def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VL(DE|ED)$")>;1423def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VL(DE|ED)B$")>;1424def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>;1425def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFL(L|R)$")>;1426def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFL(LS|RD)$")>;1427def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFL(LS|RD)$")>;1428def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFLLD$")>;1429def : InstRW<[WLat8, VecDF, NormalGr], (instregex "WFLRX$")>;1430def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFI(DB)?$")>;1431def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFIDB$")>;1432def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFISB$")>;1433def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFISB$")>;1434def : InstRW<[WLat8, VecDF, NormalGr], (instregex "WFIXB$")>;1435 1436// Sign operations1437def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>;1438def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>;1439def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSOSB$")>;1440def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFPSOXB$")>;1441def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>;1442def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)SB$")>;1443def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFL(C|N|P)XB$")>;1444 1445// Minimum / maximum1446def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)$")>;1447def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)DB$")>;1448def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)DB$")>;1449def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)SB$")>;1450def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)SB$")>;1451def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WF(MAX|MIN)XB$")>;1452 1453// Test data class1454def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>;1455def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>;1456def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCISB$")>;1457def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFTCIXB$")>;1458 1459// Add / subtract1460def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)$")>;1461def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)DB$")>;1462def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(A|S)DB$")>;1463def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)SB$")>;1464def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(A|S)SB$")>;1465def : InstRW<[WLat8, VecDF, NormalGr], (instregex "WF(A|S)XB$")>;1466 1467// Multiply / multiply-and-add/subtract1468def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFM(DB)?$")>;1469def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFM(D|S)B$")>;1470def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFMSB$")>;1471def : InstRW<[WLat20, VecDF, NormalGr], (instregex "WFMXB$")>;1472def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)$")>;1473def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>;1474def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>;1475def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)SB$")>;1476def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>;1477def : InstRW<[WLat20, VecDF, NormalGr], (instregex "WF(N)?M(A|S)XB$")>;1478 1479// Divide / square root1480def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;1481def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>;1482def : InstRW<[WLat20, VecFPd20, NormalGr], (instregex "WFDSB$")>;1483def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFDSB$")>;1484def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFDXB$")>;1485def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>;1486def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>;1487def : InstRW<[WLat20, VecFPd20, NormalGr], (instregex "WFSQSB$")>;1488def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQSB$")>;1489def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFSQXB$")>;1490 1491//===----------------------------------------------------------------------===//1492// Vector: Floating-point comparison1493//===----------------------------------------------------------------------===//1494 1495def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)$")>;1496def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)DB$")>;1497def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>;1498def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)DB$")>;1499def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)SB$")>;1500def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SB$")>;1501def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SB$")>;1502def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XB$")>;1503def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XB$")>;1504def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>;1505def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFK(E|H|HE)DBS$")>;1506def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr],1507 (instregex "WF(C|K)(E|H|HE)DBS$")>;1508def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr],1509 (instregex "VF(C|K)(E|H|HE)SBS$")>;1510def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SBS$")>;1511def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SBS$")>;1512def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XBS$")>;1513def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XBS$")>;1514def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>;1515def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>;1516def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)SB$")>;1517def : InstRW<[WLat3, VecDFX, NormalGr], (instregex "WF(C|K)XB$")>;1518 1519//===----------------------------------------------------------------------===//1520// Vector: Floating-point insertion and extraction1521//===----------------------------------------------------------------------===//1522 1523def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR(_16)?$")>;1524def : InstRW<[WLat3, FXb, NormalGr], (instregex "LFER(_16)?$")>;1525 1526//===----------------------------------------------------------------------===//1527// Vector: String instructions1528//===----------------------------------------------------------------------===//1529 1530def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>;1531def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>;1532def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>;1533def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>;1534def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>;1535def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>;1536def : InstRW<[WLat4, WLat4, VecStr, NormalGr],1537 (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>;1538def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>;1539def : InstRW<[WLat4, WLat4, VecStr, NormalGr],1540 (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>;1541def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>;1542def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>;1543def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>;1544def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>;1545def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>;1546def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>;1547def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRS(B|F|H)?$")>;1548def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRSZ(B|F|H)$")>;1549 1550//===----------------------------------------------------------------------===//1551// NNP assist instructions1552//===----------------------------------------------------------------------===//1553 1554def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCFN$")>;1555def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLFN(L|H)$")>;1556def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VC(R)?NF$")>;1557 1558//===----------------------------------------------------------------------===//1559// Vector: Packed-decimal instructions1560//===----------------------------------------------------------------------===//1561 1562def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "VLIP$")>;1563def : InstRW<[WLat6, VecDFX, LSU, GroupAlone2], (instregex "VPKZ$")>;1564def : InstRW<[WLat1, VecDFX, FXb, LSU2, GroupAlone2], (instregex "VUPKZ$")>;1565def : InstRW<[WLat20, WLat20, VecDF, FXb, GroupAlone],1566 (instregex "VCVB(G|Q)?(Opt)?$")>;1567def : InstRW<[WLat15, WLat15, VecDF, FXb, GroupAlone],1568 (instregex "VCVD(G|Q)?$")>;1569def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "V(A|S)P$")>;1570def : InstRW<[WLat30, WLat30, VecDF, GroupAlone], (instregex "VM(S)?P$")>;1571def : InstRW<[WLat30, WLat30, VecDF, GroupAlone], (instregex "V(D|R)P$")>;1572def : InstRW<[WLat30, WLat30, VecDF, GroupAlone], (instregex "VSDP$")>;1573def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "VSRP(R)?$")>;1574def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "VPSOP$")>;1575def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "V(T|C)(P|Z)(Opt)?$")>;1576 1577def : InstRW<[WLat20, VecDF, NormalGr], (instregex "VSCH(S|D|X)?P$")>;1578def : InstRW<[WLat30, VecDF, NormalGr], (instregex "VSCSHP$")>;1579def : InstRW<[WLat30, VecDF, NormalGr], (instregex "VCSPH$")>;1580def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VCLZDP$")>;1581def : InstRW<[WLat2, WLat2, VecDFX, NormalGr], (instregex "VPKZR$")>;1582def : InstRW<[WLat2, WLat2, VecDFX, NormalGr], (instregex "VUPKZH$")>;1583def : InstRW<[WLat2, WLat2, VecDFX, NormalGr], (instregex "VUPKZL$")>;1584 1585// -------------------------------- System ---------------------------------- //1586 1587//===----------------------------------------------------------------------===//1588// System: Program-Status Word Instructions1589//===----------------------------------------------------------------------===//1590 1591def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;1592def : InstRW<[WLat20, GroupAlone3], (instregex "LPSW(E)?(Y)?$")>;1593def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>;1594def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;1595def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;1596def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;1597def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>;1598def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;1599 1600//===----------------------------------------------------------------------===//1601// System: Control Register Instructions1602//===----------------------------------------------------------------------===//1603 1604def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;1605def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>;1606def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;1607def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;1608def : InstRW<[WLat30, MCD], (instregex "ESEA$")>;1609 1610//===----------------------------------------------------------------------===//1611// System: Prefix-Register Instructions1612//===----------------------------------------------------------------------===//1613 1614def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;1615 1616//===----------------------------------------------------------------------===//1617// System: Breaking-Event-Address-Register Instructions1618//===----------------------------------------------------------------------===//1619 1620def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LBEAR$")>;1621def : InstRW<[WLat1, LSU2, FXb, GroupAlone], (instregex "STBEAR$")>;1622 1623//===----------------------------------------------------------------------===//1624// System: Storage-Key and Real Memory Instructions1625//===----------------------------------------------------------------------===//1626 1627def : InstRW<[WLat30, MCD], (instregex "ISKE$")>;1628def : InstRW<[WLat30, MCD], (instregex "IVSK$")>;1629def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;1630def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;1631def : InstRW<[WLat30, MCD], (instregex "IRBM$")>;1632def : InstRW<[WLat30, MCD], (instregex "PFMF$")>;1633def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;1634def : InstRW<[WLat30, MCD], (instregex "PGIN$")>;1635def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;1636 1637//===----------------------------------------------------------------------===//1638// System: Dynamic-Address-Translation Instructions1639//===----------------------------------------------------------------------===//1640 1641def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;1642def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;1643def : InstRW<[WLat30, MCD], (instregex "RDP(Opt)?$")>;1644def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>;1645def : InstRW<[WLat30, MCD], (instregex "PTLB$")>;1646def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;1647def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;1648def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;1649def : InstRW<[WLat30, MCD], (instregex "STRAG$")>;1650def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;1651def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;1652def : InstRW<[WLat30, MCD], (instregex "TPROT$")>;1653 1654//===----------------------------------------------------------------------===//1655// System: Memory-move Instructions1656//===----------------------------------------------------------------------===//1657 1658def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;1659def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;1660def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;1661def : InstRW<[WLat30, MCD], (instregex "MVPG$")>;1662 1663//===----------------------------------------------------------------------===//1664// System: Address-Space Instructions1665//===----------------------------------------------------------------------===//1666 1667def : InstRW<[WLat30, MCD], (instregex "LASP$")>;1668def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;1669def : InstRW<[WLat30, MCD], (instregex "PC$")>;1670def : InstRW<[WLat30, MCD], (instregex "PR$")>;1671def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;1672def : InstRW<[WLat30, MCD], (instregex "RP$")>;1673def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;1674def : InstRW<[WLat30, MCD], (instregex "TAR$")>;1675 1676//===----------------------------------------------------------------------===//1677// System: Linkage-Stack Instructions1678//===----------------------------------------------------------------------===//1679 1680def : InstRW<[WLat30, MCD], (instregex "BAKR$")>;1681def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;1682def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;1683 1684//===----------------------------------------------------------------------===//1685// System: Time-Related Instructions1686//===----------------------------------------------------------------------===//1687 1688def : InstRW<[WLat30, MCD], (instregex "PTFF$")>;1689def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>;1690def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>;1691def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>;1692def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>;1693def : InstRW<[WLat30, MCD], (instregex "STCKC$")>;1694def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>;1695 1696//===----------------------------------------------------------------------===//1697// System: CPU-Related Instructions1698//===----------------------------------------------------------------------===//1699 1700def : InstRW<[WLat30, MCD], (instregex "STAP$")>;1701def : InstRW<[WLat30, MCD], (instregex "STIDP$")>;1702def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;1703def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;1704def : InstRW<[WLat30, MCD], (instregex "ECAG$")>;1705def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;1706def : InstRW<[WLat30, MCD], (instregex "PTF$")>;1707def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;1708def : InstRW<[WLat30, WLat30, MCD], (instregex "QPACI$")>;1709 1710//===----------------------------------------------------------------------===//1711// System: Miscellaneous Instructions1712//===----------------------------------------------------------------------===//1713 1714def : InstRW<[WLat30, MCD], (instregex "SVC$")>;1715def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>;1716def : InstRW<[WLat30, MCD], (instregex "DIAG$")>;1717def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRACE$")>;1718def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TRACG$")>;1719def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;1720def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;1721def : InstRW<[WLat30, MCD], (instregex "SIE$")>;1722 1723//===----------------------------------------------------------------------===//1724// System: CPU-Measurement Facility Instructions1725//===----------------------------------------------------------------------===//1726 1727def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>;1728def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;1729def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;1730def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;1731def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;1732def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;1733def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;1734 1735//===----------------------------------------------------------------------===//1736// System: I/O Instructions1737//===----------------------------------------------------------------------===//1738 1739def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;1740def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;1741def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;1742def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;1743def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;1744def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;1745def : InstRW<[WLat30, MCD], (instregex "SAL$")>;1746 1747//===----------------------------------------------------------------------===//1748// NOPs1749//===----------------------------------------------------------------------===//1750 1751def : InstRW<[WLat1, FXb, NormalGr], (instregex "NOP(R)?(Opt)?$")>;1752def : InstRW<[WLat1, VBU, NormalGr], (instregex "J(G)?NOP$")>;1753}1754 1755