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1//===-- SystemZSubtarget.h - SystemZ subtarget information -----*- C++ -*--===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file declares the SystemZ specific subclass of TargetSubtargetInfo.10//11//===----------------------------------------------------------------------===//12 13#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H14#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H15 16#include "SystemZFrameLowering.h"17#include "SystemZISelLowering.h"18#include "SystemZInstrInfo.h"19#include "SystemZRegisterInfo.h"20#include "SystemZSelectionDAGInfo.h"21#include "llvm/CodeGen/TargetSubtargetInfo.h"22#include "llvm/IR/DataLayout.h"23#include "llvm/TargetParser/Triple.h"24#include <string>25 26#define GET_SUBTARGETINFO_HEADER27#include "SystemZGenSubtargetInfo.inc"28 29namespace llvm {30class GlobalValue;31class StringRef;32 33class SystemZSubtarget : public SystemZGenSubtargetInfo {34  virtual void anchor();35protected:36// Bool members corresponding to the SubtargetFeatures defined in tablegen.37#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)                    \38  bool ATTRIBUTE = DEFAULT;39#include "SystemZGenSubtargetInfo.inc"40 41private:42  Triple TargetTriple;43  std::unique_ptr<SystemZCallingConventionRegisters> SpecialRegisters;44  SystemZInstrInfo InstrInfo;45  SystemZTargetLowering TLInfo;46  SystemZSelectionDAGInfo TSInfo;47  std::unique_ptr<const SystemZFrameLowering> FrameLowering;48 49  SystemZSubtarget &initializeSubtargetDependencies(StringRef CPU,50                                                    StringRef TuneCPU,51                                                    StringRef FS);52  SystemZCallingConventionRegisters *initializeSpecialRegisters();53 54public:55  SystemZSubtarget(const Triple &TT, const std::string &CPU,56                   const std::string &TuneCPU, const std::string &FS,57                   const TargetMachine &TM);58 59  SystemZCallingConventionRegisters *getSpecialRegisters() const {60    assert(SpecialRegisters && "Unsupported SystemZ calling convention");61    return SpecialRegisters.get();62  }63 64  template <class SR> SR &getSpecialRegisters() const {65    return *static_cast<SR *>(getSpecialRegisters());66  }67 68  const TargetFrameLowering *getFrameLowering() const override {69    return FrameLowering.get();70  }71 72  template <class TFL> const TFL *getFrameLowering() const {73    return static_cast<const TFL *>(getFrameLowering());74  }75 76  const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; }77  const SystemZRegisterInfo *getRegisterInfo() const override {78    return &InstrInfo.getRegisterInfo();79  }80  const SystemZTargetLowering *getTargetLowering() const override {81    return &TLInfo;82  }83  const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {84    return &TSInfo;85  }86 87  // True if the subtarget should run MachineScheduler after aggressive88  // coalescing. This currently replaces the SelectionDAG scheduler with the89  // "source" order scheduler.90  bool enableMachineScheduler() const override { return true; }91 92  // This is important for reducing register pressure in vector code.93  bool useAA() const override { return true; }94 95  // Always enable the early if-conversion pass.96  bool enableEarlyIfConversion() const override { return true; }97 98  // Enable tracking of subregister liveness in register allocator.99  bool enableSubRegLiveness() const override;100 101  // Automatically generated by tblgen.102  void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);103 104// Getters for SubtargetFeatures defined in tablegen.105#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)                    \106  bool GETTER() const { return ATTRIBUTE; }107#include "SystemZGenSubtargetInfo.inc"108 109  bool isXRaySupported() const override { return true; }110 111  bool isAddressedViaADA(const GlobalValue *GV) const;112 113  // Return true if GV can be accessed using LARL for reloc model RM114  // and code model CM.115  bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const;116 117  bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }118 119  // Returns TRUE if we are generating GOFF object code120  bool isTargetGOFF() const { return TargetTriple.isOSBinFormatGOFF(); }121 122  // Returns TRUE if we are using XPLINK64 linkage convention123  bool isTargetXPLINK64() const { return (isTargetGOFF() && isTargetzOS()); }124 125  // Returns TRUE if we are generating code for a s390x machine running zOS126  bool isTargetzOS() const { return TargetTriple.isOSzOS(); }127};128} // end namespace llvm129 130#endif131