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1//- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8///9/// \file10/// This file defines the interfaces that WebAssembly uses to lower LLVM11/// code into a selection DAG.12///13//===----------------------------------------------------------------------===//14 15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H17 18#include "llvm/CodeGen/TargetLowering.h"19 20namespace llvm {21 22class WebAssemblySubtarget;23 24class WebAssemblyTargetLowering final : public TargetLowering {25public:26 WebAssemblyTargetLowering(const TargetMachine &TM,27 const WebAssemblySubtarget &STI);28 29 MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const override;30 MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const override;31 32private:33 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the34 /// right decision when generating code for different targets.35 const WebAssemblySubtarget *Subtarget;36 37 AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;38 bool shouldScalarizeBinop(SDValue VecOp) const override;39 FastISel *createFastISel(FunctionLoweringInfo &FuncInfo,40 const TargetLibraryInfo *LibInfo) const override;41 MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;42 MachineBasicBlock *43 EmitInstrWithCustomInserter(MachineInstr &MI,44 MachineBasicBlock *MBB) const override;45 std::pair<unsigned, const TargetRegisterClass *>46 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,47 StringRef Constraint, MVT VT) const override;48 bool isCheapToSpeculateCttz(Type *Ty) const override;49 bool isCheapToSpeculateCtlz(Type *Ty) const override;50 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,51 unsigned AS,52 Instruction *I = nullptr) const override;53 bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, Align Alignment,54 MachineMemOperand::Flags Flags,55 unsigned *Fast) const override;56 bool isIntDivCheap(EVT VT, AttributeList Attr) const override;57 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;58 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;59 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,60 EVT VT) const override;61 bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,62 MachineFunction &MF,63 unsigned Intrinsic) const override;64 65 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,66 const APInt &DemandedElts,67 const SelectionDAG &DAG,68 unsigned Depth) const override;69 70 TargetLoweringBase::LegalizeTypeAction71 getPreferredVectorAction(MVT VT) const override;72 bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,73 EVT VT) const override;74 75 SDValue LowerCall(CallLoweringInfo &CLI,76 SmallVectorImpl<SDValue> &InVals) const override;77 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,78 bool isVarArg,79 const SmallVectorImpl<ISD::OutputArg> &Outs,80 LLVMContext &Context, const Type *RetTy) const override;81 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,82 const SmallVectorImpl<ISD::OutputArg> &Outs,83 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,84 SelectionDAG &DAG) const override;85 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,86 bool IsVarArg,87 const SmallVectorImpl<ISD::InputArg> &Ins,88 const SDLoc &DL, SelectionDAG &DAG,89 SmallVectorImpl<SDValue> &InVals) const override;90 91 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,92 SelectionDAG &DAG) const override;93 94 bool95 shouldSimplifyDemandedVectorElts(SDValue Op,96 const TargetLoweringOpt &TLO) const override;97 98 // Custom lowering hooks.99 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;100 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;101 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;102 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;103 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;104 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;105 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;106 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;107 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;108 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;109 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;110 SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const;111 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;112 SDValue LowerEXTEND_VECTOR_INREG(SDValue Op, SelectionDAG &DAG) const;113 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;114 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;115 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;116 SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;117 SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;118 SDValue LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const;119 SDValue LowerLoad(SDValue Op, SelectionDAG &DAG) const;120 SDValue LowerStore(SDValue Op, SelectionDAG &DAG) const;121 SDValue LowerMUL_LOHI(SDValue Op, SelectionDAG &DAG) const;122 SDValue Replace128Op(SDNode *N, SelectionDAG &DAG) const;123 SDValue LowerUADDO(SDValue Op, SelectionDAG &DAG) const;124 125 // Custom DAG combine hooks126 SDValue127 PerformDAGCombine(SDNode *N,128 TargetLowering::DAGCombinerInfo &DCI) const override;129};130 131namespace WebAssembly {132FastISel *createFastISel(FunctionLoweringInfo &funcInfo,133 const TargetLibraryInfo *libInfo);134} // end namespace WebAssembly135 136} // end namespace llvm137 138#endif139