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1//===-- X86FixupKinds.h - X86 Specific Fixup Entries ------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9#ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86FIXUPKINDS_H10#define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86FIXUPKINDS_H11 12#include "llvm/MC/MCFixup.h"13 14namespace llvm {15namespace X86 {16enum Fixups {17 reloc_riprel_4byte = FirstTargetFixupKind, // 32-bit rip-relative18 reloc_riprel_4byte_movq_load, // 32-bit rip-relative in movq19 reloc_riprel_4byte_movq_load_rex2, // 32-bit rip-relative in movq20 // with rex2 prefix21 reloc_riprel_4byte_relax, // 32-bit rip-relative in relaxable22 // instruction23 reloc_riprel_4byte_relax_rex, // 32-bit rip-relative in relaxable24 // instruction with rex prefix25 reloc_riprel_4byte_relax_rex2, // 32-bit rip-relative in relaxable26 // instruction with rex2 prefix27 reloc_riprel_4byte_relax_evex, // 32-bit rip-relative in relaxable28 // instruction of APX NDD/NF with29 // EVEX prefix30 reloc_signed_4byte, // 32-bit signed. Unlike FK_Data_431 // this will be sign extended at32 // runtime.33 reloc_signed_4byte_relax, // like reloc_signed_4byte, but34 // in a relaxable instruction.35 reloc_global_offset_table, // 32-bit, relative to the start36 // of the instruction. Used only37 // for _GLOBAL_OFFSET_TABLE_.38 reloc_branch_4byte_pcrel, // 32-bit PC relative branch.39 // Marker40 LastTargetFixupKind,41 NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind42};43}44}45 46#endif47