1872 lines · cpp
1//===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This defines functionality used to emit comments about X86 instructions to10// an output stream for -fverbose-asm.11//12//===----------------------------------------------------------------------===//13 14#include "X86InstComments.h"15#include "X86ATTInstPrinter.h"16#include "X86BaseInfo.h"17#include "X86MCTargetDesc.h"18#include "X86ShuffleDecode.h"19#include "llvm/MC/MCInst.h"20#include "llvm/MC/MCInstrInfo.h"21#include "llvm/Support/raw_ostream.h"22#include <string_view>23 24using namespace llvm;25 26#define CASE_SSE_INS_COMMON(Inst, src) \27 case X86::Inst##src:28 29#define CASE_AVX_INS_COMMON(Inst, Suffix, src) \30 case X86::V##Inst##Suffix##src:31 32#define CASE_MASK_INS_COMMON(Inst, Suffix, src) \33 case X86::V##Inst##Suffix##src##k:34 35#define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \36 case X86::V##Inst##Suffix##src##kz:37 38#define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \39 CASE_AVX_INS_COMMON(Inst, Suffix, src) \40 CASE_MASK_INS_COMMON(Inst, Suffix, src) \41 CASE_MASKZ_INS_COMMON(Inst, Suffix, src)42 43#define CASE_MASK_INS_COMMON_INT(Inst, Suffix, src) \44 case X86::V##Inst##Suffix##src##k_Int:45 46#define CASE_MASKZ_INS_COMMON_INT(Inst, Suffix, src) \47 case X86::V##Inst##Suffix##src##kz_Int:48 49#define CASE_AVX512_INS_COMMON_INT(Inst, Suffix, src) \50 CASE_AVX_INS_COMMON(Inst, Suffix, src##_Int) \51 CASE_MASK_INS_COMMON_INT(Inst, Suffix, src) \52 CASE_MASKZ_INS_COMMON_INT(Inst, Suffix, src)53 54#define CASE_FPCLASS_PACKED(Inst, src) \55 CASE_AVX_INS_COMMON(Inst, Z, src##i) \56 CASE_AVX_INS_COMMON(Inst, Z256, src##i) \57 CASE_AVX_INS_COMMON(Inst, Z128, src##i) \58 CASE_MASK_INS_COMMON(Inst, Z, src##i)59 60#define CASE_FPCLASS_PACKED_MEM(Inst) \61 CASE_FPCLASS_PACKED(Inst, m) \62 CASE_FPCLASS_PACKED(Inst, mb)63 64#define CASE_FPCLASS_SCALAR(Inst, src) \65 CASE_AVX_INS_COMMON(Inst, Z, src##i) \66 CASE_MASK_INS_COMMON(Inst, Z, src##i)67 68#define CASE_PTERNLOG(Inst, src) \69 CASE_AVX512_INS_COMMON(Inst, Z, r##src##i) \70 CASE_AVX512_INS_COMMON(Inst, Z256, r##src##i) \71 CASE_AVX512_INS_COMMON(Inst, Z128, r##src##i)72 73#define CASE_MOVDUP(Inst, src) \74 CASE_AVX512_INS_COMMON(Inst, Z, r##src) \75 CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \76 CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \77 CASE_AVX_INS_COMMON(Inst, , r##src) \78 CASE_AVX_INS_COMMON(Inst, Y, r##src) \79 CASE_SSE_INS_COMMON(Inst, r##src)80 81#define CASE_MASK_MOVDUP(Inst, src) \82 CASE_MASK_INS_COMMON(Inst, Z, r##src) \83 CASE_MASK_INS_COMMON(Inst, Z256, r##src) \84 CASE_MASK_INS_COMMON(Inst, Z128, r##src)85 86#define CASE_MASKZ_MOVDUP(Inst, src) \87 CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \88 CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \89 CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)90 91#define CASE_PMOVZX(Inst, src) \92 CASE_AVX512_INS_COMMON(Inst, Z, r##src) \93 CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \94 CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \95 CASE_AVX_INS_COMMON(Inst, , r##src) \96 CASE_AVX_INS_COMMON(Inst, Y, r##src) \97 CASE_SSE_INS_COMMON(Inst, r##src)98 99#define CASE_UNPCK(Inst, src) \100 CASE_AVX512_INS_COMMON(Inst, Z, r##src) \101 CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \102 CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \103 CASE_AVX_INS_COMMON(Inst, , r##src) \104 CASE_AVX_INS_COMMON(Inst, Y, r##src) \105 CASE_SSE_INS_COMMON(Inst, r##src)106 107#define CASE_MASK_UNPCK(Inst, src) \108 CASE_MASK_INS_COMMON(Inst, Z, r##src) \109 CASE_MASK_INS_COMMON(Inst, Z256, r##src) \110 CASE_MASK_INS_COMMON(Inst, Z128, r##src)111 112#define CASE_MASKZ_UNPCK(Inst, src) \113 CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \114 CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \115 CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)116 117#define CASE_SHUF(Inst, suf) \118 CASE_AVX512_INS_COMMON(Inst, Z, suf) \119 CASE_AVX512_INS_COMMON(Inst, Z256, suf) \120 CASE_AVX512_INS_COMMON(Inst, Z128, suf) \121 CASE_AVX_INS_COMMON(Inst, , suf) \122 CASE_AVX_INS_COMMON(Inst, Y, suf) \123 CASE_SSE_INS_COMMON(Inst, suf)124 125#define CASE_MASK_SHUF(Inst, src) \126 CASE_MASK_INS_COMMON(Inst, Z, r##src##i) \127 CASE_MASK_INS_COMMON(Inst, Z256, r##src##i) \128 CASE_MASK_INS_COMMON(Inst, Z128, r##src##i)129 130#define CASE_MASKZ_SHUF(Inst, src) \131 CASE_MASKZ_INS_COMMON(Inst, Z, r##src##i) \132 CASE_MASKZ_INS_COMMON(Inst, Z256, r##src##i) \133 CASE_MASKZ_INS_COMMON(Inst, Z128, r##src##i)134 135#define CASE_VPERMILPI(Inst, src) \136 CASE_AVX512_INS_COMMON(Inst, Z, src##i) \137 CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \138 CASE_AVX512_INS_COMMON(Inst, Z128, src##i) \139 CASE_AVX_INS_COMMON(Inst, , src##i) \140 CASE_AVX_INS_COMMON(Inst, Y, src##i)141 142#define CASE_MASK_VPERMILPI(Inst, src) \143 CASE_MASK_INS_COMMON(Inst, Z, src##i) \144 CASE_MASK_INS_COMMON(Inst, Z256, src##i) \145 CASE_MASK_INS_COMMON(Inst, Z128, src##i)146 147#define CASE_MASKZ_VPERMILPI(Inst, src) \148 CASE_MASKZ_INS_COMMON(Inst, Z, src##i) \149 CASE_MASKZ_INS_COMMON(Inst, Z256, src##i) \150 CASE_MASKZ_INS_COMMON(Inst, Z128, src##i)151 152#define CASE_VPERM(Inst, src) \153 CASE_AVX512_INS_COMMON(Inst, Z, src##i) \154 CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \155 CASE_AVX_INS_COMMON(Inst, Y, src##i)156 157#define CASE_MASK_VPERM(Inst, src) \158 CASE_MASK_INS_COMMON(Inst, Z, src##i) \159 CASE_MASK_INS_COMMON(Inst, Z256, src##i)160 161#define CASE_MASKZ_VPERM(Inst, src) \162 CASE_MASKZ_INS_COMMON(Inst, Z, src##i) \163 CASE_MASKZ_INS_COMMON(Inst, Z256, src##i)164 165#define CASE_VSHUF(Inst, src) \166 CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i) \167 CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i) \168 CASE_AVX512_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \169 CASE_AVX512_INS_COMMON(SHUFI##Inst, Z256, r##src##i)170 171#define CASE_MASK_VSHUF(Inst, src) \172 CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \173 CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \174 CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \175 CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i)176 177#define CASE_MASKZ_VSHUF(Inst, src) \178 CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z, r##src##i) \179 CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z, r##src##i) \180 CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \181 CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z256, r##src##i)182 183#define CASE_AVX512_FMA(Inst, suf) \184 CASE_AVX512_INS_COMMON(Inst, Z, suf) \185 CASE_AVX512_INS_COMMON(Inst, Z256, suf) \186 CASE_AVX512_INS_COMMON(Inst, Z128, suf)187 188#define CASE_FMA(Inst, suf) \189 CASE_AVX512_FMA(Inst, suf) \190 CASE_AVX_INS_COMMON(Inst, , suf) \191 CASE_AVX_INS_COMMON(Inst, Y, suf)192 193#define CASE_FMA_PACKED_REG(Inst) \194 CASE_FMA(Inst##PD, r) \195 CASE_FMA(Inst##PS, r)196 197#define CASE_FMA_PACKED_MEM(Inst) \198 CASE_FMA(Inst##PD, m) \199 CASE_FMA(Inst##PS, m) \200 CASE_AVX512_FMA(Inst##PD, mb) \201 CASE_AVX512_FMA(Inst##PS, mb)202 203#define CASE_FMA_SCALAR_REG(Inst) \204 CASE_AVX_INS_COMMON(Inst##SD, , r) \205 CASE_AVX_INS_COMMON(Inst##SS, , r) \206 CASE_AVX_INS_COMMON(Inst##SD, , r_Int) \207 CASE_AVX_INS_COMMON(Inst##SS, , r_Int) \208 CASE_AVX_INS_COMMON(Inst##SD, Z, r) \209 CASE_AVX_INS_COMMON(Inst##SS, Z, r) \210 CASE_AVX512_INS_COMMON_INT(Inst##SD, Z, r) \211 CASE_AVX512_INS_COMMON_INT(Inst##SS, Z, r)212 213#define CASE_FMA_SCALAR_MEM(Inst) \214 CASE_AVX_INS_COMMON(Inst##SD, , m) \215 CASE_AVX_INS_COMMON(Inst##SS, , m) \216 CASE_AVX_INS_COMMON(Inst##SD, , m_Int) \217 CASE_AVX_INS_COMMON(Inst##SS, , m_Int) \218 CASE_AVX_INS_COMMON(Inst##SD, Z, m) \219 CASE_AVX_INS_COMMON(Inst##SS, Z, m) \220 CASE_AVX512_INS_COMMON_INT(Inst##SD, Z, m) \221 CASE_AVX512_INS_COMMON_INT(Inst##SS, Z, m)222 223#define CASE_FMA4(Inst, suf) \224 CASE_AVX_INS_COMMON(Inst, 4, suf) \225 CASE_AVX_INS_COMMON(Inst, 4Y, suf)226 227#define CASE_FMA4_PACKED_RR(Inst) \228 CASE_FMA4(Inst##PD, rr) \229 CASE_FMA4(Inst##PS, rr)230 231#define CASE_FMA4_PACKED_RM(Inst) \232 CASE_FMA4(Inst##PD, rm) \233 CASE_FMA4(Inst##PS, rm)234 235#define CASE_FMA4_PACKED_MR(Inst) \236 CASE_FMA4(Inst##PD, mr) \237 CASE_FMA4(Inst##PS, mr)238 239#define CASE_FMA4_SCALAR_RR(Inst) \240 CASE_AVX_INS_COMMON(Inst##SD4, , rr) \241 CASE_AVX_INS_COMMON(Inst##SS4, , rr) \242 CASE_AVX_INS_COMMON(Inst##SD4, , rr_Int) \243 CASE_AVX_INS_COMMON(Inst##SS4, , rr_Int)244 245#define CASE_FMA4_SCALAR_RM(Inst) \246 CASE_AVX_INS_COMMON(Inst##SD4, , rm) \247 CASE_AVX_INS_COMMON(Inst##SS4, , rm) \248 CASE_AVX_INS_COMMON(Inst##SD4, , rm_Int) \249 CASE_AVX_INS_COMMON(Inst##SS4, , rm_Int)250 251#define CASE_FMA4_SCALAR_MR(Inst) \252 CASE_AVX_INS_COMMON(Inst##SD4, , mr) \253 CASE_AVX_INS_COMMON(Inst##SS4, , mr) \254 CASE_AVX_INS_COMMON(Inst##SD4, , mr_Int) \255 CASE_AVX_INS_COMMON(Inst##SS4, , mr_Int)256 257static unsigned getVectorRegSize(MCRegister Reg) {258 if (X86II::isZMMReg(Reg))259 return 512;260 if (X86II::isYMMReg(Reg))261 return 256;262 if (X86II::isXMMReg(Reg))263 return 128;264 if (Reg >= X86::MM0 && Reg <= X86::MM7)265 return 64;266 267 llvm_unreachable("Unknown vector reg!");268}269 270static unsigned getRegOperandNumElts(const MCInst *MI, unsigned ScalarSize,271 unsigned OperandIndex) {272 MCRegister OpReg = MI->getOperand(OperandIndex).getReg();273 return getVectorRegSize(OpReg) / ScalarSize;274}275 276static const char *getRegName(MCRegister Reg) {277 return X86ATTInstPrinter::getRegisterName(Reg);278}279 280/// Wraps the destination register name with AVX512 mask/maskz filtering.281static void printMasking(raw_ostream &OS, const MCInst *MI,282 const MCInstrInfo &MCII) {283 const MCInstrDesc &Desc = MCII.get(MI->getOpcode());284 uint64_t TSFlags = Desc.TSFlags;285 286 if (!(TSFlags & X86II::EVEX_K))287 return;288 289 bool MaskWithZero = (TSFlags & X86II::EVEX_Z);290 unsigned MaskOp = Desc.getNumDefs();291 292 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1)293 ++MaskOp;294 295 const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg());296 297 // MASK: zmmX {%kY}298 OS << " {%" << MaskRegName << "}";299 300 // MASKZ: zmmX {%kY} {z}301 if (MaskWithZero)302 OS << " {z}";303}304 305static bool printFMAComments(const MCInst *MI, raw_ostream &OS,306 const MCInstrInfo &MCII) {307 const char *Mul1Name = nullptr, *Mul2Name = nullptr, *AccName = nullptr;308 unsigned NumOperands = MI->getNumOperands();309 bool RegForm = false;310 bool Negate = false;311 StringRef AccStr = "+";312 313 // The operands for FMA3 instructions without rounding fall into two forms:314 // dest, src1, src2, src3315 // dest, src1, mask, src2, src3316 // Where src3 is either a register or 5 memory address operands. So to find317 // dest and src1 we can index from the front. To find src2 and src3 we can318 // index from the end by taking into account memory vs register form when319 // finding src2.320 321 // The operands for FMA4 instructions:322 // dest, src1, src2, src3323 // Where src2 OR src3 are either a register or 5 memory address operands. So324 // to find dest and src1 we can index from the front, src2 (reg/mem) follows325 // and then src3 (reg) will be at the end.326 327 switch (MI->getOpcode()) {328 default:329 return false;330 331 CASE_FMA4_PACKED_RR(FMADD)332 CASE_FMA4_SCALAR_RR(FMADD)333 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());334 [[fallthrough]];335 CASE_FMA4_PACKED_RM(FMADD)336 CASE_FMA4_SCALAR_RM(FMADD)337 Mul2Name = getRegName(MI->getOperand(2).getReg());338 Mul1Name = getRegName(MI->getOperand(1).getReg());339 break;340 CASE_FMA4_PACKED_MR(FMADD)341 CASE_FMA4_SCALAR_MR(FMADD)342 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());343 Mul1Name = getRegName(MI->getOperand(1).getReg());344 break;345 346 CASE_FMA4_PACKED_RR(FMSUB)347 CASE_FMA4_SCALAR_RR(FMSUB)348 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());349 [[fallthrough]];350 CASE_FMA4_PACKED_RM(FMSUB)351 CASE_FMA4_SCALAR_RM(FMSUB)352 Mul2Name = getRegName(MI->getOperand(2).getReg());353 Mul1Name = getRegName(MI->getOperand(1).getReg());354 AccStr = "-";355 break;356 CASE_FMA4_PACKED_MR(FMSUB)357 CASE_FMA4_SCALAR_MR(FMSUB)358 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());359 Mul1Name = getRegName(MI->getOperand(1).getReg());360 AccStr = "-";361 break;362 363 CASE_FMA4_PACKED_RR(FNMADD)364 CASE_FMA4_SCALAR_RR(FNMADD)365 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());366 [[fallthrough]];367 CASE_FMA4_PACKED_RM(FNMADD)368 CASE_FMA4_SCALAR_RM(FNMADD)369 Mul2Name = getRegName(MI->getOperand(2).getReg());370 Mul1Name = getRegName(MI->getOperand(1).getReg());371 Negate = true;372 break;373 CASE_FMA4_PACKED_MR(FNMADD)374 CASE_FMA4_SCALAR_MR(FNMADD)375 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());376 Mul1Name = getRegName(MI->getOperand(1).getReg());377 Negate = true;378 break;379 380 CASE_FMA4_PACKED_RR(FNMSUB)381 CASE_FMA4_SCALAR_RR(FNMSUB)382 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());383 [[fallthrough]];384 CASE_FMA4_PACKED_RM(FNMSUB)385 CASE_FMA4_SCALAR_RM(FNMSUB)386 Mul2Name = getRegName(MI->getOperand(2).getReg());387 Mul1Name = getRegName(MI->getOperand(1).getReg());388 AccStr = "-";389 Negate = true;390 break;391 CASE_FMA4_PACKED_MR(FNMSUB)392 CASE_FMA4_SCALAR_MR(FNMSUB)393 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());394 Mul1Name = getRegName(MI->getOperand(1).getReg());395 AccStr = "-";396 Negate = true;397 break;398 399 CASE_FMA4_PACKED_RR(FMADDSUB)400 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());401 [[fallthrough]];402 CASE_FMA4_PACKED_RM(FMADDSUB)403 Mul2Name = getRegName(MI->getOperand(2).getReg());404 Mul1Name = getRegName(MI->getOperand(1).getReg());405 AccStr = "+/-";406 break;407 CASE_FMA4_PACKED_MR(FMADDSUB)408 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());409 Mul1Name = getRegName(MI->getOperand(1).getReg());410 AccStr = "+/-";411 break;412 413 CASE_FMA4_PACKED_RR(FMSUBADD)414 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());415 [[fallthrough]];416 CASE_FMA4_PACKED_RM(FMSUBADD)417 Mul2Name = getRegName(MI->getOperand(2).getReg());418 Mul1Name = getRegName(MI->getOperand(1).getReg());419 AccStr = "-/+";420 break;421 CASE_FMA4_PACKED_MR(FMSUBADD)422 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());423 Mul1Name = getRegName(MI->getOperand(1).getReg());424 AccStr = "-/+";425 break;426 427 CASE_FMA_PACKED_REG(FMADD132)428 CASE_FMA_SCALAR_REG(FMADD132)429 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());430 RegForm = true;431 [[fallthrough]];432 CASE_FMA_PACKED_MEM(FMADD132)433 CASE_FMA_SCALAR_MEM(FMADD132)434 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());435 Mul1Name = getRegName(MI->getOperand(1).getReg());436 break;437 438 CASE_FMA_PACKED_REG(FMADD213)439 CASE_FMA_SCALAR_REG(FMADD213)440 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());441 RegForm = true;442 [[fallthrough]];443 CASE_FMA_PACKED_MEM(FMADD213)444 CASE_FMA_SCALAR_MEM(FMADD213)445 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());446 Mul2Name = getRegName(MI->getOperand(1).getReg());447 break;448 449 CASE_FMA_PACKED_REG(FMADD231)450 CASE_FMA_SCALAR_REG(FMADD231)451 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());452 RegForm = true;453 [[fallthrough]];454 CASE_FMA_PACKED_MEM(FMADD231)455 CASE_FMA_SCALAR_MEM(FMADD231)456 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());457 AccName = getRegName(MI->getOperand(1).getReg());458 break;459 460 CASE_FMA_PACKED_REG(FMSUB132)461 CASE_FMA_SCALAR_REG(FMSUB132)462 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());463 RegForm = true;464 [[fallthrough]];465 CASE_FMA_PACKED_MEM(FMSUB132)466 CASE_FMA_SCALAR_MEM(FMSUB132)467 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());468 Mul1Name = getRegName(MI->getOperand(1).getReg());469 AccStr = "-";470 break;471 472 CASE_FMA_PACKED_REG(FMSUB213)473 CASE_FMA_SCALAR_REG(FMSUB213)474 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());475 RegForm = true;476 [[fallthrough]];477 CASE_FMA_PACKED_MEM(FMSUB213)478 CASE_FMA_SCALAR_MEM(FMSUB213)479 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());480 Mul2Name = getRegName(MI->getOperand(1).getReg());481 AccStr = "-";482 break;483 484 CASE_FMA_PACKED_REG(FMSUB231)485 CASE_FMA_SCALAR_REG(FMSUB231)486 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());487 RegForm = true;488 [[fallthrough]];489 CASE_FMA_PACKED_MEM(FMSUB231)490 CASE_FMA_SCALAR_MEM(FMSUB231)491 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());492 AccName = getRegName(MI->getOperand(1).getReg());493 AccStr = "-";494 break;495 496 CASE_FMA_PACKED_REG(FNMADD132)497 CASE_FMA_SCALAR_REG(FNMADD132)498 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());499 RegForm = true;500 [[fallthrough]];501 CASE_FMA_PACKED_MEM(FNMADD132)502 CASE_FMA_SCALAR_MEM(FNMADD132)503 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());504 Mul1Name = getRegName(MI->getOperand(1).getReg());505 Negate = true;506 break;507 508 CASE_FMA_PACKED_REG(FNMADD213)509 CASE_FMA_SCALAR_REG(FNMADD213)510 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());511 RegForm = true;512 [[fallthrough]];513 CASE_FMA_PACKED_MEM(FNMADD213)514 CASE_FMA_SCALAR_MEM(FNMADD213)515 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());516 Mul2Name = getRegName(MI->getOperand(1).getReg());517 Negate = true;518 break;519 520 CASE_FMA_PACKED_REG(FNMADD231)521 CASE_FMA_SCALAR_REG(FNMADD231)522 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());523 RegForm = true;524 [[fallthrough]];525 CASE_FMA_PACKED_MEM(FNMADD231)526 CASE_FMA_SCALAR_MEM(FNMADD231)527 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());528 AccName = getRegName(MI->getOperand(1).getReg());529 Negate = true;530 break;531 532 CASE_FMA_PACKED_REG(FNMSUB132)533 CASE_FMA_SCALAR_REG(FNMSUB132)534 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());535 RegForm = true;536 [[fallthrough]];537 CASE_FMA_PACKED_MEM(FNMSUB132)538 CASE_FMA_SCALAR_MEM(FNMSUB132)539 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());540 Mul1Name = getRegName(MI->getOperand(1).getReg());541 AccStr = "-";542 Negate = true;543 break;544 545 CASE_FMA_PACKED_REG(FNMSUB213)546 CASE_FMA_SCALAR_REG(FNMSUB213)547 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());548 RegForm = true;549 [[fallthrough]];550 CASE_FMA_PACKED_MEM(FNMSUB213)551 CASE_FMA_SCALAR_MEM(FNMSUB213)552 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());553 Mul2Name = getRegName(MI->getOperand(1).getReg());554 AccStr = "-";555 Negate = true;556 break;557 558 CASE_FMA_PACKED_REG(FNMSUB231)559 CASE_FMA_SCALAR_REG(FNMSUB231)560 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());561 RegForm = true;562 [[fallthrough]];563 CASE_FMA_PACKED_MEM(FNMSUB231)564 CASE_FMA_SCALAR_MEM(FNMSUB231)565 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());566 AccName = getRegName(MI->getOperand(1).getReg());567 AccStr = "-";568 Negate = true;569 break;570 571 CASE_FMA_PACKED_REG(FMADDSUB132)572 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());573 RegForm = true;574 [[fallthrough]];575 CASE_FMA_PACKED_MEM(FMADDSUB132)576 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());577 Mul1Name = getRegName(MI->getOperand(1).getReg());578 AccStr = "+/-";579 break;580 581 CASE_FMA_PACKED_REG(FMADDSUB213)582 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());583 RegForm = true;584 [[fallthrough]];585 CASE_FMA_PACKED_MEM(FMADDSUB213)586 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());587 Mul2Name = getRegName(MI->getOperand(1).getReg());588 AccStr = "+/-";589 break;590 591 CASE_FMA_PACKED_REG(FMADDSUB231)592 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());593 RegForm = true;594 [[fallthrough]];595 CASE_FMA_PACKED_MEM(FMADDSUB231)596 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());597 AccName = getRegName(MI->getOperand(1).getReg());598 AccStr = "+/-";599 break;600 601 CASE_FMA_PACKED_REG(FMSUBADD132)602 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());603 RegForm = true;604 [[fallthrough]];605 CASE_FMA_PACKED_MEM(FMSUBADD132)606 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());607 Mul1Name = getRegName(MI->getOperand(1).getReg());608 AccStr = "-/+";609 break;610 611 CASE_FMA_PACKED_REG(FMSUBADD213)612 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());613 RegForm = true;614 [[fallthrough]];615 CASE_FMA_PACKED_MEM(FMSUBADD213)616 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());617 Mul2Name = getRegName(MI->getOperand(1).getReg());618 AccStr = "-/+";619 break;620 621 CASE_FMA_PACKED_REG(FMSUBADD231)622 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());623 RegForm = true;624 [[fallthrough]];625 CASE_FMA_PACKED_MEM(FMSUBADD231)626 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());627 AccName = getRegName(MI->getOperand(1).getReg());628 AccStr = "-/+";629 break;630 }631 632 const char *DestName = getRegName(MI->getOperand(0).getReg());633 634 if (!Mul1Name) Mul1Name = "mem";635 if (!Mul2Name) Mul2Name = "mem";636 if (!AccName) AccName = "mem";637 638 OS << DestName;639 printMasking(OS, MI, MCII);640 OS << " = ";641 642 if (Negate)643 OS << '-';644 645 OS << '(' << Mul1Name << " * " << Mul2Name << ") " << AccStr << ' '646 << AccName << '\n';647 648 return true;649}650 651// This table is indexed by the imm8 binary function specified in a652// vpternlog{d,q} instruction. The symbols {a,b,c} correspond to the three653// inputs to the binary function. This table was taken from654// https://gist.github.com/dougallj/81a80cd381988466c4e1c4889ecac95b#file-2-x86-base-txt655// with slight massaging.656constexpr StringLiteral TernlogFunctions[] = {657 "0",658 "~(a | b | c)",659 "c & ~(a | b)",660 "~(a | b)",661 "b & ~(a | c)",662 "~(a | c)",663 "~a & (b ^ c)",664 "~(a | (b & c))",665 "b & c & ~a",666 "~(a | (b ^ c))",667 "c & ~a",668 "~a & (c | ~b)",669 "b & ~a",670 "~a & (b | ~c)",671 "~a & (b | c)",672 "~a",673 "a & ~(b | c)",674 "~(b | c)",675 "~b & (a ^ c)",676 "~((a & c) | b)",677 "~c & (a ^ b)",678 "~((a & b) | c)",679 "a ^ ((a & b) | (b ^ c))",680 "(a & (b ^ c)) ^ ~(b & c)",681 "(a ^ b) & (a ^ c)",682 "~((a & b) | (b ^ c))",683 "a ^ ((a & b) | c)",684 "(a & c) ^ (c | ~b)",685 "a ^ ((a & c) | b)",686 "(a & b) ^ (b | ~c)",687 "a ^ (b | c)",688 "~(a & (b | c))",689 "a & c & ~b",690 "~(b | (a ^ c))",691 "c & ~b",692 "~b & (c | ~a)",693 "(a ^ b) & (b ^ c)",694 "~((a & b) | (a ^ c))",695 "b ^ ((a & b) | c)",696 "(b & c) ^ (c | ~a)",697 "c & (a ^ b)",698 "(a | b) ^ ((a & b) | ~c)",699 "c & ~(a & b)",700 "(c & (a ^ b)) | ~(a | b)",701 "(b | c) & (a ^ b)",702 "a ^ (b | ~c)",703 "(a & b) ^ (b | c)",704 "(c & ~b) | ~a",705 "a & ~b",706 "~b & (a | ~c)",707 "~b & (a | c)",708 "~b",709 "b ^ (a | (b & c))",710 "(a & b) ^ (a | ~c)",711 "b ^ (a | c)",712 "~(b & (a | c))",713 "(a | c) & (a ^ b)",714 "b ^ (a | ~c)",715 "(a & b) ^ (a | c)",716 "(c & ~a) | ~b",717 "a ^ b",718 "~(a | c) | (a ^ b)",719 "(c & ~a) | (a ^ b)",720 "~(a & b)",721 "a & b & ~c",722 "~(c | (a ^ b))",723 "(a ^ c) & (b ^ c)",724 "~((a & c) | (a ^ b))",725 "b & ~c",726 "~c & (b | ~a)",727 "c ^ ((a & c) | b)",728 "(b & c) ^ (b | ~a)",729 "b & (a ^ c)",730 "(a | c) ^ ((a & c) | ~b)",731 "(b | c) & (a ^ c)",732 "a ^ (c | ~b)",733 "b & ~(a & c)",734 "(b & (a ^ c)) | ~(a | c)",735 "(a & c) ^ (b | c)",736 "(b & ~c) | ~a",737 "a & ~c",738 "~c & (a | ~b)",739 "c ^ (a | (b & c))",740 "(a & c) ^ (a | ~b)",741 "~c & (a | b)",742 "~c",743 "c ^ (a | b)",744 "~(c & (a | b))",745 "(a | b) & (a ^ c)",746 "c ^ (a | ~b)",747 "a ^ c",748 "~(a | b) | (a ^ c)",749 "(a & c) ^ (a | b)",750 "(b & ~a) | ~c",751 "(b & ~a) | (a ^ c)",752 "~(a & c)",753 "a & (b ^ c)",754 "~(b ^ c) ^ (a | (b & c))",755 "(a | c) & (b ^ c)",756 "b ^ (c | ~a)",757 "(a | b) & (b ^ c)",758 "c ^ (b | ~a)",759 "b ^ c",760 "~(a | b) | (b ^ c)",761 "(a | b) & (c ^ (a & b))",762 "b ^ c ^ ~a",763 "c ^ (a & b)",764 "~(a | b) | (c ^ (a & b))",765 "b ^ (a & c)",766 "~(a | c) | (b ^ (a & c))",767 "(b & ~a) | (b ^ c)",768 "~a | (b ^ c)",769 "a & ~(b & c)",770 "(a & (b ^ c)) | ~(b | c)",771 "(b & c) ^ (a | c)",772 "(a & ~c) | ~b",773 "(b & c) ^ (a | b)",774 "(a & ~b) | ~c",775 "(a & ~b) | (b ^ c)",776 "~(b & c)",777 "a ^ (b & c)",778 "~(b | c) | (a ^ (b & c))",779 "(a & ~b) | (a ^ c)",780 "~b | (a ^ c)",781 "(a & ~c) | (a ^ b)",782 "~c | (a ^ b)",783 "(a ^ b) | (a ^ c)",784 "~(a & b & c)",785 "a & b & c",786 "~((a ^ b) | (a ^ c))",787 "c & ~(a ^ b)",788 "~(a ^ b) & (c | ~a)",789 "b & ~(a ^ c)",790 "~(a ^ c) & (b | ~a)",791 "(b | c) & (a ^ b ^ c)",792 "(b & c) ^ ~a",793 "b & c",794 "~(b ^ c) & (b | ~a)",795 "c & (b | ~a)",796 "~((b & c) ^ (a | b))",797 "b & (c | ~a)",798 "~((b & c) ^ (a | c))",799 "a ^ ((a ^ b) | (a ^ c))",800 "(b & c) | ~a",801 "a & ~(b ^ c)",802 "~(b ^ c) & (a | ~b)",803 "(a | c) & (a ^ b ^ c)",804 "(a & c) ^ ~b",805 "(a | b) & (a ^ b ^ c)",806 "(a & b) ^ ~c",807 "a ^ b ^ c",808 "~(a | b) | (a ^ b ^ c)",809 "~(b ^ c) & (a | b)",810 "~(b ^ c)",811 "c ^ (a & ~b)",812 "~((a | b) & (b ^ c))",813 "b ^ (a & ~c)",814 "~((a | c) & (b ^ c))",815 "(b & c) | (a ^ (b | c))",816 "~(a & (b ^ c))",817 "a & c",818 "~(a ^ c) & (a | ~b)",819 "c & (a | ~b)",820 "~((a & c) ^ (a | b))",821 "~(a ^ c) & (a | b)",822 "~(a ^ c)",823 "c ^ (b & ~a)",824 "~((a | b) & (a ^ c))",825 "c & (a | b)",826 "~c ^ (a | b)",827 "c",828 "c | ~(a | b)",829 "b ^ (a & (b ^ c))",830 "(b & c) | ~(a ^ c)",831 "(b & ~a) | c",832 "c | ~a",833 "a & (c | ~b)",834 "~((a & c) ^ (b | c))",835 "a ^ ((a ^ c) & (b ^ c))",836 "(a & c) | ~b",837 "a ^ (b & ~c)",838 "~((b | c) & (a ^ c))",839 "(a & c) | (a ^ b ^ c)",840 "~(b & (a ^ c))",841 "a ^ (b & (a ^ c))",842 "(a & c) | ~(b ^ c)",843 "(a & ~b) | c",844 "c | ~b",845 "(a & c) | (a ^ b)",846 "~((a ^ c) & (b ^ c))",847 "c | (a ^ b)",848 "c | ~(a & b)",849 "a & b",850 "~(a ^ b) & (a | ~c)",851 "~(a ^ b) & (a | c)",852 "~(a ^ b)",853 "b & (a | ~c)",854 "~((a & b) ^ (a | c))",855 "b ^ (c & ~a)",856 "~((a | c) & (a ^ b))",857 "b & (a | c)",858 "~b ^ (a | c)",859 "c ^ (a & (b ^ c))",860 "(b & c) | ~(a ^ b)",861 "b",862 "b | ~(a | c)",863 "(c & ~a) | b",864 "b | ~a",865 "a & (b | ~c)",866 "~((a & b) ^ (b | c))",867 "a ^ (c & ~b)",868 "~((b | c) & (a ^ b))",869 "a ^ ((a ^ b) & (b ^ c))",870 "(a & b) | ~c",871 "(a & b) | (a ^ b ^ c)",872 "~(c & (a ^ b))",873 "a ^ (c & (a ^ b))",874 "(a & b) | ~(b ^ c)",875 "(a & b) | (a ^ c)",876 "~((a ^ b) & (b ^ c))",877 "(a & ~c) | b",878 "b | ~c",879 "b | (a ^ c)",880 "b | ~(a & c)",881 "a & (b | c)",882 "~a ^ (b | c)",883 "c ^ (b & (a ^ c))",884 "(a & c) | ~(a ^ b)",885 "b ^ (c & (a ^ b))",886 "(a & b) | ~(a ^ c)",887 "(a & b) | (b ^ c)",888 "~((a ^ b) & (a ^ c))",889 "(a | b) & ((a & b) | c)",890 "(a & b) | (b ^ c ^ ~a)",891 "(a & b) | c",892 "c | ~(a ^ b)",893 "(a & c) | b",894 "b | ~(a ^ c)",895 "b | c",896 "~a | b | c",897 "a",898 "a | ~(b | c)",899 "a | (c & ~b)",900 "a | ~b",901 "a | (b & ~c)",902 "a | ~c",903 "a | (b ^ c)",904 "a | ~(b & c)",905 "a | (b & c)",906 "a | ~(b ^ c)",907 "a | c",908 "~b | a | c",909 "a | b",910 "~c | a | b",911 "a | b | c",912 "-1",913};914 915static bool printPTERNLOGComments(const MCInst *MI, raw_ostream &OS,916 const MCInstrInfo &MCII) {917 unsigned NumOperands = MI->getNumOperands();918 919 int Src2Idx;920 int Src3Idx;921 switch (MI->getOpcode()) {922 // dest, src1, src2, src3, tbl923 // dest, src1, mask, src2, src3, tbl924 CASE_PTERNLOG(PTERNLOGD, r)925 CASE_PTERNLOG(PTERNLOGQ, r)926 Src2Idx = NumOperands - 3;927 Src3Idx = NumOperands - 2;928 break;929 930 // dest, src1, src2, memory, tbl931 // dest, src1, mask, src2, memory, tbl932 CASE_PTERNLOG(PTERNLOGD, m)933 CASE_PTERNLOG(PTERNLOGQ, m)934 Src2Idx = NumOperands - 7;935 Src3Idx = -1;936 break;937 938 CASE_PTERNLOG(PTERNLOGD, mb)939 Src2Idx = NumOperands - 7;940 Src3Idx = -2;941 break;942 943 CASE_PTERNLOG(PTERNLOGQ, mb)944 Src2Idx = NumOperands - 7;945 Src3Idx = -3;946 break;947 948 default:949 return false;950 }951 StringRef DestName = getRegName(MI->getOperand(0).getReg());952 StringRef Src1Name = getRegName(MI->getOperand(1).getReg());953 StringRef Src2Name = getRegName(MI->getOperand(Src2Idx).getReg());954 StringRef Src3Name;955 switch (Src3Idx) {956 case -1:957 Src3Name = "mem";958 break;959 case -2:960 Src3Name = "m32bcst";961 break;962 case -3:963 Src3Name = "m64bcst";964 break;965 default:966 Src3Name = getRegName(MI->getOperand(Src3Idx).getReg());967 break;968 }969 uint8_t TruthTable = MI->getOperand(NumOperands - 1).getImm();970 971 StringRef SrcNames[] = {Src1Name, Src2Name, Src3Name};972 973 OS << DestName;974 printMasking(OS, MI, MCII);975 OS << " = ";976 977 static_assert(std::size(TernlogFunctions) == 256);978 std::string_view BooleanFunction = TernlogFunctions[TruthTable];979 980 while (!BooleanFunction.empty()) {981 // Print the expression up to the next symbol.982 size_t SymbolOffset = BooleanFunction.find_first_of("abc");983 OS << BooleanFunction.substr(0, SymbolOffset);984 if (SymbolOffset == std::string_view::npos) {985 // No more symbols, that means we just printed everything.986 break;987 }988 // Let's replace {a,b,c} with Src{1,2,3}Name.989 char Symbol = BooleanFunction[SymbolOffset];990 OS << SrcNames[Symbol - 'a'];991 // Consume the part of the expression we handled.992 BooleanFunction.remove_prefix(SymbolOffset + 1);993 }994 OS << '\n';995 return true;996}997 998static bool printFPCLASSComments(const MCInst *MI, raw_ostream &OS,999 const MCInstrInfo &MCII) {1000 unsigned NumOperands = MI->getNumOperands();1001 int SrcIdx;1002 switch (MI->getOpcode()) {1003 CASE_FPCLASS_PACKED(FPCLASSBF16, r)1004 CASE_FPCLASS_PACKED(FPCLASSPH, r)1005 CASE_FPCLASS_PACKED(FPCLASSPS, r)1006 CASE_FPCLASS_PACKED(FPCLASSPD, r)1007 CASE_FPCLASS_SCALAR(FPCLASSSH, r)1008 CASE_FPCLASS_SCALAR(FPCLASSSS, r)1009 CASE_FPCLASS_SCALAR(FPCLASSSD, r) {1010 SrcIdx = NumOperands - 2;1011 break;1012 }1013 CASE_FPCLASS_PACKED_MEM(FPCLASSBF16)1014 CASE_FPCLASS_PACKED_MEM(FPCLASSPH)1015 CASE_FPCLASS_PACKED_MEM(FPCLASSPS)1016 CASE_FPCLASS_PACKED_MEM(FPCLASSPD)1017 CASE_FPCLASS_SCALAR(FPCLASSSH, m)1018 CASE_FPCLASS_SCALAR(FPCLASSSS, m)1019 CASE_FPCLASS_SCALAR(FPCLASSSD, m) {1020 SrcIdx = -1;1021 break;1022 }1023 default:1024 return false;1025 }1026 StringRef DestName = getRegName(MI->getOperand(0).getReg());1027 StringRef SrcName =1028 SrcIdx != -1 ? getRegName(MI->getOperand(SrcIdx).getReg()) : "mem";1029 1030 OS << DestName;1031 printMasking(OS, MI, MCII);1032 OS << " = ";1033 1034 uint8_t Categories = MI->getOperand(NumOperands - 1).getImm();1035 if (Categories == 0) {1036 OS << "false";1037 } else {1038 static constexpr StringLiteral CategoryNames[] = {1039 "QuietNaN",1040 "PositiveZero",1041 "NegativeZero",1042 "PositiveInfinity",1043 "NegativeInfinity",1044 "Subnormal",1045 "Negative",1046 "SignalingNaN",1047 };1048 bool Conjoin = false;1049 for (size_t I = 0, E = std::size(CategoryNames); I != E; ++I) {1050 if (Categories & (1 << I)) {1051 if (Conjoin)1052 OS << " | ";1053 Conjoin = true;1054 OS << "is" << CategoryNames[I] << '(' << SrcName << ')';1055 }1056 }1057 }1058 OS << '\n';1059 return true;1060}1061 1062//===----------------------------------------------------------------------===//1063// Top Level Entrypoint1064//===----------------------------------------------------------------------===//1065 1066/// EmitAnyX86InstComments - This function decodes x86 instructions and prints1067/// newline terminated strings to the specified string if desired. This1068/// information is shown in disassembly dumps when verbose assembly is enabled.1069bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,1070 const MCInstrInfo &MCII) {1071 // If this is a shuffle operation, the switch should fill in this state.1072 SmallVector<int, 8> ShuffleMask;1073 const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;1074 unsigned NumOperands = MI->getNumOperands();1075 bool RegForm = false;1076 1077 if (printFMAComments(MI, OS, MCII))1078 return true;1079 1080 if (printPTERNLOGComments(MI, OS, MCII))1081 return true;1082 1083 if (printFPCLASSComments(MI, OS, MCII))1084 return true;1085 1086 switch (MI->getOpcode()) {1087 default:1088 // Not an instruction for which we can decode comments.1089 return false;1090 1091 case X86::BLENDPDrri:1092 case X86::VBLENDPDrri:1093 case X86::VBLENDPDYrri:1094 Src2Name = getRegName(MI->getOperand(2).getReg());1095 [[fallthrough]];1096 case X86::BLENDPDrmi:1097 case X86::VBLENDPDrmi:1098 case X86::VBLENDPDYrmi:1099 if (MI->getOperand(NumOperands - 1).isImm())1100 DecodeBLENDMask(getRegOperandNumElts(MI, 64, 0),1101 MI->getOperand(NumOperands - 1).getImm(),1102 ShuffleMask);1103 Src1Name = getRegName(MI->getOperand(1).getReg());1104 DestName = getRegName(MI->getOperand(0).getReg());1105 break;1106 1107 case X86::BLENDPSrri:1108 case X86::VBLENDPSrri:1109 case X86::VBLENDPSYrri:1110 Src2Name = getRegName(MI->getOperand(2).getReg());1111 [[fallthrough]];1112 case X86::BLENDPSrmi:1113 case X86::VBLENDPSrmi:1114 case X86::VBLENDPSYrmi:1115 if (MI->getOperand(NumOperands - 1).isImm())1116 DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0),1117 MI->getOperand(NumOperands - 1).getImm(),1118 ShuffleMask);1119 Src1Name = getRegName(MI->getOperand(1).getReg());1120 DestName = getRegName(MI->getOperand(0).getReg());1121 break;1122 1123 case X86::PBLENDWrri:1124 case X86::VPBLENDWrri:1125 case X86::VPBLENDWYrri:1126 Src2Name = getRegName(MI->getOperand(2).getReg());1127 [[fallthrough]];1128 case X86::PBLENDWrmi:1129 case X86::VPBLENDWrmi:1130 case X86::VPBLENDWYrmi:1131 if (MI->getOperand(NumOperands - 1).isImm())1132 DecodeBLENDMask(getRegOperandNumElts(MI, 16, 0),1133 MI->getOperand(NumOperands - 1).getImm(),1134 ShuffleMask);1135 Src1Name = getRegName(MI->getOperand(1).getReg());1136 DestName = getRegName(MI->getOperand(0).getReg());1137 break;1138 1139 case X86::VPBLENDDrri:1140 case X86::VPBLENDDYrri:1141 Src2Name = getRegName(MI->getOperand(2).getReg());1142 [[fallthrough]];1143 case X86::VPBLENDDrmi:1144 case X86::VPBLENDDYrmi:1145 if (MI->getOperand(NumOperands - 1).isImm())1146 DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0),1147 MI->getOperand(NumOperands - 1).getImm(),1148 ShuffleMask);1149 Src1Name = getRegName(MI->getOperand(1).getReg());1150 DestName = getRegName(MI->getOperand(0).getReg());1151 break;1152 1153 case X86::INSERTPSrri:1154 case X86::VINSERTPSrri:1155 case X86::VINSERTPSZrri:1156 Src2Name = getRegName(MI->getOperand(2).getReg());1157 DestName = getRegName(MI->getOperand(0).getReg());1158 Src1Name = getRegName(MI->getOperand(1).getReg());1159 if (MI->getOperand(NumOperands - 1).isImm())1160 DecodeINSERTPSMask(MI->getOperand(NumOperands - 1).getImm(), ShuffleMask,1161 /*SrcIsMem=*/false);1162 break;1163 1164 case X86::INSERTPSrmi:1165 case X86::VINSERTPSrmi:1166 case X86::VINSERTPSZrmi:1167 DestName = getRegName(MI->getOperand(0).getReg());1168 Src1Name = getRegName(MI->getOperand(1).getReg());1169 if (MI->getOperand(NumOperands - 1).isImm())1170 DecodeINSERTPSMask(MI->getOperand(NumOperands - 1).getImm(), ShuffleMask,1171 /*SrcIsMem=*/true);1172 break;1173 1174 case X86::MOVLHPSrr:1175 case X86::VMOVLHPSrr:1176 case X86::VMOVLHPSZrr:1177 Src2Name = getRegName(MI->getOperand(2).getReg());1178 Src1Name = getRegName(MI->getOperand(1).getReg());1179 DestName = getRegName(MI->getOperand(0).getReg());1180 DecodeMOVLHPSMask(2, ShuffleMask);1181 break;1182 1183 case X86::MOVHLPSrr:1184 case X86::VMOVHLPSrr:1185 case X86::VMOVHLPSZrr:1186 Src2Name = getRegName(MI->getOperand(2).getReg());1187 Src1Name = getRegName(MI->getOperand(1).getReg());1188 DestName = getRegName(MI->getOperand(0).getReg());1189 DecodeMOVHLPSMask(2, ShuffleMask);1190 break;1191 1192 case X86::MOVHPDrm:1193 case X86::VMOVHPDrm:1194 case X86::VMOVHPDZ128rm:1195 Src1Name = getRegName(MI->getOperand(1).getReg());1196 DestName = getRegName(MI->getOperand(0).getReg());1197 DecodeInsertElementMask(2, 1, 1, ShuffleMask);1198 break;1199 1200 case X86::MOVHPSrm:1201 case X86::VMOVHPSrm:1202 case X86::VMOVHPSZ128rm:1203 Src1Name = getRegName(MI->getOperand(1).getReg());1204 DestName = getRegName(MI->getOperand(0).getReg());1205 DecodeInsertElementMask(4, 2, 2, ShuffleMask);1206 break;1207 1208 case X86::MOVLPDrm:1209 case X86::VMOVLPDrm:1210 case X86::VMOVLPDZ128rm:1211 Src1Name = getRegName(MI->getOperand(1).getReg());1212 DestName = getRegName(MI->getOperand(0).getReg());1213 DecodeInsertElementMask(2, 0, 1, ShuffleMask);1214 break;1215 1216 case X86::MOVLPSrm:1217 case X86::VMOVLPSrm:1218 case X86::VMOVLPSZ128rm:1219 Src1Name = getRegName(MI->getOperand(1).getReg());1220 DestName = getRegName(MI->getOperand(0).getReg());1221 DecodeInsertElementMask(4, 0, 2, ShuffleMask);1222 break;1223 1224 CASE_MOVDUP(MOVSLDUP, r)1225 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1226 [[fallthrough]];1227 1228 CASE_MOVDUP(MOVSLDUP, m)1229 DestName = getRegName(MI->getOperand(0).getReg());1230 DecodeMOVSLDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask);1231 break;1232 1233 CASE_MOVDUP(MOVSHDUP, r)1234 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1235 [[fallthrough]];1236 1237 CASE_MOVDUP(MOVSHDUP, m)1238 DestName = getRegName(MI->getOperand(0).getReg());1239 DecodeMOVSHDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask);1240 break;1241 1242 CASE_MOVDUP(MOVDDUP, r)1243 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1244 [[fallthrough]];1245 1246 CASE_MOVDUP(MOVDDUP, m)1247 DestName = getRegName(MI->getOperand(0).getReg());1248 DecodeMOVDDUPMask(getRegOperandNumElts(MI, 64, 0), ShuffleMask);1249 break;1250 1251 case X86::PSLLDQri:1252 case X86::VPSLLDQri:1253 case X86::VPSLLDQYri:1254 case X86::VPSLLDQZ128ri:1255 case X86::VPSLLDQZ256ri:1256 case X86::VPSLLDQZri:1257 Src1Name = getRegName(MI->getOperand(1).getReg());1258 [[fallthrough]];1259 case X86::VPSLLDQZ128mi:1260 case X86::VPSLLDQZ256mi:1261 case X86::VPSLLDQZmi:1262 DestName = getRegName(MI->getOperand(0).getReg());1263 if (MI->getOperand(NumOperands - 1).isImm())1264 DecodePSLLDQMask(getRegOperandNumElts(MI, 8, 0),1265 MI->getOperand(NumOperands - 1).getImm(),1266 ShuffleMask);1267 break;1268 1269 case X86::PSRLDQri:1270 case X86::VPSRLDQri:1271 case X86::VPSRLDQYri:1272 case X86::VPSRLDQZ128ri:1273 case X86::VPSRLDQZ256ri:1274 case X86::VPSRLDQZri:1275 Src1Name = getRegName(MI->getOperand(1).getReg());1276 [[fallthrough]];1277 case X86::VPSRLDQZ128mi:1278 case X86::VPSRLDQZ256mi:1279 case X86::VPSRLDQZmi:1280 DestName = getRegName(MI->getOperand(0).getReg());1281 if (MI->getOperand(NumOperands - 1).isImm())1282 DecodePSRLDQMask(getRegOperandNumElts(MI, 8, 0),1283 MI->getOperand(NumOperands - 1).getImm(),1284 ShuffleMask);1285 break;1286 1287 CASE_SHUF(PALIGNR, rri)1288 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1289 RegForm = true;1290 [[fallthrough]];1291 1292 CASE_SHUF(PALIGNR, rmi)1293 Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());1294 DestName = getRegName(MI->getOperand(0).getReg());1295 if (MI->getOperand(NumOperands - 1).isImm())1296 DecodePALIGNRMask(getRegOperandNumElts(MI, 8, 0),1297 MI->getOperand(NumOperands - 1).getImm(),1298 ShuffleMask);1299 break;1300 1301 CASE_AVX512_INS_COMMON(ALIGNQ, Z, rri)1302 CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rri)1303 CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rri)1304 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1305 RegForm = true;1306 [[fallthrough]];1307 1308 CASE_AVX512_INS_COMMON(ALIGNQ, Z, rmi)1309 CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rmi)1310 CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rmi)1311 Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());1312 DestName = getRegName(MI->getOperand(0).getReg());1313 if (MI->getOperand(NumOperands - 1).isImm())1314 DecodeVALIGNMask(getRegOperandNumElts(MI, 64, 0),1315 MI->getOperand(NumOperands - 1).getImm(),1316 ShuffleMask);1317 break;1318 1319 CASE_AVX512_INS_COMMON(ALIGND, Z, rri)1320 CASE_AVX512_INS_COMMON(ALIGND, Z256, rri)1321 CASE_AVX512_INS_COMMON(ALIGND, Z128, rri)1322 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1323 RegForm = true;1324 [[fallthrough]];1325 1326 CASE_AVX512_INS_COMMON(ALIGND, Z, rmi)1327 CASE_AVX512_INS_COMMON(ALIGND, Z256, rmi)1328 CASE_AVX512_INS_COMMON(ALIGND, Z128, rmi)1329 Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());1330 DestName = getRegName(MI->getOperand(0).getReg());1331 if (MI->getOperand(NumOperands - 1).isImm())1332 DecodeVALIGNMask(getRegOperandNumElts(MI, 32, 0),1333 MI->getOperand(NumOperands - 1).getImm(),1334 ShuffleMask);1335 break;1336 1337 CASE_SHUF(PSHUFD, ri)1338 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1339 [[fallthrough]];1340 1341 CASE_SHUF(PSHUFD, mi)1342 DestName = getRegName(MI->getOperand(0).getReg());1343 if (MI->getOperand(NumOperands - 1).isImm())1344 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32,1345 MI->getOperand(NumOperands - 1).getImm(),1346 ShuffleMask);1347 break;1348 1349 CASE_SHUF(PSHUFHW, ri)1350 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1351 [[fallthrough]];1352 1353 CASE_SHUF(PSHUFHW, mi)1354 DestName = getRegName(MI->getOperand(0).getReg());1355 if (MI->getOperand(NumOperands - 1).isImm())1356 DecodePSHUFHWMask(getRegOperandNumElts(MI, 16, 0),1357 MI->getOperand(NumOperands - 1).getImm(),1358 ShuffleMask);1359 break;1360 1361 CASE_SHUF(PSHUFLW, ri)1362 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1363 [[fallthrough]];1364 1365 CASE_SHUF(PSHUFLW, mi)1366 DestName = getRegName(MI->getOperand(0).getReg());1367 if (MI->getOperand(NumOperands - 1).isImm())1368 DecodePSHUFLWMask(getRegOperandNumElts(MI, 16, 0),1369 MI->getOperand(NumOperands - 1).getImm(),1370 ShuffleMask);1371 break;1372 1373 case X86::MMX_PSHUFWri:1374 Src1Name = getRegName(MI->getOperand(1).getReg());1375 [[fallthrough]];1376 1377 case X86::MMX_PSHUFWmi:1378 DestName = getRegName(MI->getOperand(0).getReg());1379 if (MI->getOperand(NumOperands - 1).isImm())1380 DecodePSHUFMask(4, 16, MI->getOperand(NumOperands - 1).getImm(),1381 ShuffleMask);1382 break;1383 1384 case X86::PSWAPDrr:1385 Src1Name = getRegName(MI->getOperand(1).getReg());1386 [[fallthrough]];1387 1388 case X86::PSWAPDrm:1389 DestName = getRegName(MI->getOperand(0).getReg());1390 DecodePSWAPMask(2, ShuffleMask);1391 break;1392 1393 CASE_UNPCK(PUNPCKHBW, r)1394 case X86::MMX_PUNPCKHBWrr:1395 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1396 RegForm = true;1397 [[fallthrough]];1398 1399 CASE_UNPCK(PUNPCKHBW, m)1400 case X86::MMX_PUNPCKHBWrm:1401 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1402 DestName = getRegName(MI->getOperand(0).getReg());1403 DecodeUNPCKHMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask);1404 break;1405 1406 CASE_UNPCK(PUNPCKHWD, r)1407 case X86::MMX_PUNPCKHWDrr:1408 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1409 RegForm = true;1410 [[fallthrough]];1411 1412 CASE_UNPCK(PUNPCKHWD, m)1413 case X86::MMX_PUNPCKHWDrm:1414 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1415 DestName = getRegName(MI->getOperand(0).getReg());1416 DecodeUNPCKHMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask);1417 break;1418 1419 CASE_UNPCK(PUNPCKHDQ, r)1420 case X86::MMX_PUNPCKHDQrr:1421 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1422 RegForm = true;1423 [[fallthrough]];1424 1425 CASE_UNPCK(PUNPCKHDQ, m)1426 case X86::MMX_PUNPCKHDQrm:1427 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1428 DestName = getRegName(MI->getOperand(0).getReg());1429 DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);1430 break;1431 1432 CASE_UNPCK(PUNPCKHQDQ, r)1433 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1434 RegForm = true;1435 [[fallthrough]];1436 1437 CASE_UNPCK(PUNPCKHQDQ, m)1438 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1439 DestName = getRegName(MI->getOperand(0).getReg());1440 DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);1441 break;1442 1443 CASE_UNPCK(PUNPCKLBW, r)1444 case X86::MMX_PUNPCKLBWrr:1445 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1446 RegForm = true;1447 [[fallthrough]];1448 1449 CASE_UNPCK(PUNPCKLBW, m)1450 case X86::MMX_PUNPCKLBWrm:1451 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1452 DestName = getRegName(MI->getOperand(0).getReg());1453 DecodeUNPCKLMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask);1454 break;1455 1456 CASE_UNPCK(PUNPCKLWD, r)1457 case X86::MMX_PUNPCKLWDrr:1458 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1459 RegForm = true;1460 [[fallthrough]];1461 1462 CASE_UNPCK(PUNPCKLWD, m)1463 case X86::MMX_PUNPCKLWDrm:1464 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1465 DestName = getRegName(MI->getOperand(0).getReg());1466 DecodeUNPCKLMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask);1467 break;1468 1469 CASE_UNPCK(PUNPCKLDQ, r)1470 case X86::MMX_PUNPCKLDQrr:1471 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1472 RegForm = true;1473 [[fallthrough]];1474 1475 CASE_UNPCK(PUNPCKLDQ, m)1476 case X86::MMX_PUNPCKLDQrm:1477 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1478 DestName = getRegName(MI->getOperand(0).getReg());1479 DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);1480 break;1481 1482 CASE_UNPCK(PUNPCKLQDQ, r)1483 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1484 RegForm = true;1485 [[fallthrough]];1486 1487 CASE_UNPCK(PUNPCKLQDQ, m)1488 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1489 DestName = getRegName(MI->getOperand(0).getReg());1490 DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);1491 break;1492 1493 CASE_SHUF(SHUFPD, rri)1494 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1495 RegForm = true;1496 [[fallthrough]];1497 1498 CASE_SHUF(SHUFPD, rmi)1499 if (MI->getOperand(NumOperands - 1).isImm())1500 DecodeSHUFPMask(getRegOperandNumElts(MI, 64, 0), 64,1501 MI->getOperand(NumOperands - 1).getImm(), ShuffleMask);1502 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());1503 DestName = getRegName(MI->getOperand(0).getReg());1504 break;1505 1506 CASE_SHUF(SHUFPS, rri)1507 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1508 RegForm = true;1509 [[fallthrough]];1510 1511 CASE_SHUF(SHUFPS, rmi)1512 if (MI->getOperand(NumOperands - 1).isImm())1513 DecodeSHUFPMask(getRegOperandNumElts(MI, 32, 0), 32,1514 MI->getOperand(NumOperands - 1).getImm(),1515 ShuffleMask);1516 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());1517 DestName = getRegName(MI->getOperand(0).getReg());1518 break;1519 1520 CASE_VSHUF(64X2, r)1521 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1522 RegForm = true;1523 [[fallthrough]];1524 1525 CASE_VSHUF(64X2, m)1526 decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 64, 0), 64,1527 MI->getOperand(NumOperands - 1).getImm(),1528 ShuffleMask);1529 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());1530 DestName = getRegName(MI->getOperand(0).getReg());1531 break;1532 1533 CASE_VSHUF(32X4, r)1534 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1535 RegForm = true;1536 [[fallthrough]];1537 1538 CASE_VSHUF(32X4, m)1539 decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 32, 0), 32,1540 MI->getOperand(NumOperands - 1).getImm(),1541 ShuffleMask);1542 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());1543 DestName = getRegName(MI->getOperand(0).getReg());1544 break;1545 1546 CASE_UNPCK(UNPCKLPD, r)1547 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1548 RegForm = true;1549 [[fallthrough]];1550 1551 CASE_UNPCK(UNPCKLPD, m)1552 DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);1553 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1554 DestName = getRegName(MI->getOperand(0).getReg());1555 break;1556 1557 CASE_UNPCK(UNPCKLPS, r)1558 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1559 RegForm = true;1560 [[fallthrough]];1561 1562 CASE_UNPCK(UNPCKLPS, m)1563 DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);1564 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1565 DestName = getRegName(MI->getOperand(0).getReg());1566 break;1567 1568 CASE_UNPCK(UNPCKHPD, r)1569 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1570 RegForm = true;1571 [[fallthrough]];1572 1573 CASE_UNPCK(UNPCKHPD, m)1574 DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);1575 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1576 DestName = getRegName(MI->getOperand(0).getReg());1577 break;1578 1579 CASE_UNPCK(UNPCKHPS, r)1580 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1581 RegForm = true;1582 [[fallthrough]];1583 1584 CASE_UNPCK(UNPCKHPS, m)1585 DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);1586 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());1587 DestName = getRegName(MI->getOperand(0).getReg());1588 break;1589 1590 CASE_VPERMILPI(PERMILPS, r)1591 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1592 [[fallthrough]];1593 1594 CASE_VPERMILPI(PERMILPS, m)1595 if (MI->getOperand(NumOperands - 1).isImm())1596 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32,1597 MI->getOperand(NumOperands - 1).getImm(),1598 ShuffleMask);1599 DestName = getRegName(MI->getOperand(0).getReg());1600 break;1601 1602 CASE_VPERMILPI(PERMILPD, r)1603 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1604 [[fallthrough]];1605 1606 CASE_VPERMILPI(PERMILPD, m)1607 if (MI->getOperand(NumOperands - 1).isImm())1608 DecodePSHUFMask(getRegOperandNumElts(MI, 64, 0), 64,1609 MI->getOperand(NumOperands - 1).getImm(),1610 ShuffleMask);1611 DestName = getRegName(MI->getOperand(0).getReg());1612 break;1613 1614 case X86::VPERM2F128rri:1615 case X86::VPERM2I128rri:1616 Src2Name = getRegName(MI->getOperand(2).getReg());1617 [[fallthrough]];1618 1619 case X86::VPERM2F128rmi:1620 case X86::VPERM2I128rmi:1621 // For instruction comments purpose, assume the 256-bit vector is v4i64.1622 if (MI->getOperand(NumOperands - 1).isImm())1623 DecodeVPERM2X128Mask(4, MI->getOperand(NumOperands - 1).getImm(),1624 ShuffleMask);1625 Src1Name = getRegName(MI->getOperand(1).getReg());1626 DestName = getRegName(MI->getOperand(0).getReg());1627 break;1628 1629 CASE_VPERM(PERMPD, r)1630 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1631 [[fallthrough]];1632 1633 CASE_VPERM(PERMPD, m)1634 if (MI->getOperand(NumOperands - 1).isImm())1635 DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0),1636 MI->getOperand(NumOperands - 1).getImm(),1637 ShuffleMask);1638 DestName = getRegName(MI->getOperand(0).getReg());1639 break;1640 1641 CASE_VPERM(PERMQ, r)1642 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());1643 [[fallthrough]];1644 1645 CASE_VPERM(PERMQ, m)1646 if (MI->getOperand(NumOperands - 1).isImm())1647 DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0),1648 MI->getOperand(NumOperands - 1).getImm(),1649 ShuffleMask);1650 DestName = getRegName(MI->getOperand(0).getReg());1651 break;1652 1653 case X86::MOVSDrr:1654 case X86::VMOVSDrr:1655 case X86::VMOVSDZrr:1656 Src2Name = getRegName(MI->getOperand(2).getReg());1657 Src1Name = getRegName(MI->getOperand(1).getReg());1658 DecodeScalarMoveMask(2, false, ShuffleMask);1659 DestName = getRegName(MI->getOperand(0).getReg());1660 break;1661 1662 case X86::MOVSSrr:1663 case X86::VMOVSSrr:1664 case X86::VMOVSSZrr:1665 Src2Name = getRegName(MI->getOperand(2).getReg());1666 Src1Name = getRegName(MI->getOperand(1).getReg());1667 DecodeScalarMoveMask(4, false, ShuffleMask);1668 DestName = getRegName(MI->getOperand(0).getReg());1669 break;1670 1671 case X86::VMOVSHZrr:1672 Src2Name = getRegName(MI->getOperand(2).getReg());1673 Src1Name = getRegName(MI->getOperand(1).getReg());1674 DecodeScalarMoveMask(8, false, ShuffleMask);1675 DestName = getRegName(MI->getOperand(0).getReg());1676 break;1677 1678 case X86::MOVPQI2QIrr:1679 case X86::MOVZPQILo2PQIrr:1680 case X86::VMOVPQI2QIrr:1681 case X86::VMOVPQI2QIZrr:1682 case X86::VMOVZPQILo2PQIrr:1683 case X86::VMOVZPQILo2PQIZrr:1684 Src1Name = getRegName(MI->getOperand(1).getReg());1685 DecodeZeroMoveLowMask(2, ShuffleMask);1686 DestName = getRegName(MI->getOperand(0).getReg());1687 break;1688 1689 case X86::EXTRQI:1690 if (MI->getOperand(2).isImm() &&1691 MI->getOperand(3).isImm())1692 DecodeEXTRQIMask(16, 8, MI->getOperand(2).getImm(),1693 MI->getOperand(3).getImm(), ShuffleMask);1694 1695 DestName = getRegName(MI->getOperand(0).getReg());1696 Src1Name = getRegName(MI->getOperand(1).getReg());1697 break;1698 1699 case X86::INSERTQI:1700 if (MI->getOperand(3).isImm() &&1701 MI->getOperand(4).isImm())1702 DecodeINSERTQIMask(16, 8, MI->getOperand(3).getImm(),1703 MI->getOperand(4).getImm(), ShuffleMask);1704 1705 DestName = getRegName(MI->getOperand(0).getReg());1706 Src1Name = getRegName(MI->getOperand(1).getReg());1707 Src2Name = getRegName(MI->getOperand(2).getReg());1708 break;1709 1710 case X86::VBROADCASTF128rm:1711 case X86::VBROADCASTI128rm:1712 CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z256, rm)1713 CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z256, rm)1714 DecodeSubVectorBroadcast(4, 2, ShuffleMask);1715 DestName = getRegName(MI->getOperand(0).getReg());1716 break;1717 CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z, rm)1718 CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z, rm)1719 DecodeSubVectorBroadcast(8, 2, ShuffleMask);1720 DestName = getRegName(MI->getOperand(0).getReg());1721 break;1722 CASE_AVX512_INS_COMMON(BROADCASTF64X4, Z, rm)1723 CASE_AVX512_INS_COMMON(BROADCASTI64X4, Z, rm)1724 DecodeSubVectorBroadcast(8, 4, ShuffleMask);1725 DestName = getRegName(MI->getOperand(0).getReg());1726 break;1727 CASE_AVX512_INS_COMMON(BROADCASTF32X4, Z256, rm)1728 CASE_AVX512_INS_COMMON(BROADCASTI32X4, Z256, rm)1729 DecodeSubVectorBroadcast(8, 4, ShuffleMask);1730 DestName = getRegName(MI->getOperand(0).getReg());1731 break;1732 CASE_AVX512_INS_COMMON(BROADCASTF32X4, Z, rm)1733 CASE_AVX512_INS_COMMON(BROADCASTI32X4, Z, rm)1734 DecodeSubVectorBroadcast(16, 4, ShuffleMask);1735 DestName = getRegName(MI->getOperand(0).getReg());1736 break;1737 CASE_AVX512_INS_COMMON(BROADCASTF32X8, Z, rm)1738 CASE_AVX512_INS_COMMON(BROADCASTI32X8, Z, rm)1739 DecodeSubVectorBroadcast(16, 8, ShuffleMask);1740 DestName = getRegName(MI->getOperand(0).getReg());1741 break;1742 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rr)1743 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1744 [[fallthrough]];1745 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rm)1746 DecodeSubVectorBroadcast(4, 2, ShuffleMask);1747 DestName = getRegName(MI->getOperand(0).getReg());1748 break;1749 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rr)1750 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rr)1751 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1752 [[fallthrough]];1753 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rm)1754 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rm)1755 DecodeSubVectorBroadcast(8, 2, ShuffleMask);1756 DestName = getRegName(MI->getOperand(0).getReg());1757 break;1758 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rr)1759 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rr)1760 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1761 [[fallthrough]];1762 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rm)1763 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rm)1764 DecodeSubVectorBroadcast(16, 2, ShuffleMask);1765 DestName = getRegName(MI->getOperand(0).getReg());1766 break;1767 1768 CASE_PMOVZX(PMOVZXBW, r)1769 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1770 DecodeZeroExtendMask(8, 16, getRegOperandNumElts(MI, 16, 0), false,1771 ShuffleMask);1772 DestName = getRegName(MI->getOperand(0).getReg());1773 break;1774 1775 CASE_PMOVZX(PMOVZXBD, r)1776 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1777 DecodeZeroExtendMask(8, 32, getRegOperandNumElts(MI, 32, 0), false,1778 ShuffleMask);1779 DestName = getRegName(MI->getOperand(0).getReg());1780 break;1781 1782 CASE_PMOVZX(PMOVZXBQ, r)1783 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1784 DecodeZeroExtendMask(8, 64, getRegOperandNumElts(MI, 64, 0), false,1785 ShuffleMask);1786 DestName = getRegName(MI->getOperand(0).getReg());1787 break;1788 1789 CASE_PMOVZX(PMOVZXWD, r)1790 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1791 DecodeZeroExtendMask(16, 32, getRegOperandNumElts(MI, 32, 0), false,1792 ShuffleMask);1793 DestName = getRegName(MI->getOperand(0).getReg());1794 break;1795 1796 CASE_PMOVZX(PMOVZXWQ, r)1797 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1798 DecodeZeroExtendMask(16, 64, getRegOperandNumElts(MI, 64, 0), false,1799 ShuffleMask);1800 DestName = getRegName(MI->getOperand(0).getReg());1801 break;1802 1803 CASE_PMOVZX(PMOVZXDQ, r)1804 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());1805 DecodeZeroExtendMask(32, 64, getRegOperandNumElts(MI, 64, 0), false,1806 ShuffleMask);1807 DestName = getRegName(MI->getOperand(0).getReg());1808 break;1809 }1810 1811 // The only comments we decode are shuffles, so give up if we were unable to1812 // decode a shuffle mask.1813 if (ShuffleMask.empty())1814 return false;1815 1816 if (!DestName) DestName = Src1Name;1817 if (DestName) {1818 OS << DestName;1819 printMasking(OS, MI, MCII);1820 } else1821 OS << "mem";1822 1823 OS << " = ";1824 1825 // If the two sources are the same, canonicalize the input elements to be1826 // from the first src so that we get larger element spans.1827 if (Src1Name == Src2Name) {1828 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {1829 if ((int)ShuffleMask[i] >= 0 && // Not sentinel.1830 ShuffleMask[i] >= (int)e) // From second mask.1831 ShuffleMask[i] -= e;1832 }1833 }1834 1835 // The shuffle mask specifies which elements of the src1/src2 fill in the1836 // destination, with a few sentinel values. Loop through and print them1837 // out.1838 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {1839 if (i != 0)1840 OS << ',';1841 if (ShuffleMask[i] == SM_SentinelZero) {1842 OS << "zero";1843 continue;1844 }1845 1846 // Otherwise, it must come from src1 or src2. Print the span of elements1847 // that comes from this src.1848 bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();1849 const char *SrcName = isSrc1 ? Src1Name : Src2Name;1850 OS << (SrcName ? SrcName : "mem") << '[';1851 bool IsFirst = true;1852 while (i != e && (int)ShuffleMask[i] != SM_SentinelZero &&1853 (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {1854 if (!IsFirst)1855 OS << ',';1856 else1857 IsFirst = false;1858 if (ShuffleMask[i] == SM_SentinelUndef)1859 OS << "u";1860 else1861 OS << ShuffleMask[i] % ShuffleMask.size();1862 ++i;1863 }1864 OS << ']';1865 --i; // For loop increments element #.1866 }1867 OS << '\n';1868 1869 // We successfully added a comment to this instruction.1870 return true;1871}1872