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1//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file contains the entry points for global functions defined in the x8610// target library, as used by the LLVM JIT.11//12//===----------------------------------------------------------------------===//13 14#ifndef LLVM_LIB_TARGET_X86_X86_H15#define LLVM_LIB_TARGET_X86_X86_H16 17#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"18#include "llvm/IR/Analysis.h"19#include "llvm/IR/PassManager.h"20#include "llvm/Support/CodeGen.h"21#include "llvm/Target/TargetMachine.h"22 23namespace llvm {24 25class FunctionPass;26class InstructionSelector;27class PassRegistry;28class X86RegisterBankInfo;29class X86Subtarget;30class X86TargetMachine;31 32/// This pass converts a legalized DAG into a X86-specific DAG, ready for33/// instruction scheduling.34FunctionPass *createX86ISelDag(X86TargetMachine &TM, CodeGenOptLevel OptLevel);35 36/// This pass initializes a global base register for PIC on x86-32.37FunctionPass *createX86GlobalBaseRegPass();38 39/// This pass combines multiple accesses to local-dynamic TLS variables so that40/// the TLS base address for the module is only fetched once per execution path41/// through the function.42FunctionPass *createCleanupLocalDynamicTLSPass();43 44/// This function returns a pass which converts floating-point register45/// references and pseudo instructions into floating-point stack references and46/// physical instructions.47class X86FPStackifierPass : public PassInfoMixin<X86FPStackifierPass> {48public:49 PreservedAnalyses run(MachineFunction &MF,50 MachineFunctionAnalysisManager &MFAM);51};52 53FunctionPass *createX86FPStackifierLegacyPass();54 55/// This pass inserts AVX vzeroupper instructions before each call to avoid56/// transition penalty between functions encoded with AVX and SSE.57FunctionPass *createX86IssueVZeroUpperPass();58 59/// This pass inserts ENDBR instructions before indirect jump/call60/// destinations as part of CET IBT mechanism.61FunctionPass *createX86IndirectBranchTrackingPass();62 63/// Return a pass that pads short functions with NOOPs.64/// This will prevent a stall when returning on the Atom.65FunctionPass *createX86PadShortFunctions();66 67/// Return a pass that selectively replaces certain instructions (like add,68/// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA69/// instructions, in order to eliminate execution delays in some processors.70FunctionPass *createX86FixupLEAs();71 72/// Return a pass that replaces equivalent slower instructions with faster73/// ones.74FunctionPass *createX86FixupInstTuning();75 76/// Return a pass that reduces the size of vector constant pool loads.77FunctionPass *createX86FixupVectorConstants();78 79/// Return a pass that removes redundant LEA instructions and redundant address80/// recalculations.81FunctionPass *createX86OptimizeLEAs();82 83/// Return a pass that transforms setcc + movzx pairs into xor + setcc.84FunctionPass *createX86FixupSetCC();85 86/// Return a pass that avoids creating store forward block issues in the hardware.87FunctionPass *createX86AvoidStoreForwardingBlocks();88 89/// Return a pass that lowers EFLAGS copy pseudo instructions.90FunctionPass *createX86FlagsCopyLoweringPass();91 92/// Return a pass that expands DynAlloca pseudo-instructions.93class X86DynAllocaExpanderPass94 : public PassInfoMixin<X86DynAllocaExpanderPass> {95public:96 PreservedAnalyses run(MachineFunction &MF,97 MachineFunctionAnalysisManager &MFAM);98};99 100FunctionPass *createX86DynAllocaExpanderLegacyPass();101 102/// Return a pass that config the tile registers.103FunctionPass *createX86TileConfigPass();104 105/// Return a pass that preconfig the tile registers before fast reg allocation.106FunctionPass *createX86FastPreTileConfigPass();107 108/// Return a pass that config the tile registers after fast reg allocation.109FunctionPass *createX86FastTileConfigPass();110 111/// Return a pass that insert pseudo tile config instruction.112FunctionPass *createX86PreTileConfigPass();113 114/// Return a pass that lower the tile copy instruction.115FunctionPass *createX86LowerTileCopyPass();116 117/// Return a pass that inserts int3 at the end of the function if it ends with a118/// CALL instruction. The pass does the same for each funclet as well. This119/// ensures that the open interval of function start and end PCs contains all120/// return addresses for the benefit of the Windows x64 unwinder.121class X86AvoidTrailingCallPass122 : public PassInfoMixin<X86AvoidTrailingCallPass> {123public:124 PreservedAnalyses run(MachineFunction &MF,125 MachineFunctionAnalysisManager &MFAM);126 static bool isRequired() { return true; }127};128 129FunctionPass *createX86AvoidTrailingCallLegacyPass();130 131/// Return a pass that optimizes the code-size of x86 call sequences. This is132/// done by replacing esp-relative movs with pushes.133FunctionPass *createX86CallFrameOptimization();134 135/// Return an IR pass that inserts EH registration stack objects and explicit136/// EH state updates. This pass must run after EH preparation, which does137/// Windows-specific but architecture-neutral preparation.138FunctionPass *createX86WinEHStatePass();139 140/// Return a Machine IR pass that expands X86-specific pseudo141/// instructions into a sequence of actual instructions. This pass142/// must run after prologue/epilogue insertion and before lowering143/// the MachineInstr to MC.144FunctionPass *createX86ExpandPseudoPass();145 146/// This pass converts X86 cmov instructions into branch when profitable.147FunctionPass *createX86CmovConverterPass();148 149/// Return a Machine IR pass that selectively replaces150/// certain byte and word instructions by equivalent 32 bit instructions,151/// in order to eliminate partial register usage, false dependences on152/// the upper portions of registers, and to save code size.153FunctionPass *createX86FixupBWInsts();154 155/// Return a Machine IR pass that reassigns instruction chains from one domain156/// to another, when profitable.157FunctionPass *createX86DomainReassignmentPass();158 159/// This pass compress instructions from EVEX space to legacy/VEX/EVEX space when160/// possible in order to reduce code size or facilitate HW decoding.161FunctionPass *createX86CompressEVEXPass();162 163/// This pass creates the thunks for the retpoline feature.164FunctionPass *createX86IndirectThunksPass();165 166/// This pass replaces ret instructions with jmp's to __x86_return thunk.167FunctionPass *createX86ReturnThunksPass();168 169/// This pass insert wait instruction after X87 instructions which could raise170/// fp exceptions when strict-fp enabled.171FunctionPass *createX86InsertX87waitPass();172 173/// This pass optimizes arithmetic based on knowledge that is only used by174/// a reduction sequence and is therefore safe to reassociate in interesting175/// ways.176class X86PartialReductionPass : public PassInfoMixin<X86PartialReductionPass> {177private:178 const X86TargetMachine *TM;179 180public:181 X86PartialReductionPass(const X86TargetMachine *TM) : TM(TM) {}182 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);183};184 185FunctionPass *createX86PartialReductionLegacyPass();186 187/// // Analyzes and emits pseudos to support Win x64 Unwind V2.188FunctionPass *createX86WinEHUnwindV2Pass();189 190/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics191/// or split the data to two <128 x i32>.192class X86LowerAMXTypePass : public PassInfoMixin<X86LowerAMXTypePass> {193private:194 const TargetMachine *TM;195 196public:197 X86LowerAMXTypePass(const TargetMachine *TM) : TM(TM) {}198 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);199 static bool isRequired() { return true; }200};201 202FunctionPass *createX86LowerAMXTypeLegacyPass();203 204/// The pass transforms amx intrinsics to scalar operation if the function has205/// optnone attribute or it is O0.206class X86LowerAMXIntrinsicsPass207 : public PassInfoMixin<X86LowerAMXIntrinsicsPass> {208private:209 const TargetMachine *TM;210 211public:212 X86LowerAMXIntrinsicsPass(const TargetMachine *TM) : TM(TM) {}213 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);214 static bool isRequired() { return true; }215};216 217FunctionPass *createX86LowerAMXIntrinsicsLegacyPass();218 219InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,220 const X86Subtarget &,221 const X86RegisterBankInfo &);222 223FunctionPass *createX86LoadValueInjectionLoadHardeningPass();224FunctionPass *createX86LoadValueInjectionRetHardeningPass();225FunctionPass *createX86SpeculativeLoadHardeningPass();226FunctionPass *createX86SpeculativeExecutionSideEffectSuppression();227FunctionPass *createX86ArgumentStackSlotPass();228FunctionPass *createX86SuppressAPXForRelocationPass();229 230void initializeCompressEVEXPassPass(PassRegistry &);231void initializeFixupBWInstPassPass(PassRegistry &);232void initializeFixupLEAPassPass(PassRegistry &);233void initializeX86ArgumentStackSlotPassPass(PassRegistry &);234void initializeX86AsmPrinterPass(PassRegistry &);235void initializeX86FixupInstTuningPassPass(PassRegistry &);236void initializeX86FixupVectorConstantsPassPass(PassRegistry &);237void initializeWinEHStatePassPass(PassRegistry &);238void initializeX86AvoidSFBPassPass(PassRegistry &);239void initializeX86AvoidTrailingCallLegacyPassPass(PassRegistry &);240void initializeX86CallFrameOptimizationPass(PassRegistry &);241void initializeX86CmovConverterPassPass(PassRegistry &);242void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);243void initializeX86DomainReassignmentPass(PassRegistry &);244void initializeX86DynAllocaExpanderLegacyPass(PassRegistry &);245void initializeX86ExecutionDomainFixPass(PassRegistry &);246void initializeX86ExpandPseudoPass(PassRegistry &);247void initializeX86FPStackifierLegacyPass(PassRegistry &);248void initializeX86FastPreTileConfigPass(PassRegistry &);249void initializeX86FastTileConfigPass(PassRegistry &);250void initializeX86FixupSetCCPassPass(PassRegistry &);251void initializeX86FlagsCopyLoweringPassPass(PassRegistry &);252void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &);253void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &);254void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &);255void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &);256void initializeX86LowerTileCopyPass(PassRegistry &);257void initializeX86OptimizeLEAPassPass(PassRegistry &);258void initializeX86PartialReductionLegacyPass(PassRegistry &);259void initializeX86PreTileConfigPass(PassRegistry &);260void initializeX86ReturnThunksPass(PassRegistry &);261void initializeX86SpeculativeExecutionSideEffectSuppressionPass(PassRegistry &);262void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);263void initializeX86TileConfigPass(PassRegistry &);264void initializeX86SuppressAPXForRelocationPassPass(PassRegistry &);265void initializeX86WinEHUnwindV2Pass(PassRegistry &);266 267namespace X86AS {268enum : unsigned {269 GS = 256,270 FS = 257,271 SS = 258,272 PTR32_SPTR = 270,273 PTR32_UPTR = 271,274 PTR64 = 272275};276} // End X86AS namespace277 278} // End llvm namespace279 280#endif281