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1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file provides pattern fragments useful for SIMD instructions.10//11//===----------------------------------------------------------------------===//12 13//===----------------------------------------------------------------------===//14// MMX specific DAG Nodes.15//===----------------------------------------------------------------------===//16 17// Low word of MMX to GPR.18def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,19 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;20// GPR to low word of MMX.21def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,22 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;23 24//===----------------------------------------------------------------------===//25// MMX Pattern Fragments26//===----------------------------------------------------------------------===//27 28def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;29 30//===----------------------------------------------------------------------===//31// SSE specific DAG Nodes.32//===----------------------------------------------------------------------===//33 34def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>,35 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>,36 SDTCisVT<3, i8>]>;37 38def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;39def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;40def X86fmins : SDNode<"X86ISD::FMINS", SDTFPBinOp>;41def X86fmaxs : SDNode<"X86ISD::FMAXS", SDTFPBinOp>;42 43// Commutative and Associative FMIN and FMAX.44def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,45 [SDNPCommutative, SDNPAssociative]>;46def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,47 [SDNPCommutative, SDNPAssociative]>;48 49def X86strict_fmin : SDNode<"X86ISD::STRICT_FMIN", SDTFPBinOp,50 [SDNPHasChain]>;51def X86strict_fmax : SDNode<"X86ISD::STRICT_FMAX", SDTFPBinOp,52 [SDNPHasChain]>;53 54def X86any_fmin : PatFrags<(ops node:$src1, node:$src2),55 [(X86strict_fmin node:$src1, node:$src2),56 (X86fmin node:$src1, node:$src2)]>;57def X86any_fmax : PatFrags<(ops node:$src1, node:$src2),58 [(X86strict_fmax node:$src1, node:$src2),59 (X86fmax node:$src1, node:$src2)]>;60 61def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,62 [SDNPCommutative, SDNPAssociative]>;63def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,64 [SDNPCommutative, SDNPAssociative]>;65def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,66 [SDNPCommutative, SDNPAssociative]>;67def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp>;68def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;69def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;70def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;71def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;72def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;73def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;74def X86hadds : SDNode<"X86ISD::HADDS", SDTIntBinOp>;75def X86hsubs : SDNode<"X86ISD::HSUBS", SDTIntBinOp>;76def X86comi : SDNode<"X86ISD::COMI", SDTX86FCmp>;77def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86FCmp>;78def X86comi512 : SDNode<"X86ISD::COMX", SDTX86FCmp>;79def X86ucomi512 : SDNode<"X86ISD::UCOMX", SDTX86FCmp>;80def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<0, 1>,81 SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;82def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;83 84def X86pshufb : SDNode<"X86ISD::PSHUFB",85 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i8>, SDTCisSameAs<0,1>,86 SDTCisSameAs<0,2>]>>;87def X86psadbw : SDNode<"X86ISD::PSADBW",88 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>,89 SDTCVecEltisVT<1, i8>,90 SDTCisSameSizeAs<0,1>,91 SDTCisSameAs<1,2>]>, [SDNPCommutative]>;92def SDTX86PSADBW : SDTypeProfile<1, 3, [SDTCVecEltisVT<0, i16>,93 SDTCVecEltisVT<1, i8>,94 SDTCisSameSizeAs<0,1>,95 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;96def X86dbpsadbw : SDNode<"X86ISD::DBPSADBW", SDTX86PSADBW>;97def X86andnp : SDNode<"X86ISD::ANDNP",98 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,99 SDTCisSameAs<0,2>]>>;100def X86multishift : SDNode<"X86ISD::MULTISHIFT",101 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,102 SDTCisSameAs<1,2>]>>;103def X86pextrb : SDNode<"X86ISD::PEXTRB",104 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>,105 SDTCisVT<2, i8>]>>;106def X86pextrw : SDNode<"X86ISD::PEXTRW",107 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>,108 SDTCisVT<2, i8>]>>;109def X86pinsrb : SDNode<"X86ISD::PINSRB",110 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,111 SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>;112def X86pinsrw : SDNode<"X86ISD::PINSRW",113 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,114 SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>;115def X86insertps : SDNode<"X86ISD::INSERTPS",116 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,117 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;118def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",119 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;120 121def X86vzld : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,122 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;123def X86vextractst : SDNode<"X86ISD::VEXTRACT_STORE", SDTStore,124 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;125def X86VBroadcastld : SDNode<"X86ISD::VBROADCAST_LOAD", SDTLoad,126 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;127def X86SubVBroadcastld : SDNode<"X86ISD::SUBV_BROADCAST_LOAD", SDTLoad,128 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;129 130def SDTVtrunc : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,131 SDTCisInt<0>, SDTCisInt<1>,132 SDTCisOpSmallerThanOp<0, 1>]>;133def SDTVmtrunc : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>,134 SDTCisInt<0>, SDTCisInt<1>,135 SDTCisOpSmallerThanOp<0, 1>,136 SDTCisSameAs<0, 2>,137 SDTCVecEltisVT<3, i1>,138 SDTCisSameNumEltsAs<1, 3>]>;139 140def X86vtrunc : SDNode<"X86ISD::VTRUNC", SDTVtrunc>;141def X86vtruncs : SDNode<"X86ISD::VTRUNCS", SDTVtrunc>;142def X86vtruncus : SDNode<"X86ISD::VTRUNCUS", SDTVtrunc>;143def X86vmtrunc : SDNode<"X86ISD::VMTRUNC", SDTVmtrunc>;144def X86vmtruncs : SDNode<"X86ISD::VMTRUNCS", SDTVmtrunc>;145def X86vmtruncus : SDNode<"X86ISD::VMTRUNCUS", SDTVmtrunc>;146 147def X86vfpext : SDNode<"X86ISD::VFPEXT",148 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>,149 SDTCisFP<1>, SDTCisVec<1>]>>;150 151def X86strict_vfpext : SDNode<"X86ISD::STRICT_VFPEXT",152 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>,153 SDTCisFP<1>, SDTCisVec<1>]>,154 [SDNPHasChain]>;155 156def X86any_vfpext : PatFrags<(ops node:$src),157 [(X86strict_vfpext node:$src),158 (X86vfpext node:$src)]>;159 160def X86vfpround: SDNode<"X86ISD::VFPROUND",161 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>,162 SDTCisFP<1>, SDTCisVec<1>,163 SDTCisOpSmallerThanOp<0, 1>]>>;164def X86vfpround2 : SDNode<"X86ISD::VFPROUND2",165 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>,166 SDTCisFP<1>, SDTCisVec<1>,167 SDTCisSameAs<1, 2>,168 SDTCisOpSmallerThanOp<0, 1>]>>;169 170def X86strict_vfpround: SDNode<"X86ISD::STRICT_VFPROUND",171 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>,172 SDTCisFP<1>, SDTCisVec<1>,173 SDTCisOpSmallerThanOp<0, 1>]>,174 [SDNPHasChain]>;175 176def X86any_vfpround : PatFrags<(ops node:$src),177 [(X86strict_vfpround node:$src),178 (X86vfpround node:$src)]>;179 180def X86frounds : SDNode<"X86ISD::VFPROUNDS",181 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>,182 SDTCisSameAs<0, 1>,183 SDTCisFP<2>, SDTCisVec<2>,184 SDTCisSameSizeAs<0, 2>]>>;185 186def X86froundsRnd: SDNode<"X86ISD::VFPROUNDS_RND",187 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>,188 SDTCisSameAs<0, 1>,189 SDTCisFP<2>, SDTCisVec<2>,190 SDTCisSameSizeAs<0, 2>,191 SDTCisVT<3, i32>]>>;192 193def X86fpexts : SDNode<"X86ISD::VFPEXTS",194 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>,195 SDTCisSameAs<0, 1>,196 SDTCisFP<2>, SDTCisVec<2>,197 SDTCisSameSizeAs<0, 2>]>>;198def X86fpextsSAE : SDNode<"X86ISD::VFPEXTS_SAE",199 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>,200 SDTCisSameAs<0, 1>,201 SDTCisFP<2>, SDTCisVec<2>,202 SDTCisSameSizeAs<0, 2>]>>;203 204def X86vmfpround: SDNode<"X86ISD::VMFPROUND",205 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>,206 SDTCisFP<1>, SDTCisVec<1>,207 SDTCisSameAs<0, 2>,208 SDTCVecEltisVT<3, i1>,209 SDTCisSameNumEltsAs<1, 3>]>>;210 211def X86vshiftimm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,212 SDTCisVT<2, i8>, SDTCisInt<0>]>;213 214def X86vshldq : SDNode<"X86ISD::VSHLDQ", X86vshiftimm>;215def X86vshrdq : SDNode<"X86ISD::VSRLDQ", X86vshiftimm>;216def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;217def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;218 219def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;220def X86strict_cmpp : SDNode<"X86ISD::STRICT_CMPP", SDTX86VFCMP, [SDNPHasChain]>;221def X86any_cmpp : PatFrags<(ops node:$src1, node:$src2, node:$src3),222 [(X86strict_cmpp node:$src1, node:$src2, node:$src3),223 (X86cmpp node:$src1, node:$src2, node:$src3)]>;224 225def X86CmpMaskCC :226 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,227 SDTCisVec<1>, SDTCisSameAs<2, 1>,228 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>;229 230def X86MaskCmpMaskCC :231 SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,232 SDTCisVec<1>, SDTCisSameAs<2, 1>,233 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>, SDTCisSameAs<4, 0>]>;234def X86CmpMaskCCScalar :235 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisFP<1>, SDTCisSameAs<1, 2>,236 SDTCisVT<3, i8>]>;237 238def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;239def X86cmpmm : SDNode<"X86ISD::CMPMM", X86MaskCmpMaskCC>;240def X86strict_cmpm : SDNode<"X86ISD::STRICT_CMPM", X86CmpMaskCC, [SDNPHasChain]>;241def X86any_cmpm : PatFrags<(ops node:$src1, node:$src2, node:$src3),242 [(X86strict_cmpm node:$src1, node:$src2, node:$src3),243 (X86cmpm node:$src1, node:$src2, node:$src3)]>;244def X86cmpmmSAE : SDNode<"X86ISD::CMPMM_SAE", X86MaskCmpMaskCC>;245def X86cmpms : SDNode<"X86ISD::FSETCCM", X86CmpMaskCCScalar>;246def X86cmpmsSAE : SDNode<"X86ISD::FSETCCM_SAE", X86CmpMaskCCScalar>;247 248def X86phminpos: SDNode<"X86ISD::PHMINPOS", 249 SDTypeProfile<1, 1, [SDTCisVT<0, v8i16>, SDTCisVT<1, v8i16>]>>;250 251def X86vshiftuniform : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,252 SDTCisVec<2>, SDTCisInt<0>,253 SDTCisInt<2>]>;254 255def X86vshl : SDNode<"X86ISD::VSHL", X86vshiftuniform>;256def X86vsrl : SDNode<"X86ISD::VSRL", X86vshiftuniform>;257def X86vsra : SDNode<"X86ISD::VSRA", X86vshiftuniform>;258 259def X86vshiftvariable : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,260 SDTCisSameAs<0,2>, SDTCisInt<0>]>;261 262def X86vshlv : SDNode<"X86ISD::VSHLV", X86vshiftvariable>;263def X86vsrlv : SDNode<"X86ISD::VSRLV", X86vshiftvariable>;264def X86vsrav : SDNode<"X86ISD::VSRAV", X86vshiftvariable>;265 266def X86vshli : SDNode<"X86ISD::VSHLI", X86vshiftimm>;267def X86vsrli : SDNode<"X86ISD::VSRLI", X86vshiftimm>;268def X86vsrai : SDNode<"X86ISD::VSRAI", X86vshiftimm>;269 270def X86kshiftl : SDNode<"X86ISD::KSHIFTL",271 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i1>,272 SDTCisSameAs<0, 1>,273 SDTCisVT<2, i8>]>>;274def X86kshiftr : SDNode<"X86ISD::KSHIFTR",275 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i1>,276 SDTCisSameAs<0, 1>,277 SDTCisVT<2, i8>]>>;278 279def X86kadd : SDNode<"X86ISD::KADD", SDTIntBinOp, [SDNPCommutative]>;280 281def X86vrotli : SDNode<"X86ISD::VROTLI", X86vshiftimm>;282def X86vrotri : SDNode<"X86ISD::VROTRI", X86vshiftimm>;283 284def X86vpshl : SDNode<"X86ISD::VPSHL", X86vshiftvariable>;285def X86vpsha : SDNode<"X86ISD::VPSHA", X86vshiftvariable>;286 287def X86vpcom : SDNode<"X86ISD::VPCOM",288 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,289 SDTCisSameAs<0,2>,290 SDTCisVT<3, i8>, SDTCisInt<0>]>>;291def X86vpcomu : SDNode<"X86ISD::VPCOMU",292 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,293 SDTCisSameAs<0,2>,294 SDTCisVT<3, i8>, SDTCisInt<0>]>>;295def X86vpermil2 : SDNode<"X86ISD::VPERMIL2",296 SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,297 SDTCisSameAs<0,2>,298 SDTCisFP<0>, SDTCisInt<3>,299 SDTCisSameNumEltsAs<0, 3>,300 SDTCisSameSizeAs<0,3>,301 SDTCisVT<4, i8>]>>;302def X86vpperm : SDNode<"X86ISD::VPPERM",303 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,304 SDTCisSameAs<0,2>, SDTCisSameAs<0, 3>]>>;305 306def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,307 SDTCisVec<1>,308 SDTCisSameAs<2, 1>]>;309 310def X86mulhrs : SDNode<"X86ISD::MULHRS", SDTIntBinOp, [SDNPCommutative]>;311def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;312def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;313def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;314def X86ktest : SDNode<"X86ISD::KTEST", SDTX86CmpPTest>;315 316def X86movmsk : SDNode<"X86ISD::MOVMSK",317 SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVec<1>]>>;318 319def X86selects : SDNode<"X86ISD::SELECTS",320 SDTypeProfile<1, 3, [SDTCisVT<1, v1i1>,321 SDTCisSameAs<0, 2>,322 SDTCisSameAs<2, 3>]>>;323 324def X86pmuludq : SDNode<"X86ISD::PMULUDQ",325 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>,326 SDTCisSameAs<0,1>,327 SDTCisSameAs<1,2>]>,328 [SDNPCommutative]>;329def X86pmuldq : SDNode<"X86ISD::PMULDQ",330 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>,331 SDTCisSameAs<0,1>,332 SDTCisSameAs<1,2>]>,333 [SDNPCommutative]>;334 335def X86extrqi : SDNode<"X86ISD::EXTRQI",336 SDTypeProfile<1, 3, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,337 SDTCisVT<2, i8>, SDTCisVT<3, i8>]>>;338def X86insertqi : SDNode<"X86ISD::INSERTQI",339 SDTypeProfile<1, 4, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,340 SDTCisSameAs<1,2>, SDTCisVT<3, i8>,341 SDTCisVT<4, i8>]>>;342 343// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get344// translated into one of the target nodes below during lowering.345// Note: this is a work in progress...346def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;347def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,348 SDTCisSameAs<0,2>]>;349def SDTShuff2OpFP : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisFP<0>,350 SDTCisSameAs<0,1>, SDTCisSameAs<0,2>]>;351 352def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,353 SDTCisFP<0>, SDTCisInt<2>,354 SDTCisSameNumEltsAs<0,2>,355 SDTCisSameSizeAs<0,2>]>;356def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,357 SDTCisSameAs<0,1>, SDTCisVT<2, i8>]>;358def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,359 SDTCisSameAs<0,2>, SDTCisVT<3, i8>]>;360def SDTFPBinOpImm: SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>,361 SDTCisSameAs<0,1>,362 SDTCisSameAs<0,2>,363 SDTCisVT<3, i32>]>;364def SDTFPTernaryOpImm: SDTypeProfile<1, 4, [SDTCisFP<0>, SDTCisSameAs<0,1>,365 SDTCisSameAs<0,2>,366 SDTCisInt<3>,367 SDTCisSameSizeAs<0, 3>,368 SDTCisSameNumEltsAs<0, 3>,369 SDTCisVT<4, i32>]>;370def SDTFPUnaryOpImm: SDTypeProfile<1, 2, [SDTCisFP<0>,371 SDTCisSameAs<0,1>,372 SDTCisVT<2, i32>]>;373 374def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;375def SDTVBroadcastm : SDTypeProfile<1, 1, [SDTCisVec<0>,376 SDTCisInt<0>, SDTCisInt<1>]>;377 378def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,379 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;380 381def SDTTernlog : SDTypeProfile<1, 4, [SDTCisInt<0>, SDTCisVec<0>,382 SDTCisSameAs<0,1>, SDTCisSameAs<0,2>,383 SDTCisSameAs<0,3>, SDTCisVT<4, i8>]>;384 385def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.386 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisVT<3, i32>]>;387 388def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc.389 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisVT<2, i32>]>;390 391def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,392 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>,393 SDTCisFP<0>, SDTCisVT<4, i32>]>;394 395def SDTFPToxIntSatOp396 : SDTypeProfile<1,397 1, [SDTCisVec<0>, SDTCisVec<1>, SDTCisInt<0>, SDTCisFP<1>]>;398 399def X86fp2sisat : SDNode<"X86ISD::FP_TO_SINT_SAT", SDTFPToxIntSatOp>;400def X86fp2uisat : SDNode<"X86ISD::FP_TO_UINT_SAT", SDTFPToxIntSatOp>;401 402def X86PAlignr : SDNode<"X86ISD::PALIGNR",403 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, i8>,404 SDTCisSameAs<0,1>,405 SDTCisSameAs<0,2>,406 SDTCisVT<3, i8>]>>;407def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;408 409def X86VShld : SDNode<"X86ISD::VSHLD", SDTShuff3OpI>;410def X86VShrd : SDNode<"X86ISD::VSHRD", SDTShuff3OpI>;411 412def X86Conflict : SDNode<"X86ISD::CONFLICT", SDTIntUnaryOp>;413 414def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;415def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;416def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;417 418def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;419def X86Shuf128 : SDNode<"X86ISD::SHUF128", SDTShuff3OpI>;420 421def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;422def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;423def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;424 425def X86Movsd : SDNode<"X86ISD::MOVSD",426 SDTypeProfile<1, 2, [SDTCisVT<0, v2f64>,427 SDTCisVT<1, v2f64>,428 SDTCisVT<2, v2f64>]>>;429def X86Movss : SDNode<"X86ISD::MOVSS",430 SDTypeProfile<1, 2, [SDTCisVT<0, v4f32>,431 SDTCisVT<1, v4f32>,432 SDTCisVT<2, v4f32>]>>;433 434def X86Movsh : SDNode<"X86ISD::MOVSH",435 SDTypeProfile<1, 2, [SDTCisVT<0, v8f16>,436 SDTCisVT<1, v8f16>,437 SDTCisVT<2, v8f16>]>>;438 439def X86Movlhps : SDNode<"X86ISD::MOVLHPS",440 SDTypeProfile<1, 2, [SDTCisVT<0, v4f32>,441 SDTCisVT<1, v4f32>,442 SDTCisVT<2, v4f32>]>>;443def X86Movhlps : SDNode<"X86ISD::MOVHLPS",444 SDTypeProfile<1, 2, [SDTCisVT<0, v4f32>,445 SDTCisVT<1, v4f32>,446 SDTCisVT<2, v4f32>]>>;447 448def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<0>,449 SDTCisVec<1>, SDTCisInt<1>,450 SDTCisSameSizeAs<0,1>,451 SDTCisSameAs<1,2>,452 SDTCisOpSmallerThanOp<0, 1>]>;453def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;454def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;455 456def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;457def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;458 459def X86vpmaddubsw : SDNode<"X86ISD::VPMADDUBSW",460 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i16>,461 SDTCVecEltisVT<1, i8>,462 SDTCisSameSizeAs<0,1>,463 SDTCisSameAs<1,2>]>>;464def X86vpmaddwd : SDNode<"X86ISD::VPMADDWD",465 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i32>,466 SDTCVecEltisVT<1, i16>,467 SDTCisSameSizeAs<0,1>,468 SDTCisSameAs<1,2>]>,469 [SDNPCommutative]>;470 471def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;472def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;473def X86VPermv : SDNode<"X86ISD::VPERMV",474 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<1>,475 SDTCisSameNumEltsAs<0,1>,476 SDTCisSameSizeAs<0,1>,477 SDTCisSameAs<0,2>]>>;478def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;479def X86VPermt2 : SDNode<"X86ISD::VPERMV3",480 SDTypeProfile<1, 3, [SDTCisVec<0>,481 SDTCisSameAs<0,1>, SDTCisInt<2>,482 SDTCisVec<2>, SDTCisSameNumEltsAs<0, 2>,483 SDTCisSameSizeAs<0,2>,484 SDTCisSameAs<0,3>]>, []>;485 486def X86vpternlog : SDNode<"X86ISD::VPTERNLOG", SDTTernlog>;487 488def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;489 490def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPTernaryOpImm>;491def X86VFixupimmSAE : SDNode<"X86ISD::VFIXUPIMM_SAE", SDTFPTernaryOpImm>;492def X86VFixupimms : SDNode<"X86ISD::VFIXUPIMMS", SDTFPTernaryOpImm>;493def X86VFixupimmSAEs : SDNode<"X86ISD::VFIXUPIMMS_SAE", SDTFPTernaryOpImm>;494def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImm>;495def X86VRangeSAE : SDNode<"X86ISD::VRANGE_SAE", SDTFPBinOpImm>;496def X86VReduce : SDNode<"X86ISD::VREDUCE", SDTFPUnaryOpImm>;497def X86VReduceSAE : SDNode<"X86ISD::VREDUCE_SAE", SDTFPUnaryOpImm>;498def X86VRndScale : SDNode<"X86ISD::VRNDSCALE", SDTFPUnaryOpImm>;499def X86strict_VRndScale : SDNode<"X86ISD::STRICT_VRNDSCALE", SDTFPUnaryOpImm,500 [SDNPHasChain]>;501def X86any_VRndScale : PatFrags<(ops node:$src1, node:$src2),502 [(X86strict_VRndScale node:$src1, node:$src2),503 (X86VRndScale node:$src1, node:$src2)]>;504 505def X86VRndScaleSAE: SDNode<"X86ISD::VRNDSCALE_SAE", SDTFPUnaryOpImm>;506def X86VGetMant : SDNode<"X86ISD::VGETMANT", SDTFPUnaryOpImm>;507def X86VGetMantSAE : SDNode<"X86ISD::VGETMANT_SAE", SDTFPUnaryOpImm>;508def X86Vfpclass : SDNode<"X86ISD::VFPCLASS",509 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i1>,510 SDTCisFP<1>,511 SDTCisSameNumEltsAs<0,1>,512 SDTCisVT<2, i32>]>, []>;513def X86Vfpclasss : SDNode<"X86ISD::VFPCLASSS",514 SDTypeProfile<1, 2, [SDTCisVT<0, v1i1>,515 SDTCisFP<1>, SDTCisVT<2, i32>]>,[]>;516 517def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;518def X86VBroadcastm : SDNode<"X86ISD::VBROADCASTM", SDTVBroadcastm>;519 520def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;521def X86Blendv : SDNode<"X86ISD::BLENDV",522 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisInt<1>,523 SDTCisSameAs<0, 2>,524 SDTCisSameAs<2, 3>,525 SDTCisSameNumEltsAs<0, 1>,526 SDTCisSameSizeAs<0, 1>]>>;527 528def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;529 530def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;531def X86fadds : SDNode<"X86ISD::FADDS", SDTFPBinOp>;532def X86faddRnds : SDNode<"X86ISD::FADDS_RND", SDTFPBinOpRound>;533def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;534def X86fsubs : SDNode<"X86ISD::FSUBS", SDTFPBinOp>;535def X86fsubRnds : SDNode<"X86ISD::FSUBS_RND", SDTFPBinOpRound>;536def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;537def X86fmuls : SDNode<"X86ISD::FMULS", SDTFPBinOp>;538def X86fmulRnds : SDNode<"X86ISD::FMULS_RND", SDTFPBinOpRound>;539def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;540def X86fdivs : SDNode<"X86ISD::FDIVS", SDTFPBinOp>;541def X86fdivRnds : SDNode<"X86ISD::FDIVS_RND", SDTFPBinOpRound>;542def X86fmaxSAE : SDNode<"X86ISD::FMAX_SAE", SDTFPBinOp>;543def X86fmaxSAEs : SDNode<"X86ISD::FMAXS_SAE", SDTFPBinOp>;544def X86fminSAE : SDNode<"X86ISD::FMIN_SAE", SDTFPBinOp>;545def X86fminSAEs : SDNode<"X86ISD::FMINS_SAE", SDTFPBinOp>;546def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOp>;547def X86scalefRnd : SDNode<"X86ISD::SCALEF_RND", SDTFPBinOpRound>;548def X86scalefs : SDNode<"X86ISD::SCALEFS", SDTFPBinOp>;549def X86scalefsRnd: SDNode<"X86ISD::SCALEFS_RND", SDTFPBinOpRound>;550def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;551def X86fsqrts : SDNode<"X86ISD::FSQRTS", SDTFPBinOp>;552def X86fsqrtRnds : SDNode<"X86ISD::FSQRTS_RND", SDTFPBinOpRound>;553def X86fgetexp : SDNode<"X86ISD::FGETEXP", SDTFPUnaryOp>;554def X86fgetexpSAE : SDNode<"X86ISD::FGETEXP_SAE", SDTFPUnaryOp>;555def X86fgetexps : SDNode<"X86ISD::FGETEXPS", SDTFPBinOp>;556def X86fgetexpSAEs : SDNode<"X86ISD::FGETEXPS_SAE", SDTFPBinOp>;557 558def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFPTernaryOp, [SDNPCommutative]>;559def X86strict_Fnmadd : SDNode<"X86ISD::STRICT_FNMADD", SDTFPTernaryOp, [SDNPCommutative, SDNPHasChain]>;560def X86any_Fnmadd : PatFrags<(ops node:$src1, node:$src2, node:$src3),561 [(X86strict_Fnmadd node:$src1, node:$src2, node:$src3),562 (X86Fnmadd node:$src1, node:$src2, node:$src3)]>;563def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFPTernaryOp, [SDNPCommutative]>;564def X86strict_Fmsub : SDNode<"X86ISD::STRICT_FMSUB", SDTFPTernaryOp, [SDNPCommutative, SDNPHasChain]>;565def X86any_Fmsub : PatFrags<(ops node:$src1, node:$src2, node:$src3),566 [(X86strict_Fmsub node:$src1, node:$src2, node:$src3),567 (X86Fmsub node:$src1, node:$src2, node:$src3)]>;568def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFPTernaryOp, [SDNPCommutative]>;569def X86strict_Fnmsub : SDNode<"X86ISD::STRICT_FNMSUB", SDTFPTernaryOp, [SDNPCommutative, SDNPHasChain]>;570def X86any_Fnmsub : PatFrags<(ops node:$src1, node:$src2, node:$src3),571 [(X86strict_Fnmsub node:$src1, node:$src2, node:$src3),572 (X86Fnmsub node:$src1, node:$src2, node:$src3)]>;573def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFPTernaryOp, [SDNPCommutative]>;574def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFPTernaryOp, [SDNPCommutative]>;575 576def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound, [SDNPCommutative]>;577def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound, [SDNPCommutative]>;578def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound, [SDNPCommutative]>;579def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound, [SDNPCommutative]>;580def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound, [SDNPCommutative]>;581def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound, [SDNPCommutative]>;582 583def X86vp2intersect : SDNode<"X86ISD::VP2INTERSECT",584 SDTypeProfile<1, 2, [SDTCisVT<0, untyped>,585 SDTCisVec<1>, SDTCisSameAs<1, 2>]>>;586 587def SDTIFma : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<0,1>,588 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;589def x86vpmadd52l : SDNode<"X86ISD::VPMADD52L", SDTIFma, [SDNPCommutative]>;590def x86vpmadd52h : SDNode<"X86ISD::VPMADD52H", SDTIFma, [SDNPCommutative]>;591 592def x86vfmaddc : SDNode<"X86ISD::VFMADDC", SDTFPTernaryOp, [SDNPCommutative]>;593def x86vfmaddcRnd : SDNode<"X86ISD::VFMADDC_RND", SDTFmaRound, [SDNPCommutative]>;594def x86vfcmaddc : SDNode<"X86ISD::VFCMADDC", SDTFPTernaryOp>;595def x86vfcmaddcRnd : SDNode<"X86ISD::VFCMADDC_RND", SDTFmaRound>;596def x86vfmulc : SDNode<"X86ISD::VFMULC", SDTFPBinOp, [SDNPCommutative]>;597def x86vfmulcRnd : SDNode<"X86ISD::VFMULC_RND", SDTFPBinOpRound, [SDNPCommutative]>;598def x86vfcmulc : SDNode<"X86ISD::VFCMULC", SDTFPBinOp>;599def x86vfcmulcRnd : SDNode<"X86ISD::VFCMULC_RND", SDTFPBinOpRound>;600 601def x86vfmaddcSh : SDNode<"X86ISD::VFMADDCSH", SDTFPTernaryOp, [SDNPCommutative]>;602def x86vfcmaddcSh : SDNode<"X86ISD::VFCMADDCSH", SDTFPTernaryOp>;603def x86vfmulcSh : SDNode<"X86ISD::VFMULCSH", SDTFPBinOp, [SDNPCommutative]>;604def x86vfcmulcSh : SDNode<"X86ISD::VFCMULCSH", SDTFPBinOp>;605def x86vfmaddcShRnd : SDNode<"X86ISD::VFMADDCSH_RND", SDTFmaRound, [SDNPCommutative]>;606def x86vfcmaddcShRnd : SDNode<"X86ISD::VFCMADDCSH_RND",SDTFmaRound>;607def x86vfmulcShRnd : SDNode<"X86ISD::VFMULCSH_RND", SDTFPBinOpRound, [SDNPCommutative]>;608def x86vfcmulcShRnd : SDNode<"X86ISD::VFCMULCSH_RND", SDTFPBinOpRound>;609 610def X86rsqrt14 : SDNode<"X86ISD::RSQRT14", SDTFPUnaryOp>;611def X86rcp14 : SDNode<"X86ISD::RCP14", SDTFPUnaryOp>;612 613// VNNI614def SDTVnni : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,615 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;616def X86Vpdpbusd : SDNode<"X86ISD::VPDPBUSD", SDTVnni>;617def X86Vpdpbusds : SDNode<"X86ISD::VPDPBUSDS", SDTVnni>;618def X86Vpdpwssd : SDNode<"X86ISD::VPDPWSSD", SDTVnni>;619def X86Vpdpwssds : SDNode<"X86ISD::VPDPWSSDS", SDTVnni>;620 621def X86rsqrt14s : SDNode<"X86ISD::RSQRT14S", SDTFPBinOp>;622def X86rcp14s : SDNode<"X86ISD::RCP14S", SDTFPBinOp>;623def X86Ranges : SDNode<"X86ISD::VRANGES", SDTFPBinOpImm>;624def X86RndScales : SDNode<"X86ISD::VRNDSCALES", SDTFPBinOpImm>;625def X86Reduces : SDNode<"X86ISD::VREDUCES", SDTFPBinOpImm>;626def X86GetMants : SDNode<"X86ISD::VGETMANTS", SDTFPBinOpImm>;627def X86RangesSAE : SDNode<"X86ISD::VRANGES_SAE", SDTFPBinOpImm>;628def X86RndScalesSAE : SDNode<"X86ISD::VRNDSCALES_SAE", SDTFPBinOpImm>;629def X86ReducesSAE : SDNode<"X86ISD::VREDUCES_SAE", SDTFPBinOpImm>;630def X86GetMantsSAE : SDNode<"X86ISD::VGETMANTS_SAE", SDTFPBinOpImm>;631 632def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 3,633 [SDTCisSameAs<0, 1>, SDTCisVec<1>,634 SDTCisSameAs<0, 2>, SDTCVecEltisVT<3, i1>,635 SDTCisSameNumEltsAs<0, 3>]>, []>;636def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 3,637 [SDTCisSameAs<0, 1>, SDTCisVec<1>,638 SDTCisSameAs<0, 2>, SDTCVecEltisVT<3, i1>,639 SDTCisSameNumEltsAs<0, 3>]>, []>;640 641// vpshufbitqmb642def X86Vpshufbitqmb : SDNode<"X86ISD::VPSHUFBITQMB",643 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,644 SDTCisSameAs<1,2>,645 SDTCVecEltisVT<0,i1>,646 SDTCisSameNumEltsAs<0,1>]>>;647 648def SDTintToFP: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisFP<0>,649 SDTCisSameAs<0,1>, SDTCisInt<2>]>;650def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>,651 SDTCisSameAs<0,1>, SDTCisInt<2>,652 SDTCisVT<3, i32>]>;653 654def SDTFloatToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,655 SDTCisInt<0>, SDTCisFP<1>]>;656def SDTFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,657 SDTCisInt<0>, SDTCisFP<1>,658 SDTCisVT<2, i32>]>;659def SDTSFloatToInt: SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisFP<1>,660 SDTCisVec<1>]>;661def SDTSFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisFP<1>,662 SDTCisVec<1>, SDTCisVT<2, i32>]>;663 664def SDTVintToFP: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,665 SDTCisFP<0>, SDTCisInt<1>]>;666def SDTVintToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,667 SDTCisFP<0>, SDTCisInt<1>,668 SDTCisVT<2, i32>]>;669 670// Scalar671def X86SintToFp : SDNode<"X86ISD::SCALAR_SINT_TO_FP", SDTintToFP>;672def X86SintToFpRnd : SDNode<"X86ISD::SCALAR_SINT_TO_FP_RND", SDTintToFPRound>;673def X86UintToFp : SDNode<"X86ISD::SCALAR_UINT_TO_FP", SDTintToFP>;674def X86UintToFpRnd : SDNode<"X86ISD::SCALAR_UINT_TO_FP_RND", SDTintToFPRound>;675 676def X86cvtts2Int : SDNode<"X86ISD::CVTTS2SI", SDTSFloatToInt>;677def X86cvtts2UInt : SDNode<"X86ISD::CVTTS2UI", SDTSFloatToInt>;678def X86cvtts2IntSAE : SDNode<"X86ISD::CVTTS2SI_SAE", SDTSFloatToInt>;679def X86cvtts2UIntSAE : SDNode<"X86ISD::CVTTS2UI_SAE", SDTSFloatToInt>;680 681def X86cvts2si : SDNode<"X86ISD::CVTS2SI", SDTSFloatToInt>;682def X86cvts2usi : SDNode<"X86ISD::CVTS2UI", SDTSFloatToInt>;683def X86cvts2siRnd : SDNode<"X86ISD::CVTS2SI_RND", SDTSFloatToIntRnd>;684def X86cvts2usiRnd : SDNode<"X86ISD::CVTS2UI_RND", SDTSFloatToIntRnd>;685 686def X86cvttss2Int : SDNode<"X86ISD::CVTTS2SIS", SDTSFloatToInt>;687def X86cvttss2UInt : SDNode<"X86ISD::CVTTS2UIS", SDTSFloatToInt>;688def X86cvttss2IntSAE : SDNode<"X86ISD::CVTTS2SIS_SAE", SDTSFloatToInt>;689def X86cvttss2UIntSAE : SDNode<"X86ISD::CVTTS2UIS_SAE", SDTSFloatToInt>;690 691// Vector with rounding mode692 693// cvtt fp-to-int staff694def X86cvttp2siSAE : SDNode<"X86ISD::CVTTP2SI_SAE", SDTFloatToInt>;695def X86cvttp2uiSAE : SDNode<"X86ISD::CVTTP2UI_SAE", SDTFloatToInt>;696 697def X86VSintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTVintToFPRound>;698def X86VUintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTVintToFPRound>;699 700def X86cvttp2sisSAE : SDNode<"X86ISD::CVTTP2SIS_SAE", SDTFloatToInt>;701def X86cvttp2uisSAE : SDNode<"X86ISD::CVTTP2UIS_SAE", SDTFloatToInt>;702def X86cvttp2sis : SDNode<"X86ISD::CVTTP2SIS", SDTFloatToInt>;703def X86cvttp2uis : SDNode<"X86ISD::CVTTP2UIS", SDTFloatToInt>;704 705// cvt fp-to-int staff706def X86cvtp2IntRnd : SDNode<"X86ISD::CVTP2SI_RND", SDTFloatToIntRnd>;707def X86cvtp2UIntRnd : SDNode<"X86ISD::CVTP2UI_RND", SDTFloatToIntRnd>;708 709// Vector without rounding mode710 711// cvtt fp-to-int staff712def X86cvttp2si : SDNode<"X86ISD::CVTTP2SI", SDTFloatToInt>;713def X86cvttp2ui : SDNode<"X86ISD::CVTTP2UI", SDTFloatToInt>;714def X86strict_cvttp2si : SDNode<"X86ISD::STRICT_CVTTP2SI", SDTFloatToInt, [SDNPHasChain]>;715def X86strict_cvttp2ui : SDNode<"X86ISD::STRICT_CVTTP2UI", SDTFloatToInt, [SDNPHasChain]>;716def X86any_cvttp2si : PatFrags<(ops node:$src),717 [(X86strict_cvttp2si node:$src),718 (X86cvttp2si node:$src)]>;719def X86any_cvttp2ui : PatFrags<(ops node:$src),720 [(X86strict_cvttp2ui node:$src),721 (X86cvttp2ui node:$src)]>;722 723def X86VSintToFP : SDNode<"X86ISD::CVTSI2P", SDTVintToFP>;724def X86VUintToFP : SDNode<"X86ISD::CVTUI2P", SDTVintToFP>;725def X86strict_VSintToFP : SDNode<"X86ISD::STRICT_CVTSI2P", SDTVintToFP, [SDNPHasChain]>;726def X86strict_VUintToFP : SDNode<"X86ISD::STRICT_CVTUI2P", SDTVintToFP, [SDNPHasChain]>;727def X86any_VSintToFP : PatFrags<(ops node:$src),728 [(X86strict_VSintToFP node:$src),729 (X86VSintToFP node:$src)]>;730def X86any_VUintToFP : PatFrags<(ops node:$src),731 [(X86strict_VUintToFP node:$src),732 (X86VUintToFP node:$src)]>;733 734 735// cvt int-to-fp staff736def X86cvtp2Int : SDNode<"X86ISD::CVTP2SI", SDTFloatToInt>;737def X86cvtp2UInt : SDNode<"X86ISD::CVTP2UI", SDTFloatToInt>;738 739 740// Masked versions of above741def SDTMVintToFP: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>,742 SDTCisFP<0>, SDTCisInt<1>,743 SDTCisSameAs<0, 2>,744 SDTCVecEltisVT<3, i1>,745 SDTCisSameNumEltsAs<1, 3>]>;746def SDTMFloatToInt: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>,747 SDTCisInt<0>, SDTCisFP<1>,748 SDTCisSameSizeAs<0, 1>,749 SDTCisSameAs<0, 2>,750 SDTCVecEltisVT<3, i1>,751 SDTCisSameNumEltsAs<1, 3>]>;752 753def X86VMSintToFP : SDNode<"X86ISD::MCVTSI2P", SDTMVintToFP>;754def X86VMUintToFP : SDNode<"X86ISD::MCVTUI2P", SDTMVintToFP>;755 756def X86mcvtp2Int : SDNode<"X86ISD::MCVTP2SI", SDTMFloatToInt>;757def X86mcvtp2UInt : SDNode<"X86ISD::MCVTP2UI", SDTMFloatToInt>;758def X86mcvttp2si : SDNode<"X86ISD::MCVTTP2SI", SDTMFloatToInt>;759def X86mcvttp2ui : SDNode<"X86ISD::MCVTTP2UI", SDTMFloatToInt>;760def X86mcvttp2sis : SDNode<"X86ISD::MCVTTP2SIS", SDTMFloatToInt>;761def X86mcvttp2uis : SDNode<"X86ISD::MCVTTP2UIS", SDTMFloatToInt>;762 763def SDTcvtph2ps : SDTypeProfile<1, 1, [SDTCVecEltisVT<0, f32>,764 SDTCVecEltisVT<1, i16>]>;765def X86cvtph2ps : SDNode<"X86ISD::CVTPH2PS", SDTcvtph2ps>;766def X86strict_cvtph2ps : SDNode<"X86ISD::STRICT_CVTPH2PS", SDTcvtph2ps,767 [SDNPHasChain]>;768def X86any_cvtph2ps : PatFrags<(ops node:$src),769 [(X86strict_cvtph2ps node:$src),770 (X86cvtph2ps node:$src)]>;771 772def X86cvtph2psSAE : SDNode<"X86ISD::CVTPH2PS_SAE", SDTcvtph2ps>;773 774def SDTcvtps2ph : SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i16>,775 SDTCVecEltisVT<1, f32>,776 SDTCisVT<2, i32>]>;777def X86cvtps2ph : SDNode<"X86ISD::CVTPS2PH", SDTcvtps2ph>;778def X86strict_cvtps2ph : SDNode<"X86ISD::STRICT_CVTPS2PH", SDTcvtps2ph,779 [SDNPHasChain]>;780def X86any_cvtps2ph : PatFrags<(ops node:$src1, node:$src2),781 [(X86strict_cvtps2ph node:$src1, node:$src2),782 (X86cvtps2ph node:$src1, node:$src2)]>;783 784def X86cvtps2phSAE : SDNode<"X86ISD::CVTPS2PH_SAE", SDTcvtps2ph>;785 786def SDTmcvtps2ph : SDTypeProfile<1, 4, [SDTCVecEltisVT<0, i16>,787 SDTCVecEltisVT<1, f32>,788 SDTCisVT<2, i32>,789 SDTCisSameAs<0, 3>,790 SDTCVecEltisVT<4, i1>,791 SDTCisSameNumEltsAs<1, 4>]>;792def X86mcvtps2ph : SDNode<"X86ISD::MCVTPS2PH", SDTmcvtps2ph>;793def X86mcvtps2phSAE : SDNode<"X86ISD::MCVTPS2PH_SAE", SDTmcvtps2ph>;794 795def X86vfpextSAE : SDNode<"X86ISD::VFPEXT_SAE",796 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>,797 SDTCisFP<1>, SDTCisVec<1>,798 SDTCisOpSmallerThanOp<1, 0>]>>;799def X86vfproundRnd: SDNode<"X86ISD::VFPROUND_RND",800 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>,801 SDTCisFP<1>, SDTCisVec<1>,802 SDTCisOpSmallerThanOp<0, 1>,803 SDTCisVT<2, i32>]>>;804 805def X86vminmax : SDNode<"X86ISD::VMINMAX", SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,806 SDTCisSameAs<0,2>, SDTCisInt<3>]>>;807def X86vminmaxSae : SDNode<"X86ISD::VMINMAX_SAE", SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,808 SDTCisSameAs<0,2>, SDTCisInt<3>]>>;809 810def X86vminmaxs : SDNode<"X86ISD::VMINMAXS", SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,811 SDTCisSameAs<0,2>, SDTCisInt<3>]>>;812def X86vminmaxsSae : SDNode<"X86ISD::VMINMAXS_SAE", SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,813 SDTCisSameAs<0,2>, SDTCisInt<3>]>>;814 815// cvt fp to bfloat16816def X86mcvtneps2bf16 : SDNode<"X86ISD::MCVTNEPS2BF16",817 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, bf16>,818 SDTCVecEltisVT<1, f32>,819 SDTCisSameAs<0, 2>,820 SDTCVecEltisVT<3, i1>,821 SDTCisSameNumEltsAs<1, 3>]>>;822def X86cvtneps2bf16 : SDNode<"X86ISD::CVTNEPS2BF16",823 SDTypeProfile<1, 1, [SDTCVecEltisVT<0, bf16>,824 SDTCVecEltisVT<1, f32>]>>;825def X86dpbf16ps : SDNode<"X86ISD::DPBF16PS",826 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, f32>,827 SDTCisSameAs<0,1>,828 SDTCVecEltisVT<2, bf16>,829 SDTCisSameAs<2,3>]>>;830def X86dpfp16ps : SDNode<"X86ISD::DPFP16PS",831 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, f32>,832 SDTCisSameAs<0,1>,833 SDTCVecEltisVT<2, f16>,834 SDTCisSameAs<2,3>]>>;835 836// galois field arithmetic837def X86GF2P8affineinvqb : SDNode<"X86ISD::GF2P8AFFINEINVQB", SDTBlend>;838def X86GF2P8affineqb : SDNode<"X86ISD::GF2P8AFFINEQB", SDTBlend>;839def X86GF2P8mulb : SDNode<"X86ISD::GF2P8MULB", SDTIntBinOp>;840 841def SDTX86MaskedStore: SDTypeProfile<0, 3, [ // masked store842 SDTCisVec<0>, SDTCisPtrTy<1>, SDTCisVec<2>, SDTCisSameNumEltsAs<0, 2>843]>;844 845def X86vpdpbssd : SDNode<"X86ISD::VPDPBSSD", SDTVnni>;846def X86vpdpbssds : SDNode<"X86ISD::VPDPBSSDS", SDTVnni>;847def X86vpdpbsud : SDNode<"X86ISD::VPDPBSUD", SDTVnni>;848def X86vpdpbsuds : SDNode<"X86ISD::VPDPBSUDS", SDTVnni>;849def X86vpdpbuud : SDNode<"X86ISD::VPDPBUUD", SDTVnni>;850def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;851 852def X86vpdpwsud : SDNode<"X86ISD::VPDPWSUD", SDTVnni>;853def X86vpdpwsuds : SDNode<"X86ISD::VPDPWSUDS", SDTVnni>;854def X86vpdpwusd : SDNode<"X86ISD::VPDPWUSD", SDTVnni>;855def X86vpdpwusds : SDNode<"X86ISD::VPDPWUSDS", SDTVnni>;856def X86vpdpwuud : SDNode<"X86ISD::VPDPWUUD", SDTVnni>;857def X86vpdpwuuds : SDNode<"X86ISD::VPDPWUUDS", SDTVnni>;858 859def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;860 861// in place saturated cvt fp-to-int862def X86vcvtp2ibs : SDNode<"X86ISD::CVTP2IBS", SDTFloatToInt>;863def X86vcvtp2iubs : SDNode<"X86ISD::CVTP2IUBS", SDTFloatToInt>;864 865def X86vcvtp2ibsRnd : SDNode<"X86ISD::CVTP2IBS_RND", SDTFloatToIntRnd>;866def X86vcvtp2iubsRnd : SDNode<"X86ISD::CVTP2IUBS_RND", SDTFloatToIntRnd>;867 868// in place saturated cvtt fp-to-int staff869def X86vcvttp2ibs : SDNode<"X86ISD::CVTTP2IBS", SDTFloatToInt>;870def X86vcvttp2iubs : SDNode<"X86ISD::CVTTP2IUBS", SDTFloatToInt>;871 872def X86vcvttp2ibsSAE : SDNode<"X86ISD::CVTTP2IBS_SAE", SDTFloatToInt>;873def X86vcvttp2iubsSAE : SDNode<"X86ISD::CVTTP2IUBS_SAE", SDTFloatToInt>;874 875def SDTAVX10CONVERT_I82F16 : SDTypeProfile<1, 2, [876 SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, f16>, SDTCisSameAs<1, 2>877]>;878 879def SDTAVX10CONVERT_F16I8 : SDTypeProfile<1, 1, [880 SDTCVecEltisVT<0, f16>, SDTCVecEltisVT<1, i8>881]>;882 883def SDTAVX10CONVERT_I8F16 : SDTypeProfile<1, 1, [884 SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, f16>885]>;886 887def SDTAVX10CONVERT_I8F16_MASK : SDTypeProfile<1, 3, [888 SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, f16>,889 SDTCisSameAs<0, 2>, SDTCVecEltisVT<3, i1>,890 SDTCisSameNumEltsAs<1, 3>891]>;892 893def SDTAVX10CONVERT_2I8F16 : SDTypeProfile<1, 2, [894 SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, i8>, SDTCVecEltisVT<2, f16>895]>;896 897def SDTAVX10CONVERT_2I8F16_MASK : SDTypeProfile<1, 4, [898 SDTCVecEltisVT<0, i8>, SDTCisSameAs<0, 1>,899 SDTCVecEltisVT<2, f16>, SDTCisSameAs<0, 3>, SDTCVecEltisVT<4, i1>,900 SDTCisSameNumEltsAs<2, 4>901]>;902 903def X86vfpround2Rnd : SDNode<"X86ISD::VFPROUND2_RND",904 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, f16>,905 SDTCVecEltisVT<1, f32>,906 SDTCisSameAs<1, 2>,907 SDTCisVT<3, i32>]>>;908// 3op909def X86vcvt2ph2bf8 : SDNode<"X86ISD::VCVT2PH2BF8",910 SDTAVX10CONVERT_I82F16>;911def X86vcvt2ph2bf8s : SDNode<"X86ISD::VCVT2PH2BF8S",912 SDTAVX10CONVERT_I82F16>;913def X86vcvt2ph2hf8 : SDNode<"X86ISD::VCVT2PH2HF8",914 SDTAVX10CONVERT_I82F16>;915def X86vcvt2ph2hf8s : SDNode<"X86ISD::VCVT2PH2HF8S",916 SDTAVX10CONVERT_I82F16>;917// 2op no broadcast918def X86vcvthf82ph : SDNode<"X86ISD::VCVTHF82PH",919 SDTAVX10CONVERT_F16I8>;920// 2op921def X86vcvtbiasph2bf8 : SDNode<"X86ISD::VCVTBIASPH2BF8",922 SDTAVX10CONVERT_2I8F16>;923def X86vcvtbiasph2bf8s : SDNode<"X86ISD::VCVTBIASPH2BF8S",924 SDTAVX10CONVERT_2I8F16>;925def X86vcvtbiasph2hf8 : SDNode<"X86ISD::VCVTBIASPH2HF8",926 SDTAVX10CONVERT_2I8F16>;927def X86vcvtbiasph2hf8s : SDNode<"X86ISD::VCVTBIASPH2HF8S",928 SDTAVX10CONVERT_2I8F16>;929def X86vcvtph2bf8 : SDNode<"X86ISD::VCVTPH2BF8",930 SDTAVX10CONVERT_I8F16>;931def X86vcvtph2bf8s : SDNode<"X86ISD::VCVTPH2BF8S",932 SDTAVX10CONVERT_I8F16>;933def X86vcvtph2hf8 : SDNode<"X86ISD::VCVTPH2HF8",934 SDTAVX10CONVERT_I8F16>;935def X86vcvtph2hf8s : SDNode<"X86ISD::VCVTPH2HF8S",936 SDTAVX10CONVERT_I8F16>;937 938def X86vmcvtbiasph2bf8 : SDNode<"X86ISD::VMCVTBIASPH2BF8",939 SDTAVX10CONVERT_2I8F16_MASK>;940def X86vmcvtbiasph2bf8s : SDNode<"X86ISD::VMCVTBIASPH2BF8S",941 SDTAVX10CONVERT_2I8F16_MASK>;942def X86vmcvtbiasph2hf8 : SDNode<"X86ISD::VMCVTBIASPH2HF8",943 SDTAVX10CONVERT_2I8F16_MASK>;944def X86vmcvtbiasph2hf8s : SDNode<"X86ISD::VMCVTBIASPH2HF8S",945 SDTAVX10CONVERT_2I8F16_MASK>;946def X86vmcvtph2bf8 : SDNode<"X86ISD::VMCVTPH2BF8",947 SDTAVX10CONVERT_I8F16_MASK>;948def X86vmcvtph2bf8s : SDNode<"X86ISD::VMCVTPH2BF8S",949 SDTAVX10CONVERT_I8F16_MASK>;950def X86vmcvtph2hf8 : SDNode<"X86ISD::VMCVTPH2HF8",951 SDTAVX10CONVERT_I8F16_MASK>;952def X86vmcvtph2hf8s : SDNode<"X86ISD::VMCVTPH2HF8S",953 SDTAVX10CONVERT_I8F16_MASK>;954 955//===----------------------------------------------------------------------===//956// SSE pattern fragments957//===----------------------------------------------------------------------===//958 959// 128-bit load pattern fragments960def loadv8f16 : PatFrag<(ops node:$ptr), (v8f16 (load node:$ptr))>;961def loadv8bf16 : PatFrag<(ops node:$ptr), (v8bf16 (load node:$ptr))>;962def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;963def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;964def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;965def loadv4i32 : PatFrag<(ops node:$ptr), (v4i32 (load node:$ptr))>;966def loadv8i16 : PatFrag<(ops node:$ptr), (v8i16 (load node:$ptr))>;967def loadv16i8 : PatFrag<(ops node:$ptr), (v16i8 (load node:$ptr))>;968 969// 256-bit load pattern fragments970def loadv16f16 : PatFrag<(ops node:$ptr), (v16f16 (load node:$ptr))>;971def loadv16bf16 : PatFrag<(ops node:$ptr), (v16bf16 (load node:$ptr))>;972def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;973def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;974def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;975def loadv8i32 : PatFrag<(ops node:$ptr), (v8i32 (load node:$ptr))>;976def loadv16i16 : PatFrag<(ops node:$ptr), (v16i16 (load node:$ptr))>;977def loadv32i8 : PatFrag<(ops node:$ptr), (v32i8 (load node:$ptr))>;978 979// 512-bit load pattern fragments980def loadv32f16 : PatFrag<(ops node:$ptr), (v32f16 (load node:$ptr))>;981def loadv32bf16 : PatFrag<(ops node:$ptr), (v32bf16 (load node:$ptr))>;982def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;983def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;984def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;985def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;986def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;987def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;988 989// 128-/256-/512-bit extload pattern fragments990def extloadv2f32 : PatFrag<(ops node:$ptr), (extloadvf32 node:$ptr)>;991def extloadv4f32 : PatFrag<(ops node:$ptr), (extloadvf32 node:$ptr)>;992def extloadv8f32 : PatFrag<(ops node:$ptr), (extloadvf32 node:$ptr)>;993def extloadv2f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>;994def extloadv4f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>;995def extloadv8f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>;996def extloadv16f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>;997 998// Like 'store', but always requires vector size alignment.999def alignedstore : PatFrag<(ops node:$val, node:$ptr),1000 (store node:$val, node:$ptr), [{1001 auto *St = cast<StoreSDNode>(N);1002 return St->getAlign() >= St->getMemoryVT().getStoreSize();1003}]> {1004 let GISelPredicateCode = [{1005 auto &LdSt = cast<GLoadStore>(MI);1006 return LdSt.getAlign() >= LdSt.getMemSize().getValue();1007 }];1008}1009 1010// Like 'load', but always requires vector size alignment.1011def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{1012 auto *Ld = cast<LoadSDNode>(N);1013 return Ld->getAlign() >= Ld->getMemoryVT().getStoreSize();1014}]> {1015 let GISelPredicateCode = [{1016 auto &LdSt = cast<GLoadStore>(MI);1017 return LdSt.getAlign() >= LdSt.getMemSize().getValue();1018 }];1019}1020 1021// 128-bit aligned load pattern fragments1022// NOTE: all 128-bit integer vector loads are promoted to v2i641023def alignedloadv8f16 : PatFrag<(ops node:$ptr),1024 (v8f16 (alignedload node:$ptr))>;1025def alignedloadv8bf16 : PatFrag<(ops node:$ptr),1026 (v8bf16 (alignedload node:$ptr))>;1027def alignedloadv4f32 : PatFrag<(ops node:$ptr),1028 (v4f32 (alignedload node:$ptr))>;1029def alignedloadv2f64 : PatFrag<(ops node:$ptr),1030 (v2f64 (alignedload node:$ptr))>;1031def alignedloadv2i64 : PatFrag<(ops node:$ptr),1032 (v2i64 (alignedload node:$ptr))>;1033def alignedloadv4i32 : PatFrag<(ops node:$ptr),1034 (v4i32 (alignedload node:$ptr))>;1035def alignedloadv8i16 : PatFrag<(ops node:$ptr),1036 (v8i16 (alignedload node:$ptr))>;1037def alignedloadv16i8 : PatFrag<(ops node:$ptr),1038 (v16i8 (alignedload node:$ptr))>;1039 1040// 256-bit aligned load pattern fragments1041// NOTE: all 256-bit integer vector loads are promoted to v4i641042def alignedloadv16f16 : PatFrag<(ops node:$ptr),1043 (v16f16 (alignedload node:$ptr))>;1044def alignedloadv16bf16 : PatFrag<(ops node:$ptr),1045 (v16bf16 (alignedload node:$ptr))>;1046def alignedloadv8f32 : PatFrag<(ops node:$ptr),1047 (v8f32 (alignedload node:$ptr))>;1048def alignedloadv4f64 : PatFrag<(ops node:$ptr),1049 (v4f64 (alignedload node:$ptr))>;1050def alignedloadv4i64 : PatFrag<(ops node:$ptr),1051 (v4i64 (alignedload node:$ptr))>;1052def alignedloadv8i32 : PatFrag<(ops node:$ptr),1053 (v8i32 (alignedload node:$ptr))>;1054def alignedloadv16i16 : PatFrag<(ops node:$ptr),1055 (v16i16 (alignedload node:$ptr))>;1056def alignedloadv32i8 : PatFrag<(ops node:$ptr),1057 (v32i8 (alignedload node:$ptr))>;1058 1059// 512-bit aligned load pattern fragments1060def alignedloadv32f16 : PatFrag<(ops node:$ptr),1061 (v32f16 (alignedload node:$ptr))>;1062def alignedloadv32bf16 : PatFrag<(ops node:$ptr),1063 (v32bf16 (alignedload node:$ptr))>;1064def alignedloadv16f32 : PatFrag<(ops node:$ptr),1065 (v16f32 (alignedload node:$ptr))>;1066def alignedloadv8f64 : PatFrag<(ops node:$ptr),1067 (v8f64 (alignedload node:$ptr))>;1068def alignedloadv8i64 : PatFrag<(ops node:$ptr),1069 (v8i64 (alignedload node:$ptr))>;1070def alignedloadv16i32 : PatFrag<(ops node:$ptr),1071 (v16i32 (alignedload node:$ptr))>;1072def alignedloadv32i16 : PatFrag<(ops node:$ptr),1073 (v32i16 (alignedload node:$ptr))>;1074def alignedloadv64i8 : PatFrag<(ops node:$ptr),1075 (v64i8 (alignedload node:$ptr))>;1076 1077// Like 'load', but uses special alignment checks suitable for use in1078// memory operands in most SSE instructions, which are required to1079// be naturally aligned on some targets but not on others. If the subtarget1080// allows unaligned accesses, match any load, though this may require1081// setting a feature bit in the processor (on startup, for example).1082// Opteron 10h and later implement such a feature.1083def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{1084 auto *Ld = cast<LoadSDNode>(N);1085 return Subtarget->hasSSEUnalignedMem() ||1086 Ld->getAlign() >= Ld->getMemoryVT().getStoreSize();1087}]>;1088 1089// 128-bit memop pattern fragments1090// NOTE: all 128-bit integer vector loads are promoted to v2i641091def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;1092def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;1093def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;1094def memopv4i32 : PatFrag<(ops node:$ptr), (v4i32 (memop node:$ptr))>;1095def memopv8i16 : PatFrag<(ops node:$ptr), (v8i16 (memop node:$ptr))>;1096def memopv16i8 : PatFrag<(ops node:$ptr), (v16i8 (memop node:$ptr))>;1097 1098// 128-bit bitconvert pattern fragments1099def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;1100def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;1101def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;1102def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;1103def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;1104def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;1105 1106// 256-bit bitconvert pattern fragments1107def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;1108def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;1109def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;1110def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;1111def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;1112def bc_v4f64 : PatFrag<(ops node:$in), (v4f64 (bitconvert node:$in))>;1113 1114// 512-bit bitconvert pattern fragments1115def bc_v64i8 : PatFrag<(ops node:$in), (v64i8 (bitconvert node:$in))>;1116def bc_v32i16 : PatFrag<(ops node:$in), (v32i16 (bitconvert node:$in))>;1117def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;1118def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;1119def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;1120def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;1121 1122def X86vzload16 : PatFrag<(ops node:$src),1123 (X86vzld node:$src), [{1124 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2;1125}]>;1126 1127def X86vzload32 : PatFrag<(ops node:$src),1128 (X86vzld node:$src), [{1129 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4;1130}]>;1131 1132def X86vzload64 : PatFrag<(ops node:$src),1133 (X86vzld node:$src), [{1134 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;1135}]>;1136 1137def X86vextractstore64 : PatFrag<(ops node:$val, node:$ptr),1138 (X86vextractst node:$val, node:$ptr), [{1139 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;1140}]>;1141 1142def X86VBroadcastld8 : PatFrag<(ops node:$src),1143 (X86VBroadcastld node:$src), [{1144 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 1;1145}]>;1146 1147def X86VBroadcastld16 : PatFrag<(ops node:$src),1148 (X86VBroadcastld node:$src), [{1149 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2;1150}]>;1151 1152def X86VBroadcastld32 : PatFrag<(ops node:$src),1153 (X86VBroadcastld node:$src), [{1154 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4;1155}]>;1156 1157def X86VBroadcastld64 : PatFrag<(ops node:$src),1158 (X86VBroadcastld node:$src), [{1159 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;1160}]>;1161 1162def X86SubVBroadcastld128 : PatFrag<(ops node:$src),1163 (X86SubVBroadcastld node:$src), [{1164 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 16;1165}]>;1166 1167def X86SubVBroadcastld256 : PatFrag<(ops node:$src),1168 (X86SubVBroadcastld node:$src), [{1169 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 32;1170}]>;1171 1172// Scalar SSE intrinsic fragments to match several different types of loads.1173// Used by scalar SSE intrinsic instructions which have 128 bit types, but1174// only load a single element.1175// FIXME: We should add more canolicalizing in DAGCombine. Particulary removing1176// the simple_load case.1177def sse_load_bf16 : PatFrags<(ops node:$ptr),1178 [(v8bf16 (simple_load node:$ptr)),1179 (v8bf16 (X86vzload16 node:$ptr)),1180 (v8bf16 (scalar_to_vector (loadf16 node:$ptr)))]>;1181def sse_load_f16 : PatFrags<(ops node:$ptr),1182 [(v8f16 (simple_load node:$ptr)),1183 (v8f16 (X86vzload16 node:$ptr)),1184 (v8f16 (scalar_to_vector (loadf16 node:$ptr)))]>;1185def sse_load_f32 : PatFrags<(ops node:$ptr),1186 [(v4f32 (simple_load node:$ptr)),1187 (v4f32 (X86vzload32 node:$ptr)),1188 (v4f32 (scalar_to_vector (loadf32 node:$ptr)))]>;1189def sse_load_f64 : PatFrags<(ops node:$ptr),1190 [(v2f64 (simple_load node:$ptr)),1191 (v2f64 (X86vzload64 node:$ptr)),1192 (v2f64 (scalar_to_vector (loadf64 node:$ptr)))]>;1193 1194def fp16imm0 : PatLeaf<(f16 fpimm), [{1195 return N->isExactlyValue(+0.0);1196}]>;1197 1198def fp32imm0 : PatLeaf<(f32 fpimm), [{1199 return N->isExactlyValue(+0.0);1200}]>;1201 1202def fp64imm0 : PatLeaf<(f64 fpimm), [{1203 return N->isExactlyValue(+0.0);1204}]>;1205 1206def fp128imm0 : PatLeaf<(f128 fpimm), [{1207 return N->isExactlyValue(+0.0);1208}]>;1209 1210// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index1211// to VEXTRACTF128/VEXTRACTI128 imm.1212def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{1213 return getExtractVEXTRACTImmediate(N, 128, SDLoc(N));1214}]>;1215 1216// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to1217// VINSERTF128/VINSERTI128 imm.1218def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{1219 return getInsertVINSERTImmediate(N, 128, SDLoc(N));1220}]>;1221 1222// INSERT_get_vperm2x128_imm xform function: convert insert_subvector index to1223// commuted VPERM2F128/VPERM2I128 imm.1224def INSERT_get_vperm2x128_commutedimm : SDNodeXForm<insert_subvector, [{1225 return getPermuteVINSERTCommutedImmediate(N, 128, SDLoc(N));1226}]>;1227 1228// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index1229// to VEXTRACTF64x4 imm.1230def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{1231 return getExtractVEXTRACTImmediate(N, 256, SDLoc(N));1232}]>;1233 1234// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to1235// VINSERTF64x4 imm.1236def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{1237 return getInsertVINSERTImmediate(N, 256, SDLoc(N));1238}]>;1239 1240def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),1241 (extract_subvector node:$bigvec,1242 node:$index), [{1243 // Index 0 can be handled via extract_subreg.1244 return !isNullConstant(N->getOperand(1));1245}], EXTRACT_get_vextract128_imm>;1246 1247def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,1248 node:$index),1249 (insert_subvector node:$bigvec, node:$smallvec,1250 node:$index), [{}],1251 INSERT_get_vinsert128_imm>;1252 1253def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),1254 (extract_subvector node:$bigvec,1255 node:$index), [{1256 // Index 0 can be handled via extract_subreg.1257 return !isNullConstant(N->getOperand(1));1258}], EXTRACT_get_vextract256_imm>;1259 1260def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,1261 node:$index),1262 (insert_subvector node:$bigvec, node:$smallvec,1263 node:$index), [{}],1264 INSERT_get_vinsert256_imm>;1265 1266def masked_load : PatFrag<(ops node:$src1, node:$src2, node:$src3),1267 (masked_ld node:$src1, undef, node:$src2, node:$src3), [{1268 return !cast<MaskedLoadSDNode>(N)->isExpandingLoad() &&1269 cast<MaskedLoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD &&1270 cast<MaskedLoadSDNode>(N)->isUnindexed();1271}]>;1272 1273def masked_load_aligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),1274 (masked_load node:$src1, node:$src2, node:$src3), [{1275 // Use the node type to determine the size the alignment needs to match.1276 // We can't use memory VT because type widening changes the node VT, but1277 // not the memory VT.1278 auto *Ld = cast<MaskedLoadSDNode>(N);1279 return Ld->getAlign() >= Ld->getValueType(0).getStoreSize();1280}]>;1281 1282def X86mExpandingLoad : PatFrag<(ops node:$src1, node:$src2, node:$src3),1283 (masked_ld node:$src1, undef, node:$src2, node:$src3), [{1284 return cast<MaskedLoadSDNode>(N)->isExpandingLoad() &&1285 cast<MaskedLoadSDNode>(N)->isUnindexed();1286}]>;1287 1288// Masked store fragments.1289// X86mstore can't be implemented in core DAG files because some targets1290// do not support vector types (llvm-tblgen will fail).1291def masked_store : PatFrag<(ops node:$src1, node:$src2, node:$src3),1292 (masked_st node:$src1, node:$src2, undef, node:$src3), [{1293 return !cast<MaskedStoreSDNode>(N)->isTruncatingStore() &&1294 !cast<MaskedStoreSDNode>(N)->isCompressingStore() &&1295 cast<MaskedStoreSDNode>(N)->isUnindexed();1296}]>;1297 1298def masked_store_aligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),1299 (masked_store node:$src1, node:$src2, node:$src3), [{1300 // Use the node type to determine the size the alignment needs to match.1301 // We can't use memory VT because type widening changes the node VT, but1302 // not the memory VT.1303 auto *St = cast<MaskedStoreSDNode>(N);1304 return St->getAlign() >= St->getOperand(1).getValueType().getStoreSize();1305}]>;1306 1307def X86mCompressingStore : PatFrag<(ops node:$src1, node:$src2, node:$src3),1308 (masked_st node:$src1, node:$src2, undef, node:$src3), [{1309 return cast<MaskedStoreSDNode>(N)->isCompressingStore() &&1310 cast<MaskedStoreSDNode>(N)->isUnindexed();1311}]>;1312 1313// masked truncstore fragments1314// X86mtruncstore can't be implemented in core DAG files because some targets1315// doesn't support vector type ( llvm-tblgen will fail)1316def X86mtruncstore : PatFrag<(ops node:$src1, node:$src2, node:$src3),1317 (masked_st node:$src1, node:$src2, undef, node:$src3), [{1318 return cast<MaskedStoreSDNode>(N)->isTruncatingStore() &&1319 cast<MaskedStoreSDNode>(N)->isUnindexed();1320}]>;1321def masked_truncstorevi8 :1322 PatFrag<(ops node:$src1, node:$src2, node:$src3),1323 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{1324 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;1325}]>;1326def masked_truncstorevi16 :1327 PatFrag<(ops node:$src1, node:$src2, node:$src3),1328 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{1329 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;1330}]>;1331def masked_truncstorevi32 :1332 PatFrag<(ops node:$src1, node:$src2, node:$src3),1333 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{1334 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;1335}]>;1336 1337def X86TruncSStore : SDNode<"X86ISD::VTRUNCSTORES", SDTStore,1338 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;1339 1340def X86TruncUSStore : SDNode<"X86ISD::VTRUNCSTOREUS", SDTStore,1341 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;1342 1343def X86MTruncSStore : SDNode<"X86ISD::VMTRUNCSTORES", SDTX86MaskedStore,1344 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;1345 1346def X86MTruncUSStore : SDNode<"X86ISD::VMTRUNCSTOREUS", SDTX86MaskedStore,1347 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;1348 1349def truncstore_s_vi8 : PatFrag<(ops node:$val, node:$ptr),1350 (X86TruncSStore node:$val, node:$ptr), [{1351 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;1352}]>;1353 1354def truncstore_us_vi8 : PatFrag<(ops node:$val, node:$ptr),1355 (X86TruncUSStore node:$val, node:$ptr), [{1356 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;1357}]>;1358 1359def truncstore_s_vi16 : PatFrag<(ops node:$val, node:$ptr),1360 (X86TruncSStore node:$val, node:$ptr), [{1361 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;1362}]>;1363 1364def truncstore_us_vi16 : PatFrag<(ops node:$val, node:$ptr),1365 (X86TruncUSStore node:$val, node:$ptr), [{1366 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;1367}]>;1368 1369def truncstore_s_vi32 : PatFrag<(ops node:$val, node:$ptr),1370 (X86TruncSStore node:$val, node:$ptr), [{1371 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;1372}]>;1373 1374def truncstore_us_vi32 : PatFrag<(ops node:$val, node:$ptr),1375 (X86TruncUSStore node:$val, node:$ptr), [{1376 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;1377}]>;1378 1379def masked_truncstore_s_vi8 : PatFrag<(ops node:$src1, node:$src2, node:$src3),1380 (X86MTruncSStore node:$src1, node:$src2, node:$src3), [{1381 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;1382}]>;1383 1384def masked_truncstore_us_vi8 : PatFrag<(ops node:$src1, node:$src2, node:$src3),1385 (X86MTruncUSStore node:$src1, node:$src2, node:$src3), [{1386 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;1387}]>;1388 1389def masked_truncstore_s_vi16 : PatFrag<(ops node:$src1, node:$src2, node:$src3),1390 (X86MTruncSStore node:$src1, node:$src2, node:$src3), [{1391 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;1392}]>;1393 1394def masked_truncstore_us_vi16 : PatFrag<(ops node:$src1, node:$src2, node:$src3),1395 (X86MTruncUSStore node:$src1, node:$src2, node:$src3), [{1396 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;1397}]>;1398 1399def masked_truncstore_s_vi32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),1400 (X86MTruncSStore node:$src1, node:$src2, node:$src3), [{1401 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;1402}]>;1403 1404def masked_truncstore_us_vi32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),1405 (X86MTruncUSStore node:$src1, node:$src2, node:$src3), [{1406 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;1407}]>;1408 1409def X86Vfpclasss_su : PatFrag<(ops node:$src1, node:$src2),1410 (X86Vfpclasss node:$src1, node:$src2), [{1411 return N->hasOneUse();1412}]>;1413 1414def X86Vfpclass_su : PatFrag<(ops node:$src1, node:$src2),1415 (X86Vfpclass node:$src1, node:$src2), [{1416 return N->hasOneUse();1417}]>;1418 1419// These nodes use 'vnot' instead of 'not' to support vectors.1420def vandn : PatFrag<(ops node:$i0, node:$i1), (and (vnot node:$i0), node:$i1)>;1421def vxnor : PatFrag<(ops node:$i0, node:$i1), (vnot (xor node:$i0, node:$i1))>;1422 1423// Used for matching masked operations. Ensures the operation part only has a1424// single use.1425def vselect_mask : PatFrag<(ops node:$mask, node:$src1, node:$src2),1426 (vselect node:$mask, node:$src1, node:$src2), [{1427 return isProfitableToFormMaskedOp(N);1428}]>;1429 1430def X86selects_mask : PatFrag<(ops node:$mask, node:$src1, node:$src2),1431 (X86selects node:$mask, node:$src1, node:$src2), [{1432 return isProfitableToFormMaskedOp(N);1433}]>;1434 1435def X86cmpms_su : PatFrag<(ops node:$src1, node:$src2, node:$cc),1436 (X86cmpms node:$src1, node:$src2, node:$cc), [{1437 return N->hasOneUse();1438}]>;1439def X86cmpmsSAE_su : PatFrag<(ops node:$src1, node:$src2, node:$cc),1440 (X86cmpmsSAE node:$src1, node:$src2, node:$cc), [{1441 return N->hasOneUse();1442}]>;1443 1444// PatFrags that contain a select and a truncate op. The take operands in the1445// same order as X86vmtrunc, X86vmtruncs, X86vmtruncus. This allows us to pass1446// either to the multiclasses.1447def select_trunc : PatFrag<(ops node:$src, node:$src0, node:$mask),1448 (vselect_mask node:$mask,1449 (trunc node:$src), node:$src0)>;1450def select_truncs : PatFrag<(ops node:$src, node:$src0, node:$mask),1451 (vselect_mask node:$mask,1452 (X86vtruncs node:$src), node:$src0)>;1453def select_truncus : PatFrag<(ops node:$src, node:$src0, node:$mask),1454 (vselect_mask node:$mask,1455 (X86vtruncus node:$src), node:$src0)>;1456 1457def X86Vpshufbitqmb_su : PatFrag<(ops node:$src1, node:$src2),1458 (X86Vpshufbitqmb node:$src1, node:$src2), [{1459 return N->hasOneUse();1460}]>;1461 1462def X86pcmpgtm : PatFrag<(ops node:$src1, node:$src2),1463 (setcc node:$src1, node:$src2, SETGT)>;1464 1465def X86pcmpm_imm : SDNodeXForm<setcc, [{1466 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();1467 uint8_t SSECC = X86::getVPCMPImmForCond(CC);1468 return getI8Imm(SSECC, SDLoc(N));1469}]>;1470 1471// Swapped operand version of the above.1472def X86pcmpm_imm_commute : SDNodeXForm<setcc, [{1473 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();1474 uint8_t SSECC = X86::getVPCMPImmForCond(CC);1475 SSECC = X86::getSwappedVPCMPImm(SSECC);1476 return getI8Imm(SSECC, SDLoc(N));1477}]>;1478 1479def X86pcmpm : PatFrag<(ops node:$src1, node:$src2, node:$cc),1480 (setcc node:$src1, node:$src2, node:$cc), [{1481 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();1482 return !ISD::isUnsignedIntSetCC(CC);1483}], X86pcmpm_imm>;1484 1485def X86pcmpm_su : PatFrag<(ops node:$src1, node:$src2, node:$cc),1486 (setcc node:$src1, node:$src2, node:$cc), [{1487 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();1488 return N->hasOneUse() && !ISD::isUnsignedIntSetCC(CC);1489}], X86pcmpm_imm>;1490 1491def X86pcmpum : PatFrag<(ops node:$src1, node:$src2, node:$cc),1492 (setcc node:$src1, node:$src2, node:$cc), [{1493 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();1494 return ISD::isUnsignedIntSetCC(CC);1495}], X86pcmpm_imm>;1496 1497def X86pcmpum_su : PatFrag<(ops node:$src1, node:$src2, node:$cc),1498 (setcc node:$src1, node:$src2, node:$cc), [{1499 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();1500 return N->hasOneUse() && ISD::isUnsignedIntSetCC(CC);1501}], X86pcmpm_imm>;1502 1503def X86cmpm_su : PatFrag<(ops node:$src1, node:$src2, node:$cc),1504 (X86cmpm node:$src1, node:$src2, node:$cc), [{1505 return N->hasOneUse();1506}]>;1507 1508def X86cmpm_imm_commute : SDNodeXForm<timm, [{1509 uint8_t Imm = X86::getSwappedVCMPImm(N->getZExtValue() & 0x1f);1510 return getI8Imm(Imm, SDLoc(N));1511}]>;1512 1513def X86vpmaddwd_su : PatFrag<(ops node:$lhs, node:$rhs),1514 (X86vpmaddwd node:$lhs, node:$rhs), [{1515 return N->hasOneUse();1516}]>;1517 1518