266 lines · plain
1//===---X86InstrPredicates.td - X86 Predicate Definitions --*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9def TruePredicate : Predicate<"true">;10 11// Intel x86 instructions have three separate encoding spaces: legacy, VEX, and12// EVEX. Not all X86 instructions are extended for EGPR. The following is an13// overview of which instructions are extended and how we implement them.14//15// * Legacy space16// All instructions in legacy maps 0 and 1 that have explicit GPR or memory17// operands can use the REX2 prefix to access the EGPR, except XSAVE*/XRSTOR.18//19// * EVEX space20// All instructions in the EVEX space can access the EGPR in their21// register/memory operands.22//23// For the above intructions, the only difference in encoding is reflected in24// the REX2/EVEX prefix when EGPR is used, i.e. the opcode and opcode name are25// unchanged. We don’t add new entries in TD, and instead we extend GPR with26// R16-R31 and make them allocatable only when the feature EGPR is available.27//28// Besides, some instructions in legacy space with map 2/3 and VEX space are29// promoted into EVEX space. Encoding space changes after the promotion, opcode30// and opcode map may change too sometimes. For these instructions, we add new31// entries in TD to avoid overcomplicating the assembler and disassembler.32//33// HasEGPR is for the new entries and NoEGPR is for the entries before34// promotion, so that the promoted variant can be selected first to benefit RA.35def HasEGPR : Predicate<"Subtarget->hasEGPR()">;36def NoEGPR : Predicate<"!Subtarget->hasEGPR()">;37 38// APX extends some instructions with a new form that has an extra register39// operand called a new data destination (NDD). In such forms, NDD is the new40// destination register receiving the result of the computation and all other41// operands (including the original destination operand) become read-only source42// operands.43//44// HasNDD is for the new NDD entries and NoNDD is for the legacy 2-address45// entries, so that the NDD variant can be selected first to benefit RA.46def HasNDD : Predicate<"Subtarget->hasNDD()">;47def NoNDD : Predicate<"!Subtarget->hasNDD()">;48def HasZU : Predicate<"Subtarget->hasZU()">;49def HasCF : Predicate<"Subtarget->hasCF()">;50def HasCMOV : Predicate<"Subtarget->canUseCMOV()">;51def NoCMOV : Predicate<"!Subtarget->canUseCMOV()">;52def HasNOPL : Predicate<"Subtarget->hasNOPL()">;53def HasMMX : Predicate<"Subtarget->hasMMX()">;54def HasSSE1 : Predicate<"Subtarget->hasSSE1()">;55def UseSSE1 : Predicate<"Subtarget->hasSSE1() && !Subtarget->hasAVX()">;56def HasSSE2 : Predicate<"Subtarget->hasSSE2()">;57def UseSSE2 : Predicate<"Subtarget->hasSSE2() && !Subtarget->hasAVX()">;58def HasSSE3 : Predicate<"Subtarget->hasSSE3()">;59def UseSSE3 : Predicate<"Subtarget->hasSSE3() && !Subtarget->hasAVX()">;60def HasSSSE3 : Predicate<"Subtarget->hasSSSE3()">;61def UseSSSE3 : Predicate<"Subtarget->hasSSSE3() && !Subtarget->hasAVX()">;62def HasSSE41 : Predicate<"Subtarget->hasSSE41()">;63def NoSSE41 : Predicate<"!Subtarget->hasSSE41()">;64def UseSSE41 : Predicate<"Subtarget->hasSSE41() && !Subtarget->hasAVX()">;65def HasSSE42 : Predicate<"Subtarget->hasSSE42()">;66def UseSSE42 : Predicate<"Subtarget->hasSSE42() && !Subtarget->hasAVX()">;67def HasSSE4A : Predicate<"Subtarget->hasSSE4A()">;68def NoAVX : Predicate<"!Subtarget->hasAVX()">;69def HasAVX : Predicate<"Subtarget->hasAVX()">;70def HasAVX2 : Predicate<"Subtarget->hasAVX2()">;71def HasAVX1Only : Predicate<"Subtarget->hasAVX() && !Subtarget->hasAVX2()">;72def HasAVX10_1 : Predicate<"Subtarget->hasAVX10_1()">;73def HasAVX10_2 : Predicate<"Subtarget->hasAVX10_2()">;74def NoAVX10_2 : Predicate<"!Subtarget->hasAVX10_2()">;75def HasAVX512 : Predicate<"Subtarget->hasAVX512()">;76def UseAVX : Predicate<"Subtarget->hasAVX() && !Subtarget->hasAVX512()">;77def UseAVX2 : Predicate<"Subtarget->hasAVX2() && !Subtarget->hasAVX512()">;78def NoAVX512 : Predicate<"!Subtarget->hasAVX512()">;79def HasCDI : Predicate<"Subtarget->hasCDI()">;80def HasVPOPCNTDQ : Predicate<"Subtarget->hasVPOPCNTDQ()">;81def HasDQI : Predicate<"Subtarget->hasDQI()">;82def NoDQI : Predicate<"!Subtarget->hasDQI()">;83def HasBWI : Predicate<"Subtarget->hasBWI()">;84def NoBWI : Predicate<"!Subtarget->hasBWI()">;85def HasVLX : Predicate<"Subtarget->hasVLX()">;86def NoVLX : Predicate<"!Subtarget->hasVLX()">;87def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;88def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;89def HasPKU : Predicate<"Subtarget->hasPKU()">;90def HasVNNI : Predicate<"Subtarget->hasVNNI()">;91def HasVP2INTERSECT : Predicate<"Subtarget->hasVP2INTERSECT()">;92def HasBF16 : Predicate<"Subtarget->hasBF16()">;93def HasFP16 : Predicate<"Subtarget->hasFP16()">;94def HasAVXVNNIINT16 : Predicate<"Subtarget->hasAVXVNNIINT16()">;95def HasAVXVNNIINT8 : Predicate<"Subtarget->hasAVXVNNIINT8()">;96def HasAVXVNNI : Predicate <"Subtarget->hasAVXVNNI()">;97def NoVLX_Or_NoVNNI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVNNI()">;98 99def HasBITALG : Predicate<"Subtarget->hasBITALG()">;100def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;101def HasAES : Predicate<"Subtarget->hasAES()">;102def HasVAES : Predicate<"Subtarget->hasVAES()">;103def NoVLX_Or_NoVAES : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVAES()">;104def HasFXSR : Predicate<"Subtarget->hasFXSR()">;105def HasX87 : Predicate<"Subtarget->hasX87()">;106def HasXSAVE : Predicate<"Subtarget->hasXSAVE()">;107def HasXSAVEOPT : Predicate<"Subtarget->hasXSAVEOPT()">;108def HasXSAVEC : Predicate<"Subtarget->hasXSAVEC()">;109def HasXSAVES : Predicate<"Subtarget->hasXSAVES()">;110def HasPCLMUL : Predicate<"Subtarget->hasPCLMUL()">;111def NoVLX_Or_NoVPCLMULQDQ :112 Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()">;113def HasVPCLMULQDQ : Predicate<"Subtarget->hasVPCLMULQDQ()">;114def HasGFNI : Predicate<"Subtarget->hasGFNI()">;115def HasFMA : Predicate<"Subtarget->hasFMA()">;116def HasFMA4 : Predicate<"Subtarget->hasFMA4()">;117def NoFMA4 : Predicate<"!Subtarget->hasFMA4()">;118def HasXOP : Predicate<"Subtarget->hasXOP()">;119def HasTBM : Predicate<"Subtarget->hasTBM()">;120def NoTBM : Predicate<"!Subtarget->hasTBM()">;121def HasLWP : Predicate<"Subtarget->hasLWP()">;122def HasMOVBE : Predicate<"Subtarget->hasMOVBE()">;123def NoNDD_Or_NoMOVBE : Predicate<"!Subtarget->hasNDD() || !Subtarget->hasMOVBE()">;124def HasRDRAND : Predicate<"Subtarget->hasRDRAND()">;125def HasF16C : Predicate<"Subtarget->hasF16C()">;126def HasFSGSBase : Predicate<"Subtarget->hasFSGSBase()">;127def HasLZCNT : Predicate<"Subtarget->hasLZCNT()">;128def HasBMI : Predicate<"Subtarget->hasBMI()">;129def HasBMI2 : Predicate<"Subtarget->hasBMI2()">;130def NoBMI2 : Predicate<"!Subtarget->hasBMI2()">;131def HasVBMI : Predicate<"Subtarget->hasVBMI()">;132def HasVBMI2 : Predicate<"Subtarget->hasVBMI2()">;133def HasIFMA : Predicate<"Subtarget->hasIFMA()">;134def HasAVXIFMA : Predicate<"Subtarget->hasAVXIFMA()">;135def NoVLX_Or_NoIFMA : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasIFMA()">;136def HasRTM : Predicate<"Subtarget->hasRTM()">;137def HasSHA : Predicate<"Subtarget->hasSHA()">;138def HasSHA512 : Predicate<"Subtarget->hasSHA512()">;139def HasSGX : Predicate<"Subtarget->hasSGX()">;140def HasSM3 : Predicate<"Subtarget->hasSM3()">;141def HasRDSEED : Predicate<"Subtarget->hasRDSEED()">;142def HasSSEPrefetch : Predicate<"Subtarget->hasSSEPrefetch()">;143def HasPRFCHW : Predicate<"Subtarget->hasPRFCHW()">;144def HasPREFETCHI : Predicate<"Subtarget->hasPREFETCHI()">;145def HasPrefetchW : Predicate<"Subtarget->hasPrefetchW()">;146def HasLAHFSAHF : Predicate<"Subtarget->hasLAHFSAHF()">;147def HasLAHFSAHF64 : Predicate<"Subtarget->hasLAHFSAHF64()">;148def HasMWAITX : Predicate<"Subtarget->hasMWAITX()">;149def HasCLZERO : Predicate<"Subtarget->hasCLZERO()">;150def HasCLDEMOTE : Predicate<"Subtarget->hasCLDEMOTE()">;151def HasMOVDIRI : Predicate<"Subtarget->hasMOVDIRI()">;152def HasMOVDIR64B : Predicate<"Subtarget->hasMOVDIR64B()">;153def HasMOVRS : Predicate<"Subtarget->hasMOVRS()">;154def HasPTWRITE : Predicate<"Subtarget->hasPTWRITE()">;155def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;156def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">;157def HasSHSTK : Predicate<"Subtarget->hasSHSTK()">;158def HasSM4 : Predicate<"Subtarget->hasSM4()">;159def HasCLFLUSH : Predicate<"Subtarget->hasCLFLUSH()">;160def HasCLFLUSHOPT : Predicate<"Subtarget->hasCLFLUSHOPT()">;161def HasCLWB : Predicate<"Subtarget->hasCLWB()">;162def HasWBNOINVD : Predicate<"Subtarget->hasWBNOINVD()">;163def HasRDPID : Predicate<"Subtarget->hasRDPID()">;164def HasRDPRU : Predicate<"Subtarget->hasRDPRU()">;165def HasWAITPKG : Predicate<"Subtarget->hasWAITPKG()">;166def HasINVPCID : Predicate<"Subtarget->hasINVPCID()">;167def HasCX8 : Predicate<"Subtarget->hasCX8()">;168def HasCX16 : Predicate<"Subtarget->hasCX16()">;169def HasPCONFIG : Predicate<"Subtarget->hasPCONFIG()">;170def HasENQCMD : Predicate<"Subtarget->hasENQCMD()">;171def HasAMXFP16 : Predicate<"Subtarget->hasAMXFP16()">;172def HasCMPCCXADD : Predicate<"Subtarget->hasCMPCCXADD()">;173def HasAVXNECONVERT : Predicate<"Subtarget->hasAVXNECONVERT()">;174def HasKL : Predicate<"Subtarget->hasKL()">;175def HasRAOINT : Predicate<"Subtarget->hasRAOINT()">;176def HasWIDEKL : Predicate<"Subtarget->hasWIDEKL()">;177def HasHRESET : Predicate<"Subtarget->hasHRESET()">;178def HasSERIALIZE : Predicate<"Subtarget->hasSERIALIZE()">;179def HasTSXLDTRK : Predicate<"Subtarget->hasTSXLDTRK()">;180def HasAMXTILE : Predicate<"Subtarget->hasAMXTILE()">;181def HasAMXBF16 : Predicate<"Subtarget->hasAMXBF16()">;182def HasAMXINT8 : Predicate<"Subtarget->hasAMXINT8()">;183def HasAMXCOMPLEX : Predicate<"Subtarget->hasAMXCOMPLEX()">;184def HasAMXFP8 : Predicate<"Subtarget->hasAMXFP8()">;185def HasAMXMOVRS : Predicate<"Subtarget->hasAMXMOVRS()">;186def HasAMXAVX512 : Predicate<"Subtarget->hasAMXAVX512()">;187def HasAMXTF32 : Predicate<"Subtarget->hasAMXTF32()">;188def HasUINTR : Predicate<"Subtarget->hasUINTR()">;189def HasUSERMSR : Predicate<"Subtarget->hasUSERMSR()">;190def HasCRC32 : Predicate<"Subtarget->hasCRC32()">;191 192def HasX86_64 : Predicate<"Subtarget->hasX86_64()">;193def Not64BitMode : Predicate<"!Subtarget->is64Bit()">,194 AssemblerPredicate<(all_of (not Is64Bit)), "Not 64-bit mode">;195def In64BitMode : Predicate<"Subtarget->is64Bit()">,196 AssemblerPredicate<(all_of Is64Bit), "64-bit mode">;197 198def IsX32Mode : Predicate<"Subtarget->getTargetTriple().isX32()">,199 AssemblerPredicate<(all_of IsX32), "x32 ABI">;200def NotX32Mode : Predicate<"!Subtarget->getTargetTriple().isX32()">,201 AssemblerPredicate<(all_of (not IsX32)), "not x32 ABI">;202 203def IsLP64 : Predicate<"Subtarget->isTarget64BitLP64()">;204def NotLP64 : Predicate<"!Subtarget->isTarget64BitLP64()">;205def In16BitMode : Predicate<"Subtarget->is16Bit()">,206 AssemblerPredicate<(all_of Is16Bit), "16-bit mode">;207def Not16BitMode : Predicate<"!Subtarget->is16Bit()">,208 AssemblerPredicate<(all_of (not Is16Bit)), "Not 16-bit mode">;209def In32BitMode : Predicate<"Subtarget->is32Bit()">,210 AssemblerPredicate<(all_of Is32Bit), "32-bit mode">;211def IsWin64 : Predicate<"Subtarget->isTargetWin64()">;212def NotWin64 : Predicate<"!Subtarget->isTargetWin64()">;213def NotWin64WithoutFP : Predicate<"!Subtarget->isTargetWin64() ||"214 "Subtarget->getFrameLowering()->hasFP(*MF)"> {215 let RecomputePerFunction = 1;216}217def IsPS : Predicate<"Subtarget->isTargetPS()">;218def NotPS : Predicate<"!Subtarget->isTargetPS()">;219def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">;220def KernelCode : Predicate<"TM.getCodeModel() == CodeModel::Kernel">;221def NearData : Predicate<"TM.getCodeModel() == CodeModel::Small ||"222 "TM.getCodeModel() == CodeModel::Kernel">;223def IsNotPIC : Predicate<"!TM.isPositionIndependent()">;224 225// We could compute these on a per-module basis but doing so requires accessing226// the Function object through the <Target>Subtarget and objections were raised227// to that (see post-commit review comments for r301750).228let RecomputePerFunction = 1 in {229 def OptForSize : Predicate<"shouldOptForSize(MF)">;230 def OptForMinSize : Predicate<"MF->getFunction().hasMinSize()">;231 def OptForSpeed : Predicate<"!shouldOptForSize(MF)">;232 def UseIncDec : Predicate<"!Subtarget->slowIncDec() || "233 "shouldOptForSize(MF)">;234 def NoSSE41_Or_OptForSize : Predicate<"shouldOptForSize(MF) || "235 "!Subtarget->hasSSE41()">;236 def ImportCallOptimizationEnabled : Predicate<"MF->getFunction().getParent()->getModuleFlag(\"import-call-optimization\")">;237 def ImportCallOptimizationDisabled : Predicate<"!MF->getFunction().getParent()->getModuleFlag(\"import-call-optimization\")">;238 239 def IsWin64CCFunc : Predicate<"Subtarget->isCallingConvWin64(MF->getFunction().getCallingConv())">;240 def IsNotWin64CCFunc : Predicate<"!Subtarget->isCallingConvWin64(MF->getFunction().getCallingConv())">;241 def IsHiPECCFunc : Predicate<"MF->getFunction().getCallingConv() == CallingConv::HiPE">;242 243 def IsNotHiPECCFunc : Predicate<244 "MF->getFunction().getCallingConv() != CallingConv::HiPE">;245}246 247def CallImmAddr : Predicate<"Subtarget->isLegalToCallImmediateAddr()">;248def FavorMemIndirectCall : Predicate<"!Subtarget->slowTwoMemOps()">;249def HasFastMem32 : Predicate<"!Subtarget->isUnalignedMem32Slow()">;250def HasFastLZCNT : Predicate<"Subtarget->hasFastLZCNT()">;251def HasFastSHLDRotate : Predicate<"Subtarget->hasFastSHLDRotate()">;252def HasERMSB : Predicate<"Subtarget->hasERMSB()">;253def HasFSRM : Predicate<"Subtarget->hasFSRM()">;254def HasMFence : Predicate<"Subtarget->hasMFence()">;255def HasFastDPWSSD: Predicate<"Subtarget->hasFastDPWSSD()">;256def UseIndirectThunkCalls : Predicate<"Subtarget->useIndirectThunkCalls()">;257def NotUseIndirectThunkCalls : Predicate<"!Subtarget->useIndirectThunkCalls()">;258 259//===----------------------------------------------------------------------===//260// HwModes261//===----------------------------------------------------------------------===//262 263defvar X86_32 = DefaultMode;264def X86_64 : HwMode<[In64BitMode, NotX32Mode]>;265def X86_64_X32 : HwMode<[IsX32Mode]>;266