30 lines · plain
1//===-- X86InstrSGX.td - SGX Instruction Set Extension -----*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file describes the instructions that make up the Intel SGX instruction10// set.11//12//===----------------------------------------------------------------------===//13 14//===----------------------------------------------------------------------===//15// SGX instructions16 17let SchedRW = [WriteSystem], Predicates = [HasSGX] in {18// ENCLS - Execute an Enclave System Function of Specified Leaf Number19def ENCLS : I<0x01, MRM_CF, (outs), (ins),20 "encls", []>, TB;21 22// ENCLU - Execute an Enclave User Function of Specified Leaf Number23def ENCLU : I<0x01, MRM_D7, (outs), (ins),24 "enclu", []>, TB;25 26// ENCLV - Execute an Enclave VMM Function of Specified Leaf Number27def ENCLV : I<0x01, MRM_C0, (outs), (ins),28 "enclv", []>, TB;29} // SchedRW30