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1//===-- X86InstrSVM.td - SVM Instruction Set Extension -----*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file describes the instructions that make up the AMD SVM instruction10// set.11//12//===----------------------------------------------------------------------===//13 14//===----------------------------------------------------------------------===//15// SVM instructions16 17let SchedRW = [WriteSystem] in {18// 0F 01 D919def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB;20 21// 0F 01 DC22def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB;23 24// 0F 01 DD25def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB;26 27// 0F 01 DE28let Uses = [EAX] in29def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit", []>, TB;30 31// 0F 01 D832let Uses = [EAX] in33def VMRUN32 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB,34 Requires<[Not64BitMode]>;35let Uses = [RAX] in36def VMRUN64 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB,37 Requires<[In64BitMode]>;38 39// 0F 01 DA40let Uses = [EAX] in41def VMLOAD32 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB,42 Requires<[Not64BitMode]>;43let Uses = [RAX] in44def VMLOAD64 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB,45 Requires<[In64BitMode]>;46 47// 0F 01 DB48let Uses = [EAX] in49def VMSAVE32 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB,50 Requires<[Not64BitMode]>;51let Uses = [RAX] in52def VMSAVE64 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB,53 Requires<[In64BitMode]>;54 55// 0F 01 DF56let Uses = [EAX, ECX] in57def INVLPGA32 : I<0x01, MRM_DF, (outs), (ins),58 "invlpga", []>, TB, Requires<[Not64BitMode]>;59let Uses = [RAX, ECX] in60def INVLPGA64 : I<0x01, MRM_DF, (outs), (ins),61 "invlpga", []>, TB, Requires<[In64BitMode]>;62} // SchedRW63