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1//===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file implements the X86 specific subclass of TargetSubtargetInfo.10//11//===----------------------------------------------------------------------===//12 13#include "X86Subtarget.h"14#include "GISel/X86CallLowering.h"15#include "GISel/X86LegalizerInfo.h"16#include "GISel/X86RegisterBankInfo.h"17#include "MCTargetDesc/X86BaseInfo.h"18#include "X86.h"19#include "X86MacroFusion.h"20#include "X86TargetMachine.h"21#include "llvm/CodeGen/GlobalISel/CallLowering.h"22#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"23#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"24#include "llvm/CodeGen/ScheduleDAGMutation.h"25#include "llvm/IR/Attributes.h"26#include "llvm/IR/ConstantRange.h"27#include "llvm/IR/Function.h"28#include "llvm/IR/GlobalValue.h"29#include "llvm/IR/Module.h"30#include "llvm/Support/Casting.h"31#include "llvm/Support/CodeGen.h"32#include "llvm/Support/CommandLine.h"33#include "llvm/Support/Debug.h"34#include "llvm/Support/ErrorHandling.h"35#include "llvm/Target/TargetMachine.h"36#include "llvm/TargetParser/Triple.h"37 38#if defined(_MSC_VER)39#include <intrin.h>40#endif41 42using namespace llvm;43 44#define DEBUG_TYPE "subtarget"45 46#define GET_SUBTARGETINFO_TARGET_DESC47#define GET_SUBTARGETINFO_CTOR48#include "X86GenSubtargetInfo.inc"49 50// Temporary option to control early if-conversion for x86 while adding machine51// models.52static cl::opt<bool>53X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,54               cl::desc("Enable early if-conversion on X86"));55 56 57/// Classify a blockaddress reference for the current subtarget according to how58/// we should reference it in a non-pcrel context.59unsigned char X86Subtarget::classifyBlockAddressReference() const {60  return classifyLocalReference(nullptr);61}62 63/// Classify a global variable reference for the current subtarget according to64/// how we should reference it in a non-pcrel context.65unsigned char66X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const {67  return classifyGlobalReference(GV, *GV->getParent());68}69 70unsigned char71X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {72  CodeModel::Model CM = TM.getCodeModel();73  // Tagged globals have non-zero upper bits, which makes direct references74  // require a 64-bit immediate. With the small/medium code models this causes75  // relocation errors, so we go through the GOT instead.76  if (AllowTaggedGlobals && CM != CodeModel::Large && GV && !isa<Function>(GV))77    return X86II::MO_GOTPCREL_NORELAX;78 79  // If we're not PIC, it's not very interesting.80  if (!isPositionIndependent())81    return X86II::MO_NO_FLAG;82 83  if (is64Bit()) {84    // 64-bit ELF PIC local references may use GOTOFF relocations.85    if (isTargetELF()) {86      assert(CM != CodeModel::Tiny &&87             "Tiny codesize model not supported on X86");88      // In the large code model, all text is far from any global data, so we89      // use GOTOFF.90      if (CM == CodeModel::Large)91        return X86II::MO_GOTOFF;92      // Large GlobalValues use GOTOFF, otherwise use RIP-rel access.93      if (GV)94        return TM.isLargeGlobalValue(GV) ? X86II::MO_GOTOFF : X86II::MO_NO_FLAG;95      // GV == nullptr is for all other non-GlobalValue global data like the96      // constant pool, jump tables, labels, etc. The small and medium code97      // models treat these as accessible with a RIP-rel access.98      return X86II::MO_NO_FLAG;99    }100 101    // Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,102    // both of which use MO_NO_FLAG.103    return X86II::MO_NO_FLAG;104  }105 106  // The COFF dynamic linker just patches the executable sections.107  if (isTargetCOFF())108    return X86II::MO_NO_FLAG;109 110  if (isTargetDarwin()) {111    // 32 bit macho has no relocation for a-b if a is undefined, even if112    // b is in the section that is being relocated.113    // This means we have to use o load even for GVs that are known to be114    // local to the dso.115    if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))116      return X86II::MO_DARWIN_NONLAZY_PIC_BASE;117 118    return X86II::MO_PIC_BASE_OFFSET;119  }120 121  return X86II::MO_GOTOFF;122}123 124unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,125                                                    const Module &M) const {126  // The static large model never uses stubs.127  if (TM.getCodeModel() == CodeModel::Large && !isPositionIndependent())128    return X86II::MO_NO_FLAG;129 130  // Absolute symbols can be referenced directly.131  if (GV) {132    if (std::optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) {133      // See if we can use the 8-bit immediate form. Note that some instructions134      // will sign extend the immediate operand, so to be conservative we only135      // accept the range [0,128).136      if (CR->getUnsignedMax().ult(128))137        return X86II::MO_ABS8;138      else139        return X86II::MO_NO_FLAG;140    }141  }142 143  if (TM.shouldAssumeDSOLocal(GV))144    return classifyLocalReference(GV);145 146  if (isTargetCOFF()) {147    // ExternalSymbolSDNode like _tls_index.148    if (!GV)149      return X86II::MO_NO_FLAG;150    if (GV->hasDLLImportStorageClass())151      return X86II::MO_DLLIMPORT;152    return X86II::MO_COFFSTUB;153  }154  // Some JIT users use *-win32-elf triples; these shouldn't use GOT tables.155  if (isOSWindows())156    return X86II::MO_NO_FLAG;157 158  if (is64Bit()) {159    // ELF supports a large, truly PIC code model with non-PC relative GOT160    // references. Other object file formats do not. Use the no-flag, 64-bit161    // reference for them.162    if (TM.getCodeModel() == CodeModel::Large)163      return isTargetELF() ? X86II::MO_GOT : X86II::MO_NO_FLAG;164    // Tagged globals have non-zero upper bits, which makes direct references165    // require a 64-bit immediate. So we can't let the linker relax the166    // relocation to a 32-bit RIP-relative direct reference.167    if (AllowTaggedGlobals && GV && !isa<Function>(GV))168      return X86II::MO_GOTPCREL_NORELAX;169    return X86II::MO_GOTPCREL;170  }171 172  if (isTargetDarwin()) {173    if (!isPositionIndependent())174      return X86II::MO_DARWIN_NONLAZY;175    return X86II::MO_DARWIN_NONLAZY_PIC_BASE;176  }177 178  // 32-bit ELF references GlobalAddress directly in static relocation model.179  // We cannot use MO_GOT because EBX may not be set up.180  if (TM.getRelocationModel() == Reloc::Static)181    return X86II::MO_NO_FLAG;182  return X86II::MO_GOT;183}184 185unsigned char186X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const {187  return classifyGlobalFunctionReference(GV, *GV->getParent());188}189 190unsigned char191X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV,192                                              const Module &M) const {193  if (TM.shouldAssumeDSOLocal(GV))194    return X86II::MO_NO_FLAG;195 196  // Functions on COFF can be non-DSO local for three reasons:197  // - They are intrinsic functions (!GV)198  // - They are marked dllimport199  // - They are extern_weak, and a stub is needed200  if (isTargetCOFF()) {201    if (!GV)202      return X86II::MO_NO_FLAG;203    if (GV->hasDLLImportStorageClass())204      return X86II::MO_DLLIMPORT;205    return X86II::MO_COFFSTUB;206  }207 208  const Function *F = dyn_cast_or_null<Function>(GV);209 210  if (isTargetELF()) {211    if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))212      // According to psABI, PLT stub clobbers XMM8-XMM15.213      // In Regcall calling convention those registers are used for passing214      // parameters. Thus we need to prevent lazy binding in Regcall.215      return X86II::MO_GOTPCREL;216    // If PLT must be avoided then the call should be via GOTPCREL.217    if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||218         (!F && M.getRtLibUseGOT())) &&219        is64Bit())220       return X86II::MO_GOTPCREL;221    // Reference ExternalSymbol directly in static relocation model.222    if (!is64Bit() && !GV && TM.getRelocationModel() == Reloc::Static)223      return X86II::MO_NO_FLAG;224    return X86II::MO_PLT;225  }226 227  if (is64Bit()) {228    if (F && F->hasFnAttribute(Attribute::NonLazyBind))229      // If the function is marked as non-lazy, generate an indirect call230      // which loads from the GOT directly. This avoids runtime overhead231      // at the cost of eager binding (and one extra byte of encoding).232      return X86II::MO_GOTPCREL;233    return X86II::MO_NO_FLAG;234  }235 236  return X86II::MO_NO_FLAG;237}238 239/// Return true if the subtarget allows calls to immediate address.240bool X86Subtarget::isLegalToCallImmediateAddr() const {241  // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32242  // but WinCOFFObjectWriter::RecordRelocation cannot emit them.  Once it does,243  // the following check for Win32 should be removed.244  if (Is64Bit || isTargetWin32())245    return false;246  return isTargetELF() || TM.getRelocationModel() == Reloc::Static;247}248 249void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,250                                         StringRef FS) {251  if (CPU.empty())252    CPU = "generic";253 254  if (TuneCPU.empty())255    TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.256 257  std::string FullFS = X86_MC::ParseX86Triple(TargetTriple);258  assert(!FullFS.empty() && "Failed to parse X86 triple");259 260  if (!FS.empty())261    FullFS = (Twine(FullFS) + "," + FS).str();262 263  // Disable 64-bit only features in non-64-bit mode.264  StringRef FeaturesIn64BitOnly[] = {265      "egpr", "push2pop2", "ppx", "ndd", "ccmp", "nf", "cf", "zu", "uintr"};266  if (FullFS.find("-64bit-mode") != std::string::npos)267    for (StringRef F : FeaturesIn64BitOnly)268      FullFS += ",-" + F.str();269 270  // Parse features string and set the CPU.271  ParseSubtargetFeatures(CPU, TuneCPU, FullFS);272 273  // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of274  // 16-bytes and under that are reasonably fast. These features were275  // introduced with Intel's Nehalem/Silvermont and AMD's Family10h276  // micro-architectures respectively.277  if (hasSSE42() || hasSSE4A())278    IsUnalignedMem16Slow = false;279 280  LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel281                    << ", MMX " << HasMMX << ", 64bit " << HasX86_64 << "\n");282  if (Is64Bit && !HasX86_64)283    reportFatalUsageError("64-bit code requested on a subtarget that doesn't "284                          "support it!");285 286  // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD, Hurd and for all287  // 64-bit targets.  On Solaris (32-bit), stack alignment is 4 bytes288  // following the i386 psABI, while on Illumos it is always 16 bytes.289  if (StackAlignOverride)290    stackAlignment = *StackAlignOverride;291  else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() ||292           isTargetHurd() || Is64Bit)293    stackAlignment = Align(16);294 295  // Consume the vector width attribute or apply any target specific limit.296  if (PreferVectorWidthOverride)297    PreferVectorWidth = PreferVectorWidthOverride;298  else if (Prefer128Bit)299    PreferVectorWidth = 128;300  else if (Prefer256Bit)301    PreferVectorWidth = 256;302}303 304X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,305                                                            StringRef TuneCPU,306                                                            StringRef FS) {307  initSubtargetFeatures(CPU, TuneCPU, FS);308  return *this;309}310 311X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU,312                           StringRef FS, const X86TargetMachine &TM,313                           MaybeAlign StackAlignOverride,314                           unsigned PreferVectorWidthOverride,315                           unsigned RequiredVectorWidth)316    : X86GenSubtargetInfo(TT, CPU, TuneCPU, FS),317      PICStyle(PICStyles::Style::None), TM(TM), TargetTriple(TT),318      StackAlignOverride(StackAlignOverride),319      PreferVectorWidthOverride(PreferVectorWidthOverride),320      RequiredVectorWidth(RequiredVectorWidth),321      InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),322      TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {323  // Determine the PICStyle based on the target selected.324  if (!isPositionIndependent() || TM.getCodeModel() == CodeModel::Large)325    // With the large code model, None forces all memory accesses to be indirect326    // rather than RIP-relative.327    setPICStyle(PICStyles::Style::None);328  else if (is64Bit())329    setPICStyle(PICStyles::Style::RIPRel);330  else if (isTargetCOFF())331    setPICStyle(PICStyles::Style::None);332  else if (isTargetDarwin())333    setPICStyle(PICStyles::Style::StubPIC);334  else if (isTargetELF())335    setPICStyle(PICStyles::Style::GOT);336 337  CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));338  Legalizer.reset(new X86LegalizerInfo(*this, TM));339 340  auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());341  RegBankInfo.reset(RBI);342  InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));343}344 345// Define the virtual destructor out-of-line for build efficiency.346X86Subtarget::~X86Subtarget() = default;347 348const CallLowering *X86Subtarget::getCallLowering() const {349  return CallLoweringInfo.get();350}351 352InstructionSelector *X86Subtarget::getInstructionSelector() const {353  return InstSelector.get();354}355 356const LegalizerInfo *X86Subtarget::getLegalizerInfo() const {357  return Legalizer.get();358}359 360const RegisterBankInfo *X86Subtarget::getRegBankInfo() const {361  return RegBankInfo.get();362}363 364bool X86Subtarget::enableEarlyIfConversion() const {365  return canUseCMOV() && X86EarlyIfConv;366}367 368void X86Subtarget::getPostRAMutations(369    std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {370  Mutations.push_back(createX86MacroFusionDAGMutation());371}372 373bool X86Subtarget::isPositionIndependent() const {374  return TM.isPositionIndependent();375}376