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1//===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9//===----------------------------------------------------------------------===//10// Instruction format superclass11//===----------------------------------------------------------------------===//12class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>13 : Instruction {14 field bits<32> Inst;15 16 let Namespace = "XCore";17 dag OutOperandList = outs;18 dag InOperandList = ins;19 let AsmString = asmstr;20 let Pattern = pattern;21 let Size = sz;22}23 24// XCore pseudo instructions format25class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>26 : InstXCore<0, outs, ins, asmstr, pattern> {27 let isPseudo = 1;28}29 30//===----------------------------------------------------------------------===//31// Instruction formats32//===----------------------------------------------------------------------===//33 34class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>35 : InstXCore<2, outs, ins, asmstr, pattern> {36 let Inst{15-11} = opc;37 let DecoderMethod = "Decode3RInstruction";38}39 40// 3R with first operand as an immediate. Used for TSETR where the first41// operand is treated as an immediate since it refers to a register number in42// another thread.43class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>44 : _F3R<opc, outs, ins, asmstr, pattern> {45 let DecoderMethod = "Decode3RImmInstruction";46}47 48class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>49 : InstXCore<4, outs, ins, asmstr, pattern> {50 let Inst{31-27} = opc{8-4};51 let Inst{26-20} = 0b1111110;52 let Inst{19-16} = opc{3-0};53 54 let Inst{15-11} = 0b11111;55 let DecoderMethod = "DecodeL3RInstruction";56}57 58// L3R with first operand as both a source and a destination.59class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr,60 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> {61 let DecoderMethod = "DecodeL3RSrcDstInstruction";62}63 64class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>65 : InstXCore<2, outs, ins, asmstr, pattern> {66 let Inst{15-11} = opc;67 let DecoderMethod = "Decode2RUSInstruction";68}69 70// 2RUS with bitp operand71class _F2RUSBitp<bits<5> opc, dag outs, dag ins, string asmstr,72 list<dag> pattern>73 : _F2RUS<opc, outs, ins, asmstr, pattern> {74 let DecoderMethod = "Decode2RUSBitpInstruction";75}76 77class _FL2RUS<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>78 : InstXCore<4, outs, ins, asmstr, pattern> {79 let Inst{31-27} = opc{8-4};80 let Inst{26-20} = 0b1111110;81 let Inst{19-16} = opc{3-0};82 83 let Inst{15-11} = 0b11111;84 let DecoderMethod = "DecodeL2RUSInstruction";85}86 87// L2RUS with bitp operand88class _FL2RUSBitp<bits<9> opc, dag outs, dag ins, string asmstr,89 list<dag> pattern>90 : _FL2RUS<opc, outs, ins, asmstr, pattern> {91 let DecoderMethod = "DecodeL2RUSBitpInstruction";92}93 94class _FRU6<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>95 : InstXCore<2, outs, ins, asmstr, pattern> {96 bits<4> a;97 bits<6> b;98 99 let Inst{15-10} = opc;100 let Inst{9-6} = a;101 let Inst{5-0} = b;102}103 104class _FLRU6<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>105 : InstXCore<4, outs, ins, asmstr, pattern> {106 bits<4> a;107 bits<16> b;108 109 let Inst{31-26} = opc;110 let Inst{25-22} = a;111 let Inst{21-16} = b{5-0};112 let Inst{15-10} = 0b111100;113 let Inst{9-0} = b{15-6};114}115 116class _FU6<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>117 : InstXCore<2, outs, ins, asmstr, pattern> {118 bits<6> a;119 120 let Inst{15-6} = opc;121 let Inst{5-0} = a;122}123 124class _FLU6<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>125 : InstXCore<4, outs, ins, asmstr, pattern> {126 bits<16> a;127 128 let Inst{31-22} = opc;129 let Inst{21-16} = a{5-0};130 let Inst{15-10} = 0b111100;131 let Inst{9-0} = a{15-6};132}133 134class _FU10<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>135 : InstXCore<2, outs, ins, asmstr, pattern> {136 bits<10> a;137 138 let Inst{15-10} = opc;139 let Inst{9-0} = a;140}141 142class _FLU10<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>143 : InstXCore<4, outs, ins, asmstr, pattern> {144 bits<20> a;145 146 let Inst{31-26} = opc;147 let Inst{25-16} = a{9-0};148 let Inst{15-10} = 0b111100;149 let Inst{9-0} = a{19-10};150}151 152class _F2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>153 : InstXCore<2, outs, ins, asmstr, pattern> {154 let Inst{15-11} = opc{5-1};155 let Inst{4} = opc{0};156 let DecoderMethod = "Decode2RInstruction";157}158 159// 2R with first operand as an immediate. Used for TSETMR where the first160// operand is treated as an immediate since it refers to a register number in161// another thread.162class _F2RImm<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>163 : _F2R<opc, outs, ins, asmstr, pattern> {164 let DecoderMethod = "Decode2RImmInstruction";165}166 167// 2R with first operand as both a source and a destination.168class _F2RSrcDst<bits<6> opc, dag outs, dag ins, string asmstr,169 list<dag> pattern> : _F2R<opc, outs, ins, asmstr, pattern> {170 let DecoderMethod = "Decode2RSrcDstInstruction";171}172 173// Same as 2R with last two operands swapped174class _FR2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>175 : _F2R<opc, outs, ins, asmstr, pattern> {176 let DecoderMethod = "DecodeR2RInstruction";177}178 179class _FRUS<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>180 : InstXCore<2, outs, ins, asmstr, pattern> {181 let Inst{15-11} = opc{5-1};182 let Inst{4} = opc{0};183 let DecoderMethod = "DecodeRUSInstruction";184}185 186// RUS with bitp operand187class _FRUSBitp<bits<6> opc, dag outs, dag ins, string asmstr,188 list<dag> pattern>189 : _FRUS<opc, outs, ins, asmstr, pattern> {190 let DecoderMethod = "DecodeRUSBitpInstruction";191}192 193// RUS with first operand as both a source and a destination and a bitp second194// operand195class _FRUSSrcDstBitp<bits<6> opc, dag outs, dag ins, string asmstr,196 list<dag> pattern>197 : _FRUS<opc, outs, ins, asmstr, pattern> {198 let DecoderMethod = "DecodeRUSSrcDstBitpInstruction";199}200 201class _FL2R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>202 : InstXCore<4, outs, ins, asmstr, pattern> {203 let Inst{31-27} = opc{9-5};204 let Inst{26-20} = 0b1111110;205 let Inst{19-16} = opc{4-1};206 207 let Inst{15-11} = 0b11111;208 let Inst{4} = opc{0};209 let DecoderMethod = "DecodeL2RInstruction";210}211 212// Same as L2R with last two operands swapped213class _FLR2R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>214 : _FL2R<opc, outs, ins, asmstr, pattern> {215 let DecoderMethod = "DecodeLR2RInstruction";216}217 218class _F1R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>219 : InstXCore<2, outs, ins, asmstr, pattern> {220 bits<4> a;221 222 let Inst{15-11} = opc{5-1};223 let Inst{10-5} = 0b111111;224 let Inst{4} = opc{0};225 let Inst{3-0} = a;226}227 228class _F0R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>229 : InstXCore<2, outs, ins, asmstr, pattern> {230 let Inst{15-11} = opc{9-5};231 let Inst{10-5} = 0b111111;232 let Inst{4-0} = opc{4-0};233}234 235class _FL4R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>236 : InstXCore<4, outs, ins, asmstr, pattern> {237 bits<4> d;238 239 let Inst{31-27} = opc{5-1};240 let Inst{26-21} = 0b111111;241 let Inst{20} = opc{0};242 let Inst{19-16} = d;243 let Inst{15-11} = 0b11111;244}245 246// L4R with 4th operand as both a source and a destination.247class _FL4RSrcDst<bits<6> opc, dag outs, dag ins, string asmstr,248 list<dag> pattern>249 : _FL4R<opc, outs, ins, asmstr, pattern> {250 let DecoderMethod = "DecodeL4RSrcDstInstruction";251}252 253// L4R with 1st and 4th operand as both a source and a destination.254class _FL4RSrcDstSrcDst<bits<6> opc, dag outs, dag ins, string asmstr,255 list<dag> pattern>256 : _FL4R<opc, outs, ins, asmstr, pattern> {257 let DecoderMethod = "DecodeL4RSrcDstSrcDstInstruction";258}259 260class _FL5R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>261 : InstXCore<4, outs, ins, asmstr, pattern> {262 let Inst{31-27} = opc{5-1};263 let Inst{20} = opc{0};264 let Inst{15-11} = 0b11111;265 266 let DecoderMethod = "DecodeL5RInstruction";267}268 269class _FL6R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>270 : InstXCore<4, outs, ins, asmstr, pattern> {271 let Inst{31-27} = opc;272 let Inst{15-11} = 0b11111;273 274 let DecoderMethod = "DecodeL6RInstruction";275}276