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1//===- XtensaInstPrinter.h - Convert Xtensa MCInst to asm syntax -*- C++ -*-==//2//3// The LLVM Compiler Infrastructure4//5// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.6// See https://llvm.org/LICENSE.txt for license information.7// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception8//9//===----------------------------------------------------------------------===//10//11// This class prints an Xtensa MCInst to a .s file.12//13//===----------------------------------------------------------------------===//14 15#ifndef LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAINSTPRINTER_H16#define LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAINSTPRINTER_H17 18#include "llvm/MC/MCInstPrinter.h"19#include "llvm/Support/Compiler.h"20 21namespace llvm {22class MCOperand;23 24class XtensaInstPrinter : public MCInstPrinter {25public:26 XtensaInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,27 const MCRegisterInfo &MRI)28 : MCInstPrinter(MAI, MII, MRI) {}29 30 // Automatically generated by tblgen.31 std::pair<const char *, uint64_t>32 getMnemonic(const MCInst &MI) const override;33 void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);34 static const char *getRegisterName(MCRegister Reg);35 36 // Print the given operand.37 static void printOperand(const MCOperand &MO, raw_ostream &O);38 39 // Override MCInstPrinter.40 void printRegName(raw_ostream &O, MCRegister Reg) override;41 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,42 const MCSubtargetInfo &STI, raw_ostream &O) override;43 44private:45 // Print various types of operand.46 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);47 void printMemOperand(const MCInst *MI, int OpNUm, raw_ostream &O);48 void printBranchTarget(const MCInst *MI, uint64_t Address, int OpNum,49 raw_ostream &O);50 void printLoopTarget(const MCInst *MI, uint64_t Address, int OpNum,51 raw_ostream &O);52 void printJumpTarget(const MCInst *MI, uint64_t Address, int OpNum,53 raw_ostream &O);54 void printCallOperand(const MCInst *MI, uint64_t Address, int OpNum,55 raw_ostream &O);56 void printL32RTarget(const MCInst *MI, uint64_t Address, int OpNum,57 raw_ostream &O);58 void printPCRelImm(uint64_t Address, int64_t Offset, raw_ostream &O);59 60 void printImm8_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);61 void printImm8_sh8_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);62 void printImm12_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);63 void printImm12m_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);64 void printUimm4_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);65 void printUimm5_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);66 void printShimm1_31_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);67 void printImm1_16_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);68 void printImm1n_15_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);69 void printImm32n_95_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);70 void printImm8n_7_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);71 void printImm64n_4n_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);72 void printOffset8m8_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);73 void printOffset8m16_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);74 void printOffset8m32_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);75 void printOffset4m32_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);76 void printEntry_Imm12_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);77 void printB4const_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);78 void printB4constu_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);79 void printImm7_22_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);80};81} // end namespace llvm82 83#endif /* LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAINSTPRINTER_H */84