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1//===- Xtensa.td - Describe the Xtensa Target Machine ------*- tablegen -*-===//2//3// The LLVM Compiler Infrastructure4//5// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.6// See https://llvm.org/LICENSE.txt for license information.7// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception8//9//===----------------------------------------------------------------------===//10 11//===----------------------------------------------------------------------===//12// Target-independent interfaces13//===----------------------------------------------------------------------===//14 15include "llvm/Target/Target.td"16 17//===----------------------------------------------------------------------===//18// Subtarget Features.19//===----------------------------------------------------------------------===//20 21include "XtensaFeatures.td"22 23//===----------------------------------------------------------------------===//24// Xtensa supported processors.25//===----------------------------------------------------------------------===//26 27include "XtensaProcessors.td"28 29//===----------------------------------------------------------------------===//30// Register File Description31//===----------------------------------------------------------------------===//32 33include "XtensaRegisterInfo.td"34 35//===----------------------------------------------------------------------===//36// Calling Convention Description37//===----------------------------------------------------------------------===//38 39include "XtensaCallingConv.td"40 41//===----------------------------------------------------------------------===//42// Instruction Descriptions43//===----------------------------------------------------------------------===//44 45include "XtensaInstrInfo.td"46 47defm : RemapAllTargetPseudoPointerOperands<AR>;48 49def XtensaInstrInfo : InstrInfo;50 51//===----------------------------------------------------------------------===//52// Target Declaration53//===----------------------------------------------------------------------===//54 55def XtensaAsmParser : AsmParser {56 let ShouldEmitMatchRegisterAltName = 1;57}58 59def XtensaInstPrinter : AsmWriter {60 string AsmWriterClassName = "InstPrinter";61}62 63def Xtensa : Target {64 let InstructionSet = XtensaInstrInfo;65 let AssemblyWriters = [XtensaInstPrinter];66 let AssemblyParsers = [XtensaAsmParser];67}68 69