688 lines · cpp
1//===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file implements a target parser to recognise ARM hardware features10// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.11//12//===----------------------------------------------------------------------===//13 14#include "llvm/TargetParser/ARMTargetParser.h"15#include "llvm/ADT/StringSwitch.h"16#include "llvm/Support/Format.h"17#include "llvm/Support/raw_ostream.h"18#include "llvm/TargetParser/ARMTargetParserCommon.h"19#include "llvm/TargetParser/Triple.h"20#include <cctype>21 22using namespace llvm;23 24static StringRef getHWDivSynonym(StringRef HWDiv) {25 return StringSwitch<StringRef>(HWDiv)26 .Case("thumb,arm", "arm,thumb")27 .Default(HWDiv);28}29 30// Allows partial match, ex. "v7a" matches "armv7a".31ARM::ArchKind ARM::parseArch(StringRef Arch) {32 Arch = getCanonicalArchName(Arch);33 StringRef Syn = getArchSynonym(Arch);34 for (const auto &A : ARMArchNames) {35 if (A.Name.ends_with(Syn))36 return A.ID;37 }38 return ArchKind::INVALID;39}40 41// Version number (ex. v7 = 7).42unsigned ARM::parseArchVersion(StringRef Arch) {43 Arch = getCanonicalArchName(Arch);44 switch (parseArch(Arch)) {45 case ArchKind::ARMV4:46 case ArchKind::ARMV4T:47 return 4;48 case ArchKind::ARMV5T:49 case ArchKind::ARMV5TE:50 case ArchKind::IWMMXT:51 case ArchKind::IWMMXT2:52 case ArchKind::XSCALE:53 case ArchKind::ARMV5TEJ:54 return 5;55 case ArchKind::ARMV6:56 case ArchKind::ARMV6K:57 case ArchKind::ARMV6T2:58 case ArchKind::ARMV6KZ:59 case ArchKind::ARMV6M:60 return 6;61 case ArchKind::ARMV7A:62 case ArchKind::ARMV7VE:63 case ArchKind::ARMV7R:64 case ArchKind::ARMV7M:65 case ArchKind::ARMV7S:66 case ArchKind::ARMV7EM:67 case ArchKind::ARMV7K:68 return 7;69 case ArchKind::ARMV8A:70 case ArchKind::ARMV8_1A:71 case ArchKind::ARMV8_2A:72 case ArchKind::ARMV8_3A:73 case ArchKind::ARMV8_4A:74 case ArchKind::ARMV8_5A:75 case ArchKind::ARMV8_6A:76 case ArchKind::ARMV8_7A:77 case ArchKind::ARMV8_8A:78 case ArchKind::ARMV8_9A:79 case ArchKind::ARMV8R:80 case ArchKind::ARMV8MBaseline:81 case ArchKind::ARMV8MMainline:82 case ArchKind::ARMV8_1MMainline:83 return 8;84 case ArchKind::ARMV9A:85 case ArchKind::ARMV9_1A:86 case ArchKind::ARMV9_2A:87 case ArchKind::ARMV9_3A:88 case ArchKind::ARMV9_4A:89 case ArchKind::ARMV9_5A:90 case ArchKind::ARMV9_6A:91 case ArchKind::ARMV9_7A:92 return 9;93 case ArchKind::INVALID:94 return 0;95 }96 llvm_unreachable("Unhandled architecture");97}98 99static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {100 switch (AK) {101 case ARM::ArchKind::ARMV6M:102 case ARM::ArchKind::ARMV7M:103 case ARM::ArchKind::ARMV7EM:104 case ARM::ArchKind::ARMV8MMainline:105 case ARM::ArchKind::ARMV8MBaseline:106 case ARM::ArchKind::ARMV8_1MMainline:107 return ARM::ProfileKind::M;108 case ARM::ArchKind::ARMV7R:109 case ARM::ArchKind::ARMV8R:110 return ARM::ProfileKind::R;111 case ARM::ArchKind::ARMV7A:112 case ARM::ArchKind::ARMV7VE:113 case ARM::ArchKind::ARMV7K:114 case ARM::ArchKind::ARMV8A:115 case ARM::ArchKind::ARMV8_1A:116 case ARM::ArchKind::ARMV8_2A:117 case ARM::ArchKind::ARMV8_3A:118 case ARM::ArchKind::ARMV8_4A:119 case ARM::ArchKind::ARMV8_5A:120 case ARM::ArchKind::ARMV8_6A:121 case ARM::ArchKind::ARMV8_7A:122 case ARM::ArchKind::ARMV8_8A:123 case ARM::ArchKind::ARMV8_9A:124 case ARM::ArchKind::ARMV9A:125 case ARM::ArchKind::ARMV9_1A:126 case ARM::ArchKind::ARMV9_2A:127 case ARM::ArchKind::ARMV9_3A:128 case ARM::ArchKind::ARMV9_4A:129 case ARM::ArchKind::ARMV9_5A:130 case ARM::ArchKind::ARMV9_6A:131 case ARM::ArchKind::ARMV9_7A:132 return ARM::ProfileKind::A;133 case ARM::ArchKind::ARMV4:134 case ARM::ArchKind::ARMV4T:135 case ARM::ArchKind::ARMV5T:136 case ARM::ArchKind::ARMV5TE:137 case ARM::ArchKind::ARMV5TEJ:138 case ARM::ArchKind::ARMV6:139 case ARM::ArchKind::ARMV6K:140 case ARM::ArchKind::ARMV6T2:141 case ARM::ArchKind::ARMV6KZ:142 case ARM::ArchKind::ARMV7S:143 case ARM::ArchKind::IWMMXT:144 case ARM::ArchKind::IWMMXT2:145 case ARM::ArchKind::XSCALE:146 case ARM::ArchKind::INVALID:147 return ARM::ProfileKind::INVALID;148 }149 llvm_unreachable("Unhandled architecture");150}151 152// Profile A/R/M153ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {154 Arch = getCanonicalArchName(Arch);155 return getProfileKind(parseArch(Arch));156}157 158bool ARM::getFPUFeatures(ARM::FPUKind FPUKind,159 std::vector<StringRef> &Features) {160 161 if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)162 return false;163 164 static const struct FPUFeatureNameInfo {165 const char *PlusName, *MinusName;166 FPUVersion MinVersion;167 FPURestriction MaxRestriction;168 } FPUFeatureInfoList[] = {169 // We have to specify the + and - versions of the name in full so170 // that we can return them as static StringRefs.171 //172 // Also, the SubtargetFeatures ending in just "sp" are listed here173 // under FPURestriction::None, which is the only FPURestriction in174 // which they would be valid (since FPURestriction::SP doesn't175 // exist).176 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},177 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},178 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},179 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},180 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},181 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},182 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},183 {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},184 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},185 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},186 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},187 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},188 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},189 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},190 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},191 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},192 {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},193 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},194 };195 196 for (const auto &Info: FPUFeatureInfoList) {197 if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&198 FPUNames[FPUKind].Restriction <= Info.MaxRestriction)199 Features.push_back(Info.PlusName);200 else201 Features.push_back(Info.MinusName);202 }203 204 static const struct NeonFeatureNameInfo {205 const char *PlusName, *MinusName;206 NeonSupportLevel MinSupportLevel;207 } NeonFeatureInfoList[] = {208 {"+neon", "-neon", NeonSupportLevel::Neon},209 {"+sha2", "-sha2", NeonSupportLevel::Crypto},210 {"+aes", "-aes", NeonSupportLevel::Crypto},211 };212 213 for (const auto &Info: NeonFeatureInfoList) {214 if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)215 Features.push_back(Info.PlusName);216 else217 Features.push_back(Info.MinusName);218 }219 220 return true;221}222 223ARM::FPUKind ARM::parseFPU(StringRef FPU) {224 StringRef Syn = getFPUSynonym(FPU);225 for (const auto &F : FPUNames) {226 if (Syn == F.Name)227 return F.ID;228 }229 return FK_INVALID;230}231 232ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(ARM::FPUKind FPUKind) {233 if (FPUKind >= FK_LAST)234 return NeonSupportLevel::None;235 return FPUNames[FPUKind].NeonSupport;236}237 238StringRef ARM::getFPUSynonym(StringRef FPU) {239 return StringSwitch<StringRef>(FPU)240 .Cases({"fpa", "fpe2", "fpe3", "maverick"}, "invalid") // Unsupported241 .Case("vfp2", "vfpv2")242 .Case("vfp3", "vfpv3")243 .Case("vfp4", "vfpv4")244 .Case("vfp3-d16", "vfpv3-d16")245 .Case("vfp4-d16", "vfpv4-d16")246 .Cases({"fp4-sp-d16", "vfpv4-sp-d16"}, "fpv4-sp-d16")247 .Cases({"fp4-dp-d16", "fpv4-dp-d16"}, "vfpv4-d16")248 .Case("fp5-sp-d16", "fpv5-sp-d16")249 .Cases({"fp5-dp-d16", "fpv5-dp-d16"}, "fpv5-d16")250 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.251 .Case("neon-vfpv3", "neon")252 .Default(FPU);253}254 255StringRef ARM::getFPUName(ARM::FPUKind FPUKind) {256 if (FPUKind >= FK_LAST)257 return StringRef();258 return FPUNames[FPUKind].Name;259}260 261ARM::FPUVersion ARM::getFPUVersion(ARM::FPUKind FPUKind) {262 if (FPUKind >= FK_LAST)263 return FPUVersion::NONE;264 return FPUNames[FPUKind].FPUVer;265}266 267ARM::FPURestriction ARM::getFPURestriction(ARM::FPUKind FPUKind) {268 if (FPUKind >= FK_LAST)269 return FPURestriction::None;270 return FPUNames[FPUKind].Restriction;271}272 273ARM::FPUKind ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {274 if (CPU == "generic")275 return ARM::ARMArchNames[static_cast<unsigned>(AK)].DefaultFPU;276 277 return StringSwitch<ARM::FPUKind>(CPU)278#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \279 .Case(NAME, DEFAULT_FPU)280#include "llvm/TargetParser/ARMTargetParser.def"281 .Default(ARM::FK_INVALID);282}283 284uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {285 if (CPU == "generic")286 return ARM::ARMArchNames[static_cast<unsigned>(AK)].ArchBaseExtensions;287 288 return StringSwitch<uint64_t>(CPU)289#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \290 .Case(NAME, \291 ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \292 DEFAULT_EXT)293#include "llvm/TargetParser/ARMTargetParser.def"294 .Default(ARM::AEK_INVALID);295}296 297bool ARM::getHWDivFeatures(uint64_t HWDivKind,298 std::vector<StringRef> &Features) {299 300 if (HWDivKind == AEK_INVALID)301 return false;302 303 if (HWDivKind & AEK_HWDIVARM)304 Features.push_back("+hwdiv-arm");305 else306 Features.push_back("-hwdiv-arm");307 308 if (HWDivKind & AEK_HWDIVTHUMB)309 Features.push_back("+hwdiv");310 else311 Features.push_back("-hwdiv");312 313 return true;314}315 316bool ARM::getExtensionFeatures(uint64_t Extensions,317 std::vector<StringRef> &Features) {318 319 if (Extensions == AEK_INVALID)320 return false;321 322 for (const auto &AE : ARCHExtNames) {323 if ((Extensions & AE.ID) == AE.ID && !AE.Feature.empty())324 Features.push_back(AE.Feature);325 else if (!AE.NegFeature.empty())326 Features.push_back(AE.NegFeature);327 }328 329 return getHWDivFeatures(Extensions, Features);330}331 332StringRef ARM::getArchName(ARM::ArchKind AK) {333 return ARMArchNames[static_cast<unsigned>(AK)].Name;334}335 336StringRef ARM::getCPUAttr(ARM::ArchKind AK) {337 return ARMArchNames[static_cast<unsigned>(AK)].CPUAttr;338}339 340StringRef ARM::getSubArch(ARM::ArchKind AK) {341 return ARMArchNames[static_cast<unsigned>(AK)].getSubArch();342}343 344unsigned ARM::getArchAttr(ARM::ArchKind AK) {345 return ARMArchNames[static_cast<unsigned>(AK)].ArchAttr;346}347 348StringRef ARM::getArchExtName(uint64_t ArchExtKind) {349 for (const auto &AE : ARCHExtNames) {350 if (ArchExtKind == AE.ID)351 return AE.Name;352 }353 return StringRef();354}355 356static bool stripNegationPrefix(StringRef &Name) {357 return Name.consume_front("no");358}359 360StringRef ARM::getArchExtFeature(StringRef ArchExt) {361 bool Negated = stripNegationPrefix(ArchExt);362 for (const auto &AE : ARCHExtNames) {363 if (!AE.Feature.empty() && ArchExt == AE.Name)364 return StringRef(Negated ? AE.NegFeature : AE.Feature);365 }366 367 return StringRef();368}369 370static ARM::FPUKind findDoublePrecisionFPU(ARM::FPUKind InputFPUKind) {371 if (InputFPUKind == ARM::FK_INVALID || InputFPUKind == ARM::FK_NONE)372 return ARM::FK_INVALID;373 374 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];375 376 // If the input FPU already supports double-precision, then there377 // isn't any different FPU we can return here.378 if (ARM::isDoublePrecision(InputFPU.Restriction))379 return InputFPUKind;380 381 // Otherwise, look for an FPU entry with all the same fields, except382 // that it supports double precision.383 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {384 if (CandidateFPU.FPUVer == InputFPU.FPUVer &&385 CandidateFPU.NeonSupport == InputFPU.NeonSupport &&386 ARM::has32Regs(CandidateFPU.Restriction) ==387 ARM::has32Regs(InputFPU.Restriction) &&388 ARM::isDoublePrecision(CandidateFPU.Restriction)) {389 return CandidateFPU.ID;390 }391 }392 393 // nothing found394 return ARM::FK_INVALID;395}396 397static ARM::FPUKind findSinglePrecisionFPU(ARM::FPUKind InputFPUKind) {398 if (InputFPUKind == ARM::FK_INVALID || InputFPUKind == ARM::FK_NONE)399 return ARM::FK_INVALID;400 401 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];402 403 // If the input FPU already is single-precision only, then there404 // isn't any different FPU we can return here.405 if (!ARM::isDoublePrecision(InputFPU.Restriction))406 return InputFPUKind;407 408 // Otherwise, look for an FPU entry that has the same FPUVer409 // and is not Double Precision. We want to allow for changing of410 // NEON Support and Restrictions so CPU's such as Cortex-R52 can411 // select between SP Only and Full DP modes.412 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {413 if (CandidateFPU.FPUVer == InputFPU.FPUVer &&414 !ARM::isDoublePrecision(CandidateFPU.Restriction)) {415 return CandidateFPU.ID;416 }417 }418 419 // nothing found420 return ARM::FK_INVALID;421}422 423bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK,424 StringRef ArchExt,425 std::vector<StringRef> &Features,426 ARM::FPUKind &ArgFPUKind) {427 428 size_t StartingNumFeatures = Features.size();429 const bool Negated = stripNegationPrefix(ArchExt);430 uint64_t ID = parseArchExt(ArchExt);431 432 if (ID == AEK_INVALID)433 return false;434 435 for (const auto &AE : ARCHExtNames) {436 if (Negated) {437 if ((AE.ID & ID) == ID && !AE.NegFeature.empty())438 Features.push_back(AE.NegFeature);439 } else {440 if ((AE.ID & ID) == AE.ID && !AE.Feature.empty())441 Features.push_back(AE.Feature);442 }443 }444 445 if (CPU == "")446 CPU = "generic";447 448 if (ArchExt == "fp" || ArchExt == "fp.dp") {449 const ARM::FPUKind DefaultFPU = getDefaultFPU(CPU, AK);450 ARM::FPUKind FPUKind;451 if (ArchExt == "fp.dp") {452 const bool IsDP = ArgFPUKind != ARM::FK_INVALID &&453 ArgFPUKind != ARM::FK_NONE &&454 isDoublePrecision(getFPURestriction(ArgFPUKind));455 if (Negated) {456 /* If there is no FPU selected yet, we still need to set ArgFPUKind, as457 * leaving it as FK_INVALID, would cause default FPU to be selected458 * later and that could be double precision one. */459 if (ArgFPUKind != ARM::FK_INVALID && !IsDP)460 return true;461 FPUKind = findSinglePrecisionFPU(DefaultFPU);462 if (FPUKind == ARM::FK_INVALID)463 FPUKind = ARM::FK_NONE;464 } else {465 if (IsDP)466 return true;467 FPUKind = findDoublePrecisionFPU(DefaultFPU);468 if (FPUKind == ARM::FK_INVALID)469 return false;470 }471 } else if (Negated) {472 FPUKind = ARM::FK_NONE;473 } else {474 FPUKind = DefaultFPU;475 }476 ArgFPUKind = FPUKind;477 return true;478 }479 return StartingNumFeatures != Features.size();480}481 482ARM::ArchKind ARM::convertV9toV8(ARM::ArchKind AK) {483 if (getProfileKind(AK) != ProfileKind::A)484 return ARM::ArchKind::INVALID;485 if (AK < ARM::ArchKind::ARMV9A || AK > ARM::ArchKind::ARMV9_3A)486 return ARM::ArchKind::INVALID;487 unsigned AK_v8 = static_cast<unsigned>(ARM::ArchKind::ARMV8_5A);488 AK_v8 += static_cast<unsigned>(AK) -489 static_cast<unsigned>(ARM::ArchKind::ARMV9A);490 return static_cast<ARM::ArchKind>(AK_v8);491}492 493StringRef ARM::getDefaultCPU(StringRef Arch) {494 ArchKind AK = parseArch(Arch);495 if (AK == ArchKind::INVALID)496 return StringRef();497 498 // Look for multiple AKs to find the default for pair AK+Name.499 for (const auto &CPU : CPUNames) {500 if (CPU.ArchID == AK && CPU.Default)501 return CPU.Name;502 }503 504 // If we can't find a default then target the architecture instead505 return "generic";506}507 508uint64_t ARM::parseHWDiv(StringRef HWDiv) {509 StringRef Syn = getHWDivSynonym(HWDiv);510 for (const auto &D : HWDivNames) {511 if (Syn == D.Name)512 return D.ID;513 }514 return AEK_INVALID;515}516 517uint64_t ARM::parseArchExt(StringRef ArchExt) {518 for (const auto &A : ARCHExtNames) {519 if (ArchExt == A.Name)520 return A.ID;521 }522 return AEK_INVALID;523}524 525ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {526 for (const auto &C : CPUNames) {527 if (CPU == C.Name)528 return C.ArchID;529 }530 return ArchKind::INVALID;531}532 533void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {534 for (const auto &Arch : CPUNames) {535 if (Arch.ArchID != ArchKind::INVALID)536 Values.push_back(Arch.Name);537 }538}539 540StringRef ARM::computeDefaultTargetABI(const Triple &TT) {541 StringRef ArchName = TT.getArchName();542 543 if (TT.isOSBinFormatMachO()) {544 if (TT.getEnvironment() == Triple::EABI ||545 TT.getOS() == Triple::UnknownOS ||546 parseArchProfile(ArchName) == ProfileKind::M)547 return "aapcs";548 if (TT.isWatchABI())549 return "aapcs16";550 return "apcs-gnu";551 } else if (TT.isOSWindows())552 // FIXME: this is invalid for WindowsCE.553 return "aapcs";554 555 // Select the default based on the platform.556 switch (TT.getEnvironment()) {557 case Triple::Android:558 case Triple::GNUEABI:559 case Triple::GNUEABIT64:560 case Triple::GNUEABIHF:561 case Triple::GNUEABIHFT64:562 case Triple::MuslEABI:563 case Triple::MuslEABIHF:564 case Triple::OpenHOS:565 return "aapcs-linux";566 case Triple::EABIHF:567 case Triple::EABI:568 return "aapcs";569 default:570 if (TT.isOSNetBSD())571 return "apcs-gnu";572 if (TT.isOSFreeBSD() || TT.isOSFuchsia() || TT.isOSOpenBSD() ||573 TT.isOSHaiku() || TT.isOHOSFamily())574 return "aapcs-linux";575 return "aapcs";576 }577}578 579ARM::ARMABI ARM::computeTargetABI(const Triple &TT, StringRef ABIName) {580 if (ABIName.empty())581 ABIName = ARM::computeDefaultTargetABI(TT);582 583 if (ABIName == "aapcs16")584 return ARM_ABI_AAPCS16;585 586 if (ABIName.starts_with("aapcs"))587 return ARM_ABI_AAPCS;588 589 if (ABIName.starts_with("apcs"))590 return ARM_ABI_APCS;591 592 return ARM_ABI_UNKNOWN;593}594 595StringRef ARM::getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch) {596 if (MArch.empty())597 MArch = Triple.getArchName();598 MArch = llvm::ARM::getCanonicalArchName(MArch);599 600 // Some defaults are forced.601 switch (Triple.getOS()) {602 case llvm::Triple::FreeBSD:603 case llvm::Triple::NetBSD:604 case llvm::Triple::OpenBSD:605 case llvm::Triple::Haiku:606 if (!MArch.empty() && MArch == "v6")607 return "arm1176jzf-s";608 if (!MArch.empty() && MArch == "v7")609 return "cortex-a8";610 break;611 case llvm::Triple::Win32:612 // FIXME: this is invalid for WindowsCE613 if (llvm::ARM::parseArchVersion(MArch) <= 7)614 return "cortex-a9";615 break;616 case llvm::Triple::IOS:617 case llvm::Triple::MacOSX:618 case llvm::Triple::TvOS:619 case llvm::Triple::WatchOS:620 case llvm::Triple::DriverKit:621 case llvm::Triple::XROS:622 if (MArch == "v7k")623 return "cortex-a7";624 break;625 default:626 break;627 }628 629 if (MArch.empty())630 return StringRef();631 632 StringRef CPU = llvm::ARM::getDefaultCPU(MArch);633 if (!CPU.empty() && CPU != "invalid")634 return CPU;635 636 // If no specific architecture version is requested, return the minimum CPU637 // required by the OS and environment.638 switch (Triple.getOS()) {639 case llvm::Triple::Haiku:640 return "arm1176jzf-s";641 case llvm::Triple::NetBSD:642 switch (Triple.getEnvironment()) {643 case llvm::Triple::EABI:644 case llvm::Triple::EABIHF:645 case llvm::Triple::GNUEABI:646 case llvm::Triple::GNUEABIHF:647 return "arm926ej-s";648 default:649 return "strongarm";650 }651 case llvm::Triple::OpenBSD:652 return "cortex-a8";653 case llvm::Triple::Fuchsia:654 return "cortex-a53";655 default:656 switch (Triple.getEnvironment()) {657 case llvm::Triple::EABIHF:658 case llvm::Triple::GNUEABIHF:659 case llvm::Triple::GNUEABIHFT64:660 case llvm::Triple::MuslEABIHF:661 return "arm1176jzf-s";662 default:663 return "arm7tdmi";664 }665 }666 667 llvm_unreachable("invalid arch name");668}669 670void ARM::PrintSupportedExtensions(StringMap<StringRef> DescMap) {671 outs() << "All available -march extensions for ARM\n\n"672 << " " << left_justify("Name", 20)673 << (DescMap.empty() ? "\n" : "Description\n");674 for (const auto &Ext : ARCHExtNames) {675 // Extensions without a feature cannot be used with -march.676 if (!Ext.Feature.empty()) {677 std::string Description = DescMap[Ext.Name].str();678 // With SIMD, this links to the NEON feature, so the description should be679 // taken from here, as SIMD does not exist in TableGen.680 if (Ext.Name == "simd")681 Description = DescMap["neon"].str();682 outs() << " "683 << format(Description.empty() ? "%s\n" : "%-20s%s\n",684 Ext.Name.str().c_str(), Description.c_str());685 }686 }687}688