653 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py2; RUN: opt < %s -mtriple=aarch64-unknown-linux-gnu -mattr=+sve2 -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output | FileCheck %s3 4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"5 6define void @srem() {7; CHECK-LABEL: 'srem'8; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i64 = srem <2 x i64> undef, undef9; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = srem <4 x i64> undef, undef10; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V8i64 = srem <8 x i64> undef, undef11; CHECK-NEXT: Cost Model: Found costs of RThru:3 CodeSize:4 Lat:4 SizeLat:4 for: %V2i32 = srem <2 x i32> undef, undef12; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i32 = srem <4 x i32> undef, undef13; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = srem <8 x i32> undef, undef14; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V16i32 = srem <16 x i32> undef, undef15; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i16 = srem <2 x i16> undef, undef16; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V4i16 = srem <4 x i16> undef, undef17; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %V8i16 = srem <8 x i16> undef, undef18; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = srem <16 x i16> undef, undef19; CHECK-NEXT: Cost Model: Found costs of RThru:40 CodeSize:4 Lat:4 SizeLat:4 for: %V32i16 = srem <32 x i16> undef, undef20; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i8 = srem <2 x i8> undef, undef21; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %V4i8 = srem <4 x i8> undef, undef22; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %V8i8 = srem <8 x i8> undef, undef23; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %V16i8 = srem <16 x i8> undef, undef24; CHECK-NEXT: Cost Model: Found costs of RThru:36 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = srem <32 x i8> undef, undef25; CHECK-NEXT: Cost Model: Found costs of RThru:72 CodeSize:4 Lat:4 SizeLat:4 for: %V64i8 = srem <64 x i8> undef, undef26; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = srem <vscale x 2 x i128> undef, undef27; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i64 = srem <vscale x 2 x i64> undef, undef28; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i64 = srem <vscale x 4 x i64> undef, undef29; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i64 = srem <vscale x 8 x i64> undef, undef30; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i32 = srem <vscale x 2 x i32> undef, undef31; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i32 = srem <vscale x 4 x i32> undef, undef32; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i32 = srem <vscale x 8 x i32> undef, undef33; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i32 = srem <vscale x 16 x i32> undef, undef34; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i16 = srem <vscale x 2 x i16> undef, undef35; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i16 = srem <vscale x 4 x i16> undef, undef36; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = srem <vscale x 8 x i16> undef, undef37; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i16 = srem <vscale x 16 x i16> undef, undef38; CHECK-NEXT: Cost Model: Found costs of RThru:40 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i16 = srem <vscale x 32 x i16> undef, undef39; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i8 = srem <vscale x 2 x i8> undef, undef40; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i8 = srem <vscale x 4 x i8> undef, undef41; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = srem <vscale x 8 x i8> undef, undef42; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = srem <vscale x 16 x i8> undef, undef43; CHECK-NEXT: Cost Model: Found costs of RThru:36 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i8 = srem <vscale x 32 x i8> undef, undef44; CHECK-NEXT: Cost Model: Found costs of RThru:72 CodeSize:4 Lat:4 SizeLat:4 for: %NV64i8 = srem <vscale x 64 x i8> undef, undef45; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void46;47 %V2i64 = srem <2 x i64> undef, undef48 %V4i64 = srem <4 x i64> undef, undef49 %V8i64 = srem <8 x i64> undef, undef50 %V2i32 = srem <2 x i32> undef, undef51 %V4i32 = srem <4 x i32> undef, undef52 %V8i32 = srem <8 x i32> undef, undef53 %V16i32 = srem <16 x i32> undef, undef54 %V2i16 = srem <2 x i16> undef, undef55 %V4i16 = srem <4 x i16> undef, undef56 %V8i16 = srem <8 x i16> undef, undef57 %V16i16 = srem <16 x i16> undef, undef58 %V32i16 = srem <32 x i16> undef, undef59 %V2i8 = srem <2 x i8> undef, undef60 %V4i8 = srem <4 x i8> undef, undef61 %V8i8 = srem <8 x i8> undef, undef62 %V16i8 = srem <16 x i8> undef, undef63 %V32i8 = srem <32 x i8> undef, undef64 %V64i8 = srem <64 x i8> undef, undef65 %NV2i128 = srem <vscale x 2 x i128> undef, undef66 %NV2i64 = srem <vscale x 2 x i64> undef, undef67 %NV4i64 = srem <vscale x 4 x i64> undef, undef68 %NV8i64 = srem <vscale x 8 x i64> undef, undef69 %NV2i32 = srem <vscale x 2 x i32> undef, undef70 %NV4i32 = srem <vscale x 4 x i32> undef, undef71 %NV8i32 = srem <vscale x 8 x i32> undef, undef72 %NV16i32 = srem <vscale x 16 x i32> undef, undef73 %NV2i16 = srem <vscale x 2 x i16> undef, undef74 %NV4i16 = srem <vscale x 4 x i16> undef, undef75 %NV8i16 = srem <vscale x 8 x i16> undef, undef76 %NV16i16 = srem <vscale x 16 x i16> undef, undef77 %NV32i16 = srem <vscale x 32 x i16> undef, undef78 %NV2i8 = srem <vscale x 2 x i8> undef, undef79 %NV4i8 = srem <vscale x 4 x i8> undef, undef80 %NV8i8 = srem <vscale x 8 x i8> undef, undef81 %NV16i8 = srem <vscale x 16 x i8> undef, undef82 %NV32i8 = srem <vscale x 32 x i8> undef, undef83 %NV64i8 = srem <vscale x 64 x i8> undef, undef84 ret void85}86 87define void @urem() {88; CHECK-LABEL: 'urem'89; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i64 = urem <2 x i64> undef, undef90; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = urem <4 x i64> undef, undef91; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V8i64 = urem <8 x i64> undef, undef92; CHECK-NEXT: Cost Model: Found costs of RThru:3 CodeSize:4 Lat:4 SizeLat:4 for: %V2i32 = urem <2 x i32> undef, undef93; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i32 = urem <4 x i32> undef, undef94; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = urem <8 x i32> undef, undef95; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V16i32 = urem <16 x i32> undef, undef96; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i16 = urem <2 x i16> undef, undef97; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V4i16 = urem <4 x i16> undef, undef98; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %V8i16 = urem <8 x i16> undef, undef99; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = urem <16 x i16> undef, undef100; CHECK-NEXT: Cost Model: Found costs of RThru:40 CodeSize:4 Lat:4 SizeLat:4 for: %V32i16 = urem <32 x i16> undef, undef101; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i8 = urem <2 x i8> undef, undef102; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %V4i8 = urem <4 x i8> undef, undef103; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %V8i8 = urem <8 x i8> undef, undef104; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %V16i8 = urem <16 x i8> undef, undef105; CHECK-NEXT: Cost Model: Found costs of RThru:36 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = urem <32 x i8> undef, undef106; CHECK-NEXT: Cost Model: Found costs of RThru:72 CodeSize:4 Lat:4 SizeLat:4 for: %V64i8 = urem <64 x i8> undef, undef107; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = urem <vscale x 2 x i128> undef, undef108; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i64 = urem <vscale x 2 x i64> undef, undef109; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i64 = urem <vscale x 4 x i64> undef, undef110; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i64 = urem <vscale x 8 x i64> undef, undef111; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i32 = urem <vscale x 2 x i32> undef, undef112; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i32 = urem <vscale x 4 x i32> undef, undef113; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i32 = urem <vscale x 8 x i32> undef, undef114; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i32 = urem <vscale x 16 x i32> undef, undef115; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i16 = urem <vscale x 2 x i16> undef, undef116; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i16 = urem <vscale x 4 x i16> undef, undef117; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = urem <vscale x 8 x i16> undef, undef118; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i16 = urem <vscale x 16 x i16> undef, undef119; CHECK-NEXT: Cost Model: Found costs of RThru:40 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i16 = urem <vscale x 32 x i16> undef, undef120; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV2i8 = urem <vscale x 2 x i8> undef, undef121; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i8 = urem <vscale x 4 x i8> undef, undef122; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = urem <vscale x 8 x i8> undef, undef123; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = urem <vscale x 16 x i8> undef, undef124; CHECK-NEXT: Cost Model: Found costs of RThru:36 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i8 = urem <vscale x 32 x i8> undef, undef125; CHECK-NEXT: Cost Model: Found costs of RThru:72 CodeSize:4 Lat:4 SizeLat:4 for: %NV64i8 = urem <vscale x 64 x i8> undef, undef126; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void127;128 %V2i64 = urem <2 x i64> undef, undef129 %V4i64 = urem <4 x i64> undef, undef130 %V8i64 = urem <8 x i64> undef, undef131 %V2i32 = urem <2 x i32> undef, undef132 %V4i32 = urem <4 x i32> undef, undef133 %V8i32 = urem <8 x i32> undef, undef134 %V16i32 = urem <16 x i32> undef, undef135 %V2i16 = urem <2 x i16> undef, undef136 %V4i16 = urem <4 x i16> undef, undef137 %V8i16 = urem <8 x i16> undef, undef138 %V16i16 = urem <16 x i16> undef, undef139 %V32i16 = urem <32 x i16> undef, undef140 %V2i8 = urem <2 x i8> undef, undef141 %V4i8 = urem <4 x i8> undef, undef142 %V8i8 = urem <8 x i8> undef, undef143 %V16i8 = urem <16 x i8> undef, undef144 %V32i8 = urem <32 x i8> undef, undef145 %V64i8 = urem <64 x i8> undef, undef146 %NV2i128 = urem <vscale x 2 x i128> undef, undef147 %NV2i64 = urem <vscale x 2 x i64> undef, undef148 %NV4i64 = urem <vscale x 4 x i64> undef, undef149 %NV8i64 = urem <vscale x 8 x i64> undef, undef150 %NV2i32 = urem <vscale x 2 x i32> undef, undef151 %NV4i32 = urem <vscale x 4 x i32> undef, undef152 %NV8i32 = urem <vscale x 8 x i32> undef, undef153 %NV16i32 = urem <vscale x 16 x i32> undef, undef154 %NV2i16 = urem <vscale x 2 x i16> undef, undef155 %NV4i16 = urem <vscale x 4 x i16> undef, undef156 %NV8i16 = urem <vscale x 8 x i16> undef, undef157 %NV16i16 = urem <vscale x 16 x i16> undef, undef158 %NV32i16 = urem <vscale x 32 x i16> undef, undef159 %NV2i8 = urem <vscale x 2 x i8> undef, undef160 %NV4i8 = urem <vscale x 4 x i8> undef, undef161 %NV8i8 = urem <vscale x 8 x i8> undef, undef162 %NV16i8 = urem <vscale x 16 x i8> undef, undef163 %NV32i8 = urem <vscale x 32 x i8> undef, undef164 %NV64i8 = urem <vscale x 64 x i8> undef, undef165 ret void166}167 168define void @srem_uniformconst() {169; CHECK-LABEL: 'srem_uniformconst'170; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V2i64 = srem <2 x i64> undef, splat (i64 7)171; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = srem <4 x i64> undef, splat (i64 7)172; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V8i64 = srem <8 x i64> undef, splat (i64 7)173; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V2i32 = srem <2 x i32> undef, splat (i32 7)174; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V4i32 = srem <4 x i32> undef, splat (i32 7)175; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = srem <8 x i32> undef, splat (i32 7)176; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %V16i32 = srem <16 x i32> undef, splat (i32 7)177; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V2i16 = srem <2 x i16> undef, splat (i16 7)178; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V4i16 = srem <4 x i16> undef, splat (i16 7)179; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V8i16 = srem <8 x i16> undef, splat (i16 7)180; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = srem <16 x i16> undef, splat (i16 7)181; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %V32i16 = srem <32 x i16> undef, splat (i16 7)182; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V2i8 = srem <2 x i8> undef, splat (i8 7)183; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V4i8 = srem <4 x i8> undef, splat (i8 7)184; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V8i8 = srem <8 x i8> undef, splat (i8 7)185; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %V16i8 = srem <16 x i8> undef, splat (i8 7)186; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = srem <32 x i8> undef, splat (i8 7)187; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %V64i8 = srem <64 x i8> undef, splat (i8 7)188; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 7)189; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 7)190; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 7)191; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 7)192; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i32 = srem <vscale x 2 x i32> undef, splat (i32 7)193; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i32 = srem <vscale x 4 x i32> undef, splat (i32 7)194; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i32 = srem <vscale x 8 x i32> undef, splat (i32 7)195; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i32 = srem <vscale x 16 x i32> undef, splat (i32 7)196; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i16 = srem <vscale x 2 x i16> undef, splat (i16 7)197; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i16 = srem <vscale x 4 x i16> undef, splat (i16 7)198; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = srem <vscale x 8 x i16> undef, splat (i16 7)199; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i16 = srem <vscale x 16 x i16> undef, splat (i16 7)200; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i16 = srem <vscale x 32 x i16> undef, splat (i16 7)201; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i8 = srem <vscale x 2 x i8> undef, splat (i8 7)202; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i8 = srem <vscale x 4 x i8> undef, splat (i8 7)203; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = srem <vscale x 8 x i8> undef, splat (i8 7)204; CHECK-NEXT: Cost Model: Found costs of RThru:5 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = srem <vscale x 16 x i8> undef, splat (i8 7)205; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i8 = srem <vscale x 32 x i8> undef, splat (i8 7)206; CHECK-NEXT: Cost Model: Found costs of RThru:20 CodeSize:4 Lat:4 SizeLat:4 for: %NV64i8 = srem <vscale x 64 x i8> undef, splat (i8 7)207; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void208;209 %V2i64 = srem <2 x i64> undef, splat (i64 7)210 %V4i64 = srem <4 x i64> undef, splat (i64 7)211 %V8i64 = srem <8 x i64> undef, splat (i64 7)212 %V2i32 = srem <2 x i32> undef, splat (i32 7)213 %V4i32 = srem <4 x i32> undef, splat (i32 7)214 %V8i32 = srem <8 x i32> undef, splat (i32 7)215 %V16i32 = srem <16 x i32> undef, splat (i32 7)216 %V2i16 = srem <2 x i16> undef, splat (i16 7)217 %V4i16 = srem <4 x i16> undef, splat (i16 7)218 %V8i16 = srem <8 x i16> undef, splat (i16 7)219 %V16i16 = srem <16 x i16> undef, splat (i16 7)220 %V32i16 = srem <32 x i16> undef, splat (i16 7)221 %V2i8 = srem <2 x i8> undef, splat (i8 7)222 %V4i8 = srem <4 x i8> undef, splat (i8 7)223 %V8i8 = srem <8 x i8> undef, splat (i8 7)224 %V16i8 = srem <16 x i8> undef, splat (i8 7)225 %V32i8 = srem <32 x i8> undef, splat (i8 7)226 %V64i8 = srem <64 x i8> undef, splat (i8 7)227 %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 7)228 %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 7)229 %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 7)230 %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 7)231 %NV2i32 = srem <vscale x 2 x i32> undef, splat (i32 7)232 %NV4i32 = srem <vscale x 4 x i32> undef, splat (i32 7)233 %NV8i32 = srem <vscale x 8 x i32> undef, splat (i32 7)234 %NV16i32 = srem <vscale x 16 x i32> undef, splat (i32 7)235 %NV2i16 = srem <vscale x 2 x i16> undef, splat (i16 7)236 %NV4i16 = srem <vscale x 4 x i16> undef, splat (i16 7)237 %NV8i16 = srem <vscale x 8 x i16> undef, splat (i16 7)238 %NV16i16 = srem <vscale x 16 x i16> undef, splat (i16 7)239 %NV32i16 = srem <vscale x 32 x i16> undef, splat (i16 7)240 %NV2i8 = srem <vscale x 2 x i8> undef, splat (i8 7)241 %NV4i8 = srem <vscale x 4 x i8> undef, splat (i8 7)242 %NV8i8 = srem <vscale x 8 x i8> undef, splat (i8 7)243 %NV16i8 = srem <vscale x 16 x i8> undef, splat (i8 7)244 %NV32i8 = srem <vscale x 32 x i8> undef, splat (i8 7)245 %NV64i8 = srem <vscale x 64 x i8> undef, splat (i8 7)246 ret void247}248 249define void @urem_uniformconst() {250; CHECK-LABEL: 'urem_uniformconst'251; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V2i64 = urem <2 x i64> undef, splat (i64 7)252; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = urem <4 x i64> undef, splat (i64 7)253; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V8i64 = urem <8 x i64> undef, splat (i64 7)254; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i32 = urem <2 x i32> undef, splat (i32 7)255; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V4i32 = urem <4 x i32> undef, splat (i32 7)256; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = urem <8 x i32> undef, splat (i32 7)257; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V16i32 = urem <16 x i32> undef, splat (i32 7)258; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i16 = urem <2 x i16> undef, splat (i16 7)259; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V4i16 = urem <4 x i16> undef, splat (i16 7)260; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V8i16 = urem <8 x i16> undef, splat (i16 7)261; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = urem <16 x i16> undef, splat (i16 7)262; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V32i16 = urem <32 x i16> undef, splat (i16 7)263; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i8 = urem <2 x i8> undef, splat (i8 7)264; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V4i8 = urem <4 x i8> undef, splat (i8 7)265; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V8i8 = urem <8 x i8> undef, splat (i8 7)266; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V16i8 = urem <16 x i8> undef, splat (i8 7)267; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = urem <32 x i8> undef, splat (i8 7)268; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V64i8 = urem <64 x i8> undef, splat (i8 7)269; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 7)270; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 7)271; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 7)272; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 7)273; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i32 = urem <vscale x 2 x i32> undef, splat (i32 7)274; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i32 = urem <vscale x 4 x i32> undef, splat (i32 7)275; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i32 = urem <vscale x 8 x i32> undef, splat (i32 7)276; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i32 = urem <vscale x 16 x i32> undef, splat (i32 7)277; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i16 = urem <vscale x 2 x i16> undef, splat (i16 7)278; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i16 = urem <vscale x 4 x i16> undef, splat (i16 7)279; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = urem <vscale x 8 x i16> undef, splat (i16 7)280; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i16 = urem <vscale x 16 x i16> undef, splat (i16 7)281; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i16 = urem <vscale x 32 x i16> undef, splat (i16 7)282; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i8 = urem <vscale x 2 x i8> undef, splat (i8 7)283; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i8 = urem <vscale x 4 x i8> undef, splat (i8 7)284; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = urem <vscale x 8 x i8> undef, splat (i8 7)285; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = urem <vscale x 16 x i8> undef, splat (i8 7)286; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i8 = urem <vscale x 32 x i8> undef, splat (i8 7)287; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV64i8 = urem <vscale x 64 x i8> undef, splat (i8 7)288; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void289;290 %V2i64 = urem <2 x i64> undef, splat (i64 7)291 %V4i64 = urem <4 x i64> undef, splat (i64 7)292 %V8i64 = urem <8 x i64> undef, splat (i64 7)293 %V2i32 = urem <2 x i32> undef, splat (i32 7)294 %V4i32 = urem <4 x i32> undef, splat (i32 7)295 %V8i32 = urem <8 x i32> undef, splat (i32 7)296 %V16i32 = urem <16 x i32> undef, splat (i32 7)297 %V2i16 = urem <2 x i16> undef, splat (i16 7)298 %V4i16 = urem <4 x i16> undef, splat (i16 7)299 %V8i16 = urem <8 x i16> undef, splat (i16 7)300 %V16i16 = urem <16 x i16> undef, splat (i16 7)301 %V32i16 = urem <32 x i16> undef, splat (i16 7)302 %V2i8 = urem <2 x i8> undef, splat (i8 7)303 %V4i8 = urem <4 x i8> undef, splat (i8 7)304 %V8i8 = urem <8 x i8> undef, splat (i8 7)305 %V16i8 = urem <16 x i8> undef, splat (i8 7)306 %V32i8 = urem <32 x i8> undef, splat (i8 7)307 %V64i8 = urem <64 x i8> undef, splat (i8 7)308 %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 7)309 %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 7)310 %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 7)311 %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 7)312 %NV2i32 = urem <vscale x 2 x i32> undef, splat (i32 7)313 %NV4i32 = urem <vscale x 4 x i32> undef, splat (i32 7)314 %NV8i32 = urem <vscale x 8 x i32> undef, splat (i32 7)315 %NV16i32 = urem <vscale x 16 x i32> undef, splat (i32 7)316 %NV2i16 = urem <vscale x 2 x i16> undef, splat (i16 7)317 %NV4i16 = urem <vscale x 4 x i16> undef, splat (i16 7)318 %NV8i16 = urem <vscale x 8 x i16> undef, splat (i16 7)319 %NV16i16 = urem <vscale x 16 x i16> undef, splat (i16 7)320 %NV32i16 = urem <vscale x 32 x i16> undef, splat (i16 7)321 %NV2i8 = urem <vscale x 2 x i8> undef, splat (i8 7)322 %NV4i8 = urem <vscale x 4 x i8> undef, splat (i8 7)323 %NV8i8 = urem <vscale x 8 x i8> undef, splat (i8 7)324 %NV16i8 = urem <vscale x 16 x i8> undef, splat (i8 7)325 %NV32i8 = urem <vscale x 32 x i8> undef, splat (i8 7)326 %NV64i8 = urem <vscale x 64 x i8> undef, splat (i8 7)327 ret void328}329 330define void @srem_uniformconstpow2() {331; CHECK-LABEL: 'srem_uniformconstpow2'332; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i64 = srem <2 x i64> undef, splat (i64 16)333; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = srem <4 x i64> undef, splat (i64 16)334; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V8i64 = srem <8 x i64> undef, splat (i64 16)335; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i32 = srem <2 x i32> undef, splat (i32 16)336; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i32 = srem <4 x i32> undef, splat (i32 16)337; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = srem <8 x i32> undef, splat (i32 16)338; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V16i32 = srem <16 x i32> undef, splat (i32 16)339; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i16 = srem <2 x i16> undef, splat (i16 16)340; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i16 = srem <4 x i16> undef, splat (i16 16)341; CHECK-NEXT: Cost Model: Found costs of 4 for: %V8i16 = srem <8 x i16> undef, splat (i16 16)342; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = srem <16 x i16> undef, splat (i16 16)343; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V32i16 = srem <32 x i16> undef, splat (i16 16)344; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i8 = srem <2 x i8> undef, splat (i8 16)345; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i8 = srem <4 x i8> undef, splat (i8 16)346; CHECK-NEXT: Cost Model: Found costs of 4 for: %V8i8 = srem <8 x i8> undef, splat (i8 16)347; CHECK-NEXT: Cost Model: Found costs of 4 for: %V16i8 = srem <16 x i8> undef, splat (i8 16)348; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = srem <32 x i8> undef, splat (i8 16)349; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V64i8 = srem <64 x i8> undef, splat (i8 16)350; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 16)351; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 16)352; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 16)353; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 16)354; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i32 = srem <vscale x 2 x i32> undef, splat (i32 16)355; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i32 = srem <vscale x 4 x i32> undef, splat (i32 16)356; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV8i32 = srem <vscale x 8 x i32> undef, splat (i32 16)357; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i32 = srem <vscale x 16 x i32> undef, splat (i32 16)358; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i16 = srem <vscale x 2 x i16> undef, splat (i16 16)359; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i16 = srem <vscale x 4 x i16> undef, splat (i16 16)360; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = srem <vscale x 8 x i16> undef, splat (i16 16)361; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV16i16 = srem <vscale x 16 x i16> undef, splat (i16 16)362; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i16 = srem <vscale x 32 x i16> undef, splat (i16 16)363; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i8 = srem <vscale x 2 x i8> undef, splat (i8 16)364; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i8 = srem <vscale x 4 x i8> undef, splat (i8 16)365; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = srem <vscale x 8 x i8> undef, splat (i8 16)366; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = srem <vscale x 16 x i8> undef, splat (i8 16)367; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV32i8 = srem <vscale x 32 x i8> undef, splat (i8 16)368; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV64i8 = srem <vscale x 64 x i8> undef, splat (i8 16)369; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void370;371 %V2i64 = srem <2 x i64> undef, splat (i64 16)372 %V4i64 = srem <4 x i64> undef, splat (i64 16)373 %V8i64 = srem <8 x i64> undef, splat (i64 16)374 %V2i32 = srem <2 x i32> undef, splat (i32 16)375 %V4i32 = srem <4 x i32> undef, splat (i32 16)376 %V8i32 = srem <8 x i32> undef, splat (i32 16)377 %V16i32 = srem <16 x i32> undef, splat (i32 16)378 %V2i16 = srem <2 x i16> undef, splat (i16 16)379 %V4i16 = srem <4 x i16> undef, splat (i16 16)380 %V8i16 = srem <8 x i16> undef, splat (i16 16)381 %V16i16 = srem <16 x i16> undef, splat (i16 16)382 %V32i16 = srem <32 x i16> undef, splat (i16 16)383 %V2i8 = srem <2 x i8> undef, splat (i8 16)384 %V4i8 = srem <4 x i8> undef, splat (i8 16)385 %V8i8 = srem <8 x i8> undef, splat (i8 16)386 %V16i8 = srem <16 x i8> undef, splat (i8 16)387 %V32i8 = srem <32 x i8> undef, splat (i8 16)388 %V64i8 = srem <64 x i8> undef, splat (i8 16)389 %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 16)390 %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 16)391 %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 16)392 %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 16)393 %NV2i32 = srem <vscale x 2 x i32> undef, splat (i32 16)394 %NV4i32 = srem <vscale x 4 x i32> undef, splat (i32 16)395 %NV8i32 = srem <vscale x 8 x i32> undef, splat (i32 16)396 %NV16i32 = srem <vscale x 16 x i32> undef, splat (i32 16)397 %NV2i16 = srem <vscale x 2 x i16> undef, splat (i16 16)398 %NV4i16 = srem <vscale x 4 x i16> undef, splat (i16 16)399 %NV8i16 = srem <vscale x 8 x i16> undef, splat (i16 16)400 %NV16i16 = srem <vscale x 16 x i16> undef, splat (i16 16)401 %NV32i16 = srem <vscale x 32 x i16> undef, splat (i16 16)402 %NV2i8 = srem <vscale x 2 x i8> undef, splat (i8 16)403 %NV4i8 = srem <vscale x 4 x i8> undef, splat (i8 16)404 %NV8i8 = srem <vscale x 8 x i8> undef, splat (i8 16)405 %NV16i8 = srem <vscale x 16 x i8> undef, splat (i8 16)406 %NV32i8 = srem <vscale x 32 x i8> undef, splat (i8 16)407 %NV64i8 = srem <vscale x 64 x i8> undef, splat (i8 16)408 ret void409}410 411define void @urem_uniformconstpow2() {412; CHECK-LABEL: 'urem_uniformconstpow2'413; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V2i64 = urem <2 x i64> undef, splat (i64 16)414; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = urem <4 x i64> undef, splat (i64 16)415; CHECK-NEXT: Cost Model: Found costs of 4 for: %V8i64 = urem <8 x i64> undef, splat (i64 16)416; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V2i32 = urem <2 x i32> undef, splat (i32 16)417; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V4i32 = urem <4 x i32> undef, splat (i32 16)418; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = urem <8 x i32> undef, splat (i32 16)419; CHECK-NEXT: Cost Model: Found costs of 4 for: %V16i32 = urem <16 x i32> undef, splat (i32 16)420; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V2i16 = urem <2 x i16> undef, splat (i16 16)421; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V4i16 = urem <4 x i16> undef, splat (i16 16)422; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V8i16 = urem <8 x i16> undef, splat (i16 16)423; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = urem <16 x i16> undef, splat (i16 16)424; CHECK-NEXT: Cost Model: Found costs of 4 for: %V32i16 = urem <32 x i16> undef, splat (i16 16)425; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V2i8 = urem <2 x i8> undef, splat (i8 16)426; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V4i8 = urem <4 x i8> undef, splat (i8 16)427; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V8i8 = urem <8 x i8> undef, splat (i8 16)428; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %V16i8 = urem <16 x i8> undef, splat (i8 16)429; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = urem <32 x i8> undef, splat (i8 16)430; CHECK-NEXT: Cost Model: Found costs of 4 for: %V64i8 = urem <64 x i8> undef, splat (i8 16)431; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 16)432; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 16)433; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 16)434; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 16)435; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i32 = urem <vscale x 2 x i32> undef, splat (i32 16)436; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i32 = urem <vscale x 4 x i32> undef, splat (i32 16)437; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i32 = urem <vscale x 8 x i32> undef, splat (i32 16)438; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV16i32 = urem <vscale x 16 x i32> undef, splat (i32 16)439; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i16 = urem <vscale x 2 x i16> undef, splat (i16 16)440; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i16 = urem <vscale x 4 x i16> undef, splat (i16 16)441; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = urem <vscale x 8 x i16> undef, splat (i16 16)442; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i16 = urem <vscale x 16 x i16> undef, splat (i16 16)443; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV32i16 = urem <vscale x 32 x i16> undef, splat (i16 16)444; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i8 = urem <vscale x 2 x i8> undef, splat (i8 16)445; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i8 = urem <vscale x 4 x i8> undef, splat (i8 16)446; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = urem <vscale x 8 x i8> undef, splat (i8 16)447; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = urem <vscale x 16 x i8> undef, splat (i8 16)448; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i8 = urem <vscale x 32 x i8> undef, splat (i8 16)449; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV64i8 = urem <vscale x 64 x i8> undef, splat (i8 16)450; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void451;452 %V2i64 = urem <2 x i64> undef, splat (i64 16)453 %V4i64 = urem <4 x i64> undef, splat (i64 16)454 %V8i64 = urem <8 x i64> undef, splat (i64 16)455 %V2i32 = urem <2 x i32> undef, splat (i32 16)456 %V4i32 = urem <4 x i32> undef, splat (i32 16)457 %V8i32 = urem <8 x i32> undef, splat (i32 16)458 %V16i32 = urem <16 x i32> undef, splat (i32 16)459 %V2i16 = urem <2 x i16> undef, splat (i16 16)460 %V4i16 = urem <4 x i16> undef, splat (i16 16)461 %V8i16 = urem <8 x i16> undef, splat (i16 16)462 %V16i16 = urem <16 x i16> undef, splat (i16 16)463 %V32i16 = urem <32 x i16> undef, splat (i16 16)464 %V2i8 = urem <2 x i8> undef, splat (i8 16)465 %V4i8 = urem <4 x i8> undef, splat (i8 16)466 %V8i8 = urem <8 x i8> undef, splat (i8 16)467 %V16i8 = urem <16 x i8> undef, splat (i8 16)468 %V32i8 = urem <32 x i8> undef, splat (i8 16)469 %V64i8 = urem <64 x i8> undef, splat (i8 16)470 %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 16)471 %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 16)472 %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 16)473 %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 16)474 %NV2i32 = urem <vscale x 2 x i32> undef, splat (i32 16)475 %NV4i32 = urem <vscale x 4 x i32> undef, splat (i32 16)476 %NV8i32 = urem <vscale x 8 x i32> undef, splat (i32 16)477 %NV16i32 = urem <vscale x 16 x i32> undef, splat (i32 16)478 %NV2i16 = urem <vscale x 2 x i16> undef, splat (i16 16)479 %NV4i16 = urem <vscale x 4 x i16> undef, splat (i16 16)480 %NV8i16 = urem <vscale x 8 x i16> undef, splat (i16 16)481 %NV16i16 = urem <vscale x 16 x i16> undef, splat (i16 16)482 %NV32i16 = urem <vscale x 32 x i16> undef, splat (i16 16)483 %NV2i8 = urem <vscale x 2 x i8> undef, splat (i8 16)484 %NV4i8 = urem <vscale x 4 x i8> undef, splat (i8 16)485 %NV8i8 = urem <vscale x 8 x i8> undef, splat (i8 16)486 %NV16i8 = urem <vscale x 16 x i8> undef, splat (i8 16)487 %NV32i8 = urem <vscale x 32 x i8> undef, splat (i8 16)488 %NV64i8 = urem <vscale x 64 x i8> undef, splat (i8 16)489 ret void490}491 492define void @srem_uniformconstnegpow2() {493; CHECK-LABEL: 'srem_uniformconstnegpow2'494; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i64 = srem <2 x i64> undef, splat (i64 -16)495; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = srem <4 x i64> undef, splat (i64 -16)496; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V8i64 = srem <8 x i64> undef, splat (i64 -16)497; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i32 = srem <2 x i32> undef, splat (i32 -16)498; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i32 = srem <4 x i32> undef, splat (i32 -16)499; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = srem <8 x i32> undef, splat (i32 -16)500; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V16i32 = srem <16 x i32> undef, splat (i32 -16)501; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i16 = srem <2 x i16> undef, splat (i16 -16)502; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i16 = srem <4 x i16> undef, splat (i16 -16)503; CHECK-NEXT: Cost Model: Found costs of 4 for: %V8i16 = srem <8 x i16> undef, splat (i16 -16)504; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = srem <16 x i16> undef, splat (i16 -16)505; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V32i16 = srem <32 x i16> undef, splat (i16 -16)506; CHECK-NEXT: Cost Model: Found costs of 4 for: %V2i8 = srem <2 x i8> undef, splat (i8 -16)507; CHECK-NEXT: Cost Model: Found costs of 4 for: %V4i8 = srem <4 x i8> undef, splat (i8 -16)508; CHECK-NEXT: Cost Model: Found costs of 4 for: %V8i8 = srem <8 x i8> undef, splat (i8 -16)509; CHECK-NEXT: Cost Model: Found costs of 4 for: %V16i8 = srem <16 x i8> undef, splat (i8 -16)510; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = srem <32 x i8> undef, splat (i8 -16)511; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V64i8 = srem <64 x i8> undef, splat (i8 -16)512; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 -16)513; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 -16)514; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 -16)515; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 -16)516; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i32 = srem <vscale x 2 x i32> undef, splat (i32 -16)517; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i32 = srem <vscale x 4 x i32> undef, splat (i32 -16)518; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV8i32 = srem <vscale x 8 x i32> undef, splat (i32 -16)519; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i32 = srem <vscale x 16 x i32> undef, splat (i32 -16)520; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i16 = srem <vscale x 2 x i16> undef, splat (i16 -16)521; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i16 = srem <vscale x 4 x i16> undef, splat (i16 -16)522; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = srem <vscale x 8 x i16> undef, splat (i16 -16)523; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV16i16 = srem <vscale x 16 x i16> undef, splat (i16 -16)524; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i16 = srem <vscale x 32 x i16> undef, splat (i16 -16)525; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i8 = srem <vscale x 2 x i8> undef, splat (i8 -16)526; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i8 = srem <vscale x 4 x i8> undef, splat (i8 -16)527; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = srem <vscale x 8 x i8> undef, splat (i8 -16)528; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = srem <vscale x 16 x i8> undef, splat (i8 -16)529; CHECK-NEXT: Cost Model: Found costs of 4 for: %NV32i8 = srem <vscale x 32 x i8> undef, splat (i8 -16)530; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %NV64i8 = srem <vscale x 64 x i8> undef, splat (i8 -16)531; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void532;533 %V2i64 = srem <2 x i64> undef, splat (i64 -16)534 %V4i64 = srem <4 x i64> undef, splat (i64 -16)535 %V8i64 = srem <8 x i64> undef, splat (i64 -16)536 %V2i32 = srem <2 x i32> undef, splat (i32 -16)537 %V4i32 = srem <4 x i32> undef, splat (i32 -16)538 %V8i32 = srem <8 x i32> undef, splat (i32 -16)539 %V16i32 = srem <16 x i32> undef, splat (i32 -16)540 %V2i16 = srem <2 x i16> undef, splat (i16 -16)541 %V4i16 = srem <4 x i16> undef, splat (i16 -16)542 %V8i16 = srem <8 x i16> undef, splat (i16 -16)543 %V16i16 = srem <16 x i16> undef, splat (i16 -16)544 %V32i16 = srem <32 x i16> undef, splat (i16 -16)545 %V2i8 = srem <2 x i8> undef, splat (i8 -16)546 %V4i8 = srem <4 x i8> undef, splat (i8 -16)547 %V8i8 = srem <8 x i8> undef, splat (i8 -16)548 %V16i8 = srem <16 x i8> undef, splat (i8 -16)549 %V32i8 = srem <32 x i8> undef, splat (i8 -16)550 %V64i8 = srem <64 x i8> undef, splat (i8 -16)551 %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 -16)552 %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 -16)553 %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 -16)554 %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 -16)555 %NV2i32 = srem <vscale x 2 x i32> undef, splat (i32 -16)556 %NV4i32 = srem <vscale x 4 x i32> undef, splat (i32 -16)557 %NV8i32 = srem <vscale x 8 x i32> undef, splat (i32 -16)558 %NV16i32 = srem <vscale x 16 x i32> undef, splat (i32 -16)559 %NV2i16 = srem <vscale x 2 x i16> undef, splat (i16 -16)560 %NV4i16 = srem <vscale x 4 x i16> undef, splat (i16 -16)561 %NV8i16 = srem <vscale x 8 x i16> undef, splat (i16 -16)562 %NV16i16 = srem <vscale x 16 x i16> undef, splat (i16 -16)563 %NV32i16 = srem <vscale x 32 x i16> undef, splat (i16 -16)564 %NV2i8 = srem <vscale x 2 x i8> undef, splat (i8 -16)565 %NV4i8 = srem <vscale x 4 x i8> undef, splat (i8 -16)566 %NV8i8 = srem <vscale x 8 x i8> undef, splat (i8 -16)567 %NV16i8 = srem <vscale x 16 x i8> undef, splat (i8 -16)568 %NV32i8 = srem <vscale x 32 x i8> undef, splat (i8 -16)569 %NV64i8 = srem <vscale x 64 x i8> undef, splat (i8 -16)570 ret void571}572 573define void @urem_uniformconstnegpow2() {574; CHECK-LABEL: 'urem_uniformconstnegpow2'575; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V2i64 = urem <2 x i64> undef, splat (i64 -16)576; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V4i64 = urem <4 x i64> undef, splat (i64 -16)577; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V8i64 = urem <8 x i64> undef, splat (i64 -16)578; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i32 = urem <2 x i32> undef, splat (i32 -16)579; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V4i32 = urem <4 x i32> undef, splat (i32 -16)580; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V8i32 = urem <8 x i32> undef, splat (i32 -16)581; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V16i32 = urem <16 x i32> undef, splat (i32 -16)582; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i16 = urem <2 x i16> undef, splat (i16 -16)583; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V4i16 = urem <4 x i16> undef, splat (i16 -16)584; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V8i16 = urem <8 x i16> undef, splat (i16 -16)585; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V16i16 = urem <16 x i16> undef, splat (i16 -16)586; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V32i16 = urem <32 x i16> undef, splat (i16 -16)587; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V2i8 = urem <2 x i8> undef, splat (i8 -16)588; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V4i8 = urem <4 x i8> undef, splat (i8 -16)589; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %V8i8 = urem <8 x i8> undef, splat (i8 -16)590; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:4 Lat:4 SizeLat:4 for: %V16i8 = urem <16 x i8> undef, splat (i8 -16)591; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:4 Lat:4 SizeLat:4 for: %V32i8 = urem <32 x i8> undef, splat (i8 -16)592; CHECK-NEXT: Cost Model: Found costs of RThru:32 CodeSize:4 Lat:4 SizeLat:4 for: %V64i8 = urem <64 x i8> undef, splat (i8 -16)593; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 -16)594; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 -16)595; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 -16)596; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 -16)597; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i32 = urem <vscale x 2 x i32> undef, splat (i32 -16)598; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i32 = urem <vscale x 4 x i32> undef, splat (i32 -16)599; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i32 = urem <vscale x 8 x i32> undef, splat (i32 -16)600; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i32 = urem <vscale x 16 x i32> undef, splat (i32 -16)601; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i16 = urem <vscale x 2 x i16> undef, splat (i16 -16)602; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i16 = urem <vscale x 4 x i16> undef, splat (i16 -16)603; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i16 = urem <vscale x 8 x i16> undef, splat (i16 -16)604; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i16 = urem <vscale x 16 x i16> undef, splat (i16 -16)605; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i16 = urem <vscale x 32 x i16> undef, splat (i16 -16)606; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV2i8 = urem <vscale x 2 x i8> undef, splat (i8 -16)607; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV4i8 = urem <vscale x 4 x i8> undef, splat (i8 -16)608; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV8i8 = urem <vscale x 8 x i8> undef, splat (i8 -16)609; CHECK-NEXT: Cost Model: Found costs of RThru:6 CodeSize:4 Lat:4 SizeLat:4 for: %NV16i8 = urem <vscale x 16 x i8> undef, splat (i8 -16)610; CHECK-NEXT: Cost Model: Found costs of RThru:12 CodeSize:4 Lat:4 SizeLat:4 for: %NV32i8 = urem <vscale x 32 x i8> undef, splat (i8 -16)611; CHECK-NEXT: Cost Model: Found costs of RThru:24 CodeSize:4 Lat:4 SizeLat:4 for: %NV64i8 = urem <vscale x 64 x i8> undef, splat (i8 -16)612; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void613;614 %V2i64 = urem <2 x i64> undef, splat (i64 -16)615 %V4i64 = urem <4 x i64> undef, splat (i64 -16)616 %V8i64 = urem <8 x i64> undef, splat (i64 -16)617 %V2i32 = urem <2 x i32> undef, splat (i32 -16)618 %V4i32 = urem <4 x i32> undef, splat (i32 -16)619 %V8i32 = urem <8 x i32> undef, splat (i32 -16)620 %V16i32 = urem <16 x i32> undef, splat (i32 -16)621 %V2i16 = urem <2 x i16> undef, splat (i16 -16)622 %V4i16 = urem <4 x i16> undef, splat (i16 -16)623 %V8i16 = urem <8 x i16> undef, splat (i16 -16)624 %V16i16 = urem <16 x i16> undef, splat (i16 -16)625 %V32i16 = urem <32 x i16> undef, splat (i16 -16)626 %V2i8 = urem <2 x i8> undef, splat (i8 -16)627 %V4i8 = urem <4 x i8> undef, splat (i8 -16)628 %V8i8 = urem <8 x i8> undef, splat (i8 -16)629 %V16i8 = urem <16 x i8> undef, splat (i8 -16)630 %V32i8 = urem <32 x i8> undef, splat (i8 -16)631 %V64i8 = urem <64 x i8> undef, splat (i8 -16)632 %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 -16)633 %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 -16)634 %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 -16)635 %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 -16)636 %NV2i32 = urem <vscale x 2 x i32> undef, splat (i32 -16)637 %NV4i32 = urem <vscale x 4 x i32> undef, splat (i32 -16)638 %NV8i32 = urem <vscale x 8 x i32> undef, splat (i32 -16)639 %NV16i32 = urem <vscale x 16 x i32> undef, splat (i32 -16)640 %NV2i16 = urem <vscale x 2 x i16> undef, splat (i16 -16)641 %NV4i16 = urem <vscale x 4 x i16> undef, splat (i16 -16)642 %NV8i16 = urem <vscale x 8 x i16> undef, splat (i16 -16)643 %NV16i16 = urem <vscale x 16 x i16> undef, splat (i16 -16)644 %NV32i16 = urem <vscale x 32 x i16> undef, splat (i16 -16)645 %NV2i8 = urem <vscale x 2 x i8> undef, splat (i8 -16)646 %NV4i8 = urem <vscale x 4 x i8> undef, splat (i8 -16)647 %NV8i8 = urem <vscale x 8 x i8> undef, splat (i8 -16)648 %NV16i8 = urem <vscale x 16 x i8> undef, splat (i8 -16)649 %NV32i8 = urem <vscale x 32 x i8> undef, splat (i8 -16)650 %NV64i8 = urem <vscale x 64 x i8> undef, splat (i8 -16)651 ret void652}653