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1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py2; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,FAST16 %s3; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SLOW16 %s4; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,FAST16-SIZE %s5; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,SLOW16-SIZE %s6; END.7 8define amdgpu_kernel void @add_i32() #0 {9; ALL-LABEL: 'add_i32'10; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = add i32 undef, undef11; ALL-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = add <2 x i32> undef, undef12; ALL-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = add <3 x i32> undef, undef13; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = add <4 x i32> undef, undef14; ALL-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5i32 = add <5 x i32> undef, undef15; ALL-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v6i32 = add <6 x i32> undef, undef16; ALL-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v7i32 = add <7 x i32> undef, undef17; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i32 = add <8 x i32> undef, undef18; ALL-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v9i32 = add <9 x i32> undef, undef19; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void20;21; ALL-SIZE-LABEL: 'add_i32'22; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = add i32 undef, undef23; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = add <2 x i32> undef, undef24; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = add <3 x i32> undef, undef25; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = add <4 x i32> undef, undef26; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5i32 = add <5 x i32> undef, undef27; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v6i32 = add <6 x i32> undef, undef28; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v7i32 = add <7 x i32> undef, undef29; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i32 = add <8 x i32> undef, undef30; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v9i32 = add <9 x i32> undef, undef31; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void32;33 %i32 = add i32 undef, undef34 %v2i32 = add <2 x i32> undef, undef35 %v3i32 = add <3 x i32> undef, undef36 %v4i32 = add <4 x i32> undef, undef37 %v5i32 = add <5 x i32> undef, undef38 %v6i32 = add <6 x i32> undef, undef39 %v7i32 = add <7 x i32> undef, undef40 %v8i32 = add <8 x i32> undef, undef41 %v9i32 = add <9 x i32> undef, undef42 ret void43}44 45define amdgpu_kernel void @add_i64() #0 {46; ALL-LABEL: 'add_i64'47; ALL-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = add i64 undef, undef48; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = add <2 x i64> undef, undef49; ALL-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = add <3 x i64> undef, undef50; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = add <4 x i64> undef, undef51; ALL-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v5i64 = add <5 x i64> undef, undef52; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void53;54; ALL-SIZE-LABEL: 'add_i64'55; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = add i64 undef, undef56; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = add <2 x i64> undef, undef57; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = add <3 x i64> undef, undef58; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = add <4 x i64> undef, undef59; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v5i64 = add <5 x i64> undef, undef60; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void61;62 %i64 = add i64 undef, undef63 %v2i64 = add <2 x i64> undef, undef64 %v3i64 = add <3 x i64> undef, undef65 %v4i64 = add <4 x i64> undef, undef66 %v5i64 = add <5 x i64> undef, undef67 ret void68}69 70define amdgpu_kernel void @add_i16() #0 {71; FAST16-LABEL: 'add_i16'72; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef73; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = add <2 x i16> undef, undef74; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = add <3 x i16> undef, undef75; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = add <4 x i16> undef, undef76; FAST16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v5i16 = add <5 x i16> undef, undef77; FAST16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v6i16 = add <6 x i16> undef, undef78; FAST16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i16 = add <16 x i16> undef, undef79; FAST16-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v17i16 = add <17 x i16> undef, undef80; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void81;82; SLOW16-LABEL: 'add_i16'83; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef84; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = add <2 x i16> undef, undef85; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = add <3 x i16> undef, undef86; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = add <4 x i16> undef, undef87; SLOW16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i16 = add <5 x i16> undef, undef88; SLOW16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i16 = add <6 x i16> undef, undef89; SLOW16-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i16 = add <16 x i16> undef, undef90; SLOW16-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v17i16 = add <17 x i16> undef, undef91; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void92;93; FAST16-SIZE-LABEL: 'add_i16'94; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef95; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = add <2 x i16> undef, undef96; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = add <3 x i16> undef, undef97; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = add <4 x i16> undef, undef98; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v5i16 = add <5 x i16> undef, undef99; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v6i16 = add <6 x i16> undef, undef100; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i16 = add <16 x i16> undef, undef101; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v17i16 = add <17 x i16> undef, undef102; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void103;104; SLOW16-SIZE-LABEL: 'add_i16'105; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef106; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = add <2 x i16> undef, undef107; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = add <3 x i16> undef, undef108; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = add <4 x i16> undef, undef109; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i16 = add <5 x i16> undef, undef110; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i16 = add <6 x i16> undef, undef111; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i16 = add <16 x i16> undef, undef112; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v17i16 = add <17 x i16> undef, undef113; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void114;115 %i16 = add i16 undef, undef116 %v2i16 = add <2 x i16> undef, undef117 %v3i16 = add <3 x i16> undef, undef118 %v4i16 = add <4 x i16> undef, undef119 %v5i16 = add <5 x i16> undef, undef120 %v6i16 = add <6 x i16> undef, undef121 %v16i16 = add <16 x i16> undef, undef122 %v17i16 = add <17 x i16> undef, undef123 ret void124}125 126define amdgpu_kernel void @add_i8() #0 {127; ALL-LABEL: 'add_i8'128; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = add i8 undef, undef129; ALL-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = add <2 x i8> undef, undef130; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = add <3 x i8> undef, undef131; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = add <4 x i8> undef, undef132; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i8 = add <5 x i8> undef, undef133; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i8 = add <6 x i8> undef, undef134; ALL-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v32i8 = add <32 x i8> undef, undef135; ALL-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v33i8 = add <33 x i8> undef, undef136; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void137;138; ALL-SIZE-LABEL: 'add_i8'139; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = add i8 undef, undef140; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = add <2 x i8> undef, undef141; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = add <3 x i8> undef, undef142; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = add <4 x i8> undef, undef143; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i8 = add <5 x i8> undef, undef144; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i8 = add <6 x i8> undef, undef145; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v32i8 = add <32 x i8> undef, undef146; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v33i8 = add <33 x i8> undef, undef147; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void148;149 %i8 = add i8 undef, undef150 %v2i8 = add <2 x i8> undef, undef151 %v3i8 = add <3 x i8> undef, undef152 %v4i8 = add <4 x i8> undef, undef153 %v5i8 = add <5 x i8> undef, undef154 %v6i8 = add <6 x i8> undef, undef155 %v32i8 = add <32 x i8> undef, undef156 %v33i8 = add <33 x i8> undef, undef157 ret void158}159 160define amdgpu_kernel void @sub() #0 {161; FAST16-LABEL: 'sub'162; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i8 undef, undef163; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef164; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef165; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef166; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = sub <2 x i16> undef, undef167; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = sub <3 x i16> undef, undef168; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = sub <4 x i16> undef, undef169; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void170;171; SLOW16-LABEL: 'sub'172; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i8 undef, undef173; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef174; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef175; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef176; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = sub <2 x i16> undef, undef177; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = sub <3 x i16> undef, undef178; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = sub <4 x i16> undef, undef179; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void180;181; FAST16-SIZE-LABEL: 'sub'182; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i8 undef, undef183; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef184; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef185; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef186; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = sub <2 x i16> undef, undef187; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = sub <3 x i16> undef, undef188; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = sub <4 x i16> undef, undef189; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void190;191; SLOW16-SIZE-LABEL: 'sub'192; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i8 undef, undef193; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef194; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef195; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef196; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = sub <2 x i16> undef, undef197; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = sub <3 x i16> undef, undef198; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = sub <4 x i16> undef, undef199; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void200;201 %i8 = sub i8 undef, undef202 %i16 = sub i16 undef, undef203 %i32 = sub i32 undef, undef204 %i64 = sub i64 undef, undef205 %v2i16 = sub <2 x i16> undef, undef206 %v3i16 = sub <3 x i16> undef, undef207 %v4i16 = sub <4 x i16> undef, undef208 ret void209}210 211attributes #0 = { nounwind }212