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1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py2; RUN: opt < %s -mtriple=systemz-unknown -mcpu=z13 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s3 4define i32 @reduce_i1(i32 %arg) {5; CHECK-LABEL: 'reduce_i1'6; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V1 = call i1 @llvm.vector.reduce.and.v1i1(<1 x i1> undef)7; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2 = call i1 @llvm.vector.reduce.and.v2i1(<2 x i1> undef)8; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4 = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> undef)9; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8 = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> undef)10; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16 = call i1 @llvm.vector.reduce.and.v16i1(<16 x i1> undef)11; CHECK-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %V32 = call i1 @llvm.vector.reduce.and.v32i1(<32 x i1> undef)12; CHECK-NEXT: Cost Model: Found an estimated cost of 130 for instruction: %V64 = call i1 @llvm.vector.reduce.and.v64i1(<64 x i1> undef)13; CHECK-NEXT: Cost Model: Found an estimated cost of 258 for instruction: %V128 = call i1 @llvm.vector.reduce.and.v128i1(<128 x i1> undef)14; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef15;16 %V1 = call i1 @llvm.vector.reduce.and.v1i1(<1 x i1> undef)17 %V2 = call i1 @llvm.vector.reduce.and.v2i1(<2 x i1> undef)18 %V4 = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> undef)19 %V8 = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> undef)20 %V16 = call i1 @llvm.vector.reduce.and.v16i1(<16 x i1> undef)21 %V32 = call i1 @llvm.vector.reduce.and.v32i1(<32 x i1> undef)22 %V64 = call i1 @llvm.vector.reduce.and.v64i1(<64 x i1> undef)23 %V128 = call i1 @llvm.vector.reduce.and.v128i1(<128 x i1> undef)24 ret i32 undef25}26 27declare i1 @llvm.vector.reduce.and.v1i1(<1 x i1>)28declare i1 @llvm.vector.reduce.and.v2i1(<2 x i1>)29declare i1 @llvm.vector.reduce.and.v4i1(<4 x i1>)30declare i1 @llvm.vector.reduce.and.v8i1(<8 x i1>)31declare i1 @llvm.vector.reduce.and.v16i1(<16 x i1>)32declare i1 @llvm.vector.reduce.and.v32i1(<32 x i1>)33declare i1 @llvm.vector.reduce.and.v64i1(<64 x i1>)34declare i1 @llvm.vector.reduce.and.v128i1(<128 x i1>)35