137 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=gvn < %s | FileCheck %s3 4@u = global i32 5, align 45@w = global i32 10, align 46 7define i32 @test_load_seq_cst_unordered() {8; CHECK-LABEL: @test_load_seq_cst_unordered(9; CHECK-NEXT: [[L1:%.*]] = load atomic i32, ptr @w unordered, align 410; CHECK-NEXT: [[LV:%.*]] = load atomic i32, ptr @u seq_cst, align 411; CHECK-NEXT: [[L2:%.*]] = load atomic i32, ptr @w unordered, align 412; CHECK-NEXT: [[RES_1:%.*]] = sub i32 [[L1]], [[L2]]13; CHECK-NEXT: [[RES:%.*]] = add i32 [[RES_1]], [[LV]]14; CHECK-NEXT: ret i32 [[RES]]15;16 %l1 = load atomic i32, ptr @w unordered, align 417 %lv = load atomic i32, ptr @u seq_cst, align 418 %l2 = load atomic i32, ptr @w unordered, align 419 %res.1 = sub i32 %l1, %l220 %res = add i32 %res.1, %lv21 ret i32 %res22}23 24define i32 @test_load_acquire_unordered() {25; CHECK-LABEL: @test_load_acquire_unordered(26; CHECK-NEXT: [[L1:%.*]] = load atomic i32, ptr @w unordered, align 427; CHECK-NEXT: [[LV:%.*]] = load atomic i32, ptr @u acquire, align 428; CHECK-NEXT: [[L2:%.*]] = load atomic i32, ptr @w unordered, align 429; CHECK-NEXT: [[RES_1:%.*]] = sub i32 [[L1]], [[L2]]30; CHECK-NEXT: [[RES:%.*]] = add i32 [[RES_1]], [[LV]]31; CHECK-NEXT: ret i32 [[RES]]32;33 %l1 = load atomic i32, ptr @w unordered, align 434 %lv = load atomic i32, ptr @u acquire, align 435 %l2 = load atomic i32, ptr @w unordered, align 436 %res.1 = sub i32 %l1, %l237 %res = add i32 %res.1, %lv38 ret i32 %res39}40 41define i32 @test_store_cst_unordered(i32 %x) {42; CHECK-LABEL: @test_store_cst_unordered(43; CHECK-NEXT: store atomic i32 [[X:%.*]], ptr @u seq_cst, align 444; CHECK-NEXT: ret i32 045;46 %l1 = load atomic i32, ptr @w unordered, align 447 store atomic i32 %x, ptr @u seq_cst, align 448 %l2 = load atomic i32, ptr @w unordered, align 449 %res = sub i32 %l1, %l250 ret i32 %res51}52 53define i32 @test_store_release_unordered(i32 %x) {54; CHECK-LABEL: @test_store_release_unordered(55; CHECK-NEXT: store atomic i32 [[X:%.*]], ptr @u release, align 456; CHECK-NEXT: ret i32 057;58 %l1 = load atomic i32, ptr @w unordered, align 459 store atomic i32 %x, ptr @u release, align 460 %l2 = load atomic i32, ptr @w unordered, align 461 %res = sub i32 %l1, %l262 ret i32 %res63}64 65define i32 @test_stores_seq_cst_unordered(i32 %x) {66; CHECK-LABEL: @test_stores_seq_cst_unordered(67; CHECK-NEXT: store atomic i32 [[X:%.*]], ptr @w unordered, align 468; CHECK-NEXT: store atomic i32 [[X]], ptr @u seq_cst, align 469; CHECK-NEXT: store atomic i32 0, ptr @w unordered, align 470; CHECK-NEXT: ret i32 071;72 store atomic i32 %x, ptr @w unordered, align 473 store atomic i32 %x, ptr @u seq_cst, align 474 store atomic i32 0, ptr @w unordered, align 475 ret i32 076}77 78define i32 @test_stores_release_unordered(i32 %x) {79; CHECK-LABEL: @test_stores_release_unordered(80; CHECK-NEXT: store atomic i32 [[X:%.*]], ptr @w unordered, align 481; CHECK-NEXT: store atomic i32 [[X]], ptr @u release, align 482; CHECK-NEXT: store atomic i32 0, ptr @w unordered, align 483; CHECK-NEXT: ret i32 084;85 store atomic i32 %x, ptr @w unordered, align 486 store atomic i32 %x, ptr @u release, align 487 store atomic i32 0, ptr @w unordered, align 488 ret i32 089}90 91 92; Must respect total order for seq_cst even for unrelated addresses93define i32 @neg_load_seq_cst() {94; CHECK-LABEL: @neg_load_seq_cst(95; CHECK-NEXT: [[L1:%.*]] = load atomic i32, ptr @w seq_cst, align 496; CHECK-NEXT: [[LV:%.*]] = load atomic i32, ptr @u seq_cst, align 497; CHECK-NEXT: [[L2:%.*]] = load atomic i32, ptr @w seq_cst, align 498; CHECK-NEXT: [[RES_1:%.*]] = sub i32 [[L1]], [[L2]]99; CHECK-NEXT: [[RES:%.*]] = add i32 [[RES_1]], [[LV]]100; CHECK-NEXT: ret i32 [[RES]]101;102 %l1 = load atomic i32, ptr @w seq_cst, align 4103 %lv = load atomic i32, ptr @u seq_cst, align 4104 %l2 = load atomic i32, ptr @w seq_cst, align 4105 %res.1 = sub i32 %l1, %l2106 %res = add i32 %res.1, %lv107 ret i32 %res108}109 110define i32 @neg_store_seq_cst(i32 %x) {111; CHECK-LABEL: @neg_store_seq_cst(112; CHECK-NEXT: [[L1:%.*]] = load atomic i32, ptr @w seq_cst, align 4113; CHECK-NEXT: store atomic i32 [[X:%.*]], ptr @u seq_cst, align 4114; CHECK-NEXT: [[L2:%.*]] = load atomic i32, ptr @w seq_cst, align 4115; CHECK-NEXT: [[RES:%.*]] = sub i32 [[L1]], [[L2]]116; CHECK-NEXT: ret i32 [[RES]]117;118 %l1 = load atomic i32, ptr @w seq_cst, align 4119 store atomic i32 %x, ptr @u seq_cst, align 4120 %l2 = load atomic i32, ptr @w seq_cst, align 4121 %res = sub i32 %l1, %l2122 ret i32 %res123}124 125define i32 @neg_stores_seq_cst(i32 %x) {126; CHECK-LABEL: @neg_stores_seq_cst(127; CHECK-NEXT: store atomic i32 [[X:%.*]], ptr @w seq_cst, align 4128; CHECK-NEXT: store atomic i32 [[X]], ptr @u seq_cst, align 4129; CHECK-NEXT: store atomic i32 0, ptr @w seq_cst, align 4130; CHECK-NEXT: ret i32 0131;132 store atomic i32 %x, ptr @w seq_cst, align 4133 store atomic i32 %x, ptr @u seq_cst, align 4134 store atomic i32 0, ptr @w seq_cst, align 4135 ret i32 0136}137