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1; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s2;3; This test ensures we don't end up with multiple reaching defs for a single4; use/phi edge If we were to optimize defs, we would end up with 2=5; MemoryDef(liveOnEntry) and 4 = MemoryDef(liveOnEntry) Both would mean both6; 1,2, and 3,4 would reach the phi node. Because the phi node can only have one7; entry on each edge, it would choose 2, 4 and disconnect 1 and 3 completely8; from the SSA graph, even though they are not dead9 10define void @sink_store(i32 %index, ptr %foo, ptr %bar) {11entry:12 %cmp = trunc i32 %index to i113 br i1 %cmp, label %if.then, label %if.else14 15if.then: ; preds = %entry16; CHECK: 1 = MemoryDef(liveOnEntry)17; CHECK-NEXT: store i32 %index, ptr %foo, align 418 store i32 %index, ptr %foo, align 419; CHECK: 2 = MemoryDef(1)20; CHECK-NEXT: store i32 %index, ptr %bar, align 421 store i32 %index, ptr %bar, align 422 br label %if.end23 24if.else: ; preds = %entry25; CHECK: 3 = MemoryDef(liveOnEntry)26; CHECK-NEXT: store i32 %index, ptr %foo, align 427 store i32 %index, ptr %foo, align 428; CHECK: 4 = MemoryDef(3)29; CHECK-NEXT: store i32 %index, ptr %bar, align 430 store i32 %index, ptr %bar, align 431 br label %if.end32 33if.end: ; preds = %if.else, %if.then34; CHECK: 5 = MemoryPhi({if.then,2},{if.else,4})35; CHECK: MemoryUse(5)36; CHECK-NEXT: %c = load i32, ptr %foo37 %c = load i32, ptr %foo38; CHECK: MemoryUse(5)39; CHECK-NEXT: %d = load i32, ptr %bar40 %d = load i32, ptr %bar41 ret void42}43