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1# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s2# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s3 4---5name: test16tracksRegLiveness: true7body: |8 bb.0:9 ; CHECK-LABEL: MachineUniformityInfo for function: @test110 %2:vgpr_32 = IMPLICIT_DEF11 %1:vgpr_32 = IMPLICIT_DEF12 %0:vgpr_32 = IMPLICIT_DEF13 %3:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub114 %5:vreg_64 = COPY %315 %6:vreg_64 = COPY %316 ; CHECK: DIVERGENT{{.*}}FLAT_ATOMIC_SWAP_RTN17 %4:vgpr_32 = FLAT_ATOMIC_SWAP_RTN killed %5, %2, 0, 1, implicit $exec, implicit $flat_scr :: (load store seq_cst (s32))18 ; CHECK: DIVERGENT{{.*}}FLAT_ATOMIC_SWAP_RTN19 %7:vgpr_32 = FLAT_ATOMIC_SWAP_RTN killed %6, %2, 0, 1, implicit $exec, implicit $flat_scr ; No memopernads20 $vgpr0 = COPY %421 SI_RETURN implicit $vgpr022...23 24---25name: test226tracksRegLiveness: true27body: |28 bb.0:29 ; CHECK-LABEL: MachineUniformityInfo for function: @test230 %3:vgpr_32 = IMPLICIT_DEF31 %2:vgpr_32 = IMPLICIT_DEF32 %1:vgpr_32 = IMPLICIT_DEF33 %0:vgpr_32 = IMPLICIT_DEF34 %4:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub135 %5:sreg_64 = REG_SEQUENCE %3, %subreg.sub0, %2, %subreg.sub136 %7:vreg_64 = COPY %437 %8:vreg_64 = COPY %538 ; CHECK: DIVERGENT{{.*}}FLAT_ATOMIC_CMPSWAP_RTN39 %6:vgpr_32 = FLAT_ATOMIC_CMPSWAP_RTN killed %7, killed %8, 0, 1, implicit $exec, implicit $flat_scr :: (load store seq_cst seq_cst (s32))40 %9:sreg_64_xexec = V_CMP_EQ_U32_e64 %6, %2, implicit $exec41 %10:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, killed %9, implicit $exec42 $vgpr0 = COPY %643 $vgpr1 = COPY %1044 SI_RETURN implicit $vgpr0, implicit $vgpr145...46 47---48name: atomic_inc49tracksRegLiveness: true50body: |51 bb.0:52 ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_inc53 %2:vgpr_32 = IMPLICIT_DEF54 %1:vgpr_32 = IMPLICIT_DEF55 %0:vgpr_32 = IMPLICIT_DEF56 %3:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub157 %5:vreg_64 = COPY %358 ; CHECK: DIVERGENT{{.*}}GLOBAL_ATOMIC_INC_RTN59 %4:vgpr_32 = GLOBAL_ATOMIC_INC_RTN killed %5, %2, 0, 1, implicit $exec :: (load store (s32), addrspace 1)60 $vgpr0 = COPY %461 SI_RETURN implicit $vgpr062...63 64---65name: atomic_inc_6466tracksRegLiveness: true67body: |68 bb.0:69 ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_inc_6470 %3:vgpr_32 = IMPLICIT_DEF71 %2:vgpr_32 = IMPLICIT_DEF72 %1:vgpr_32 = IMPLICIT_DEF73 %0:vgpr_32 = IMPLICIT_DEF74 %4:sreg_64 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub175 %5:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub176 %7:vreg_64 = COPY %577 %8:vreg_64 = COPY %478 ; CHECK: DIVERGENT{{.*}}GLOBAL_ATOMIC_INC_X2_RTN79 %6:vreg_64 = GLOBAL_ATOMIC_INC_X2_RTN killed %7, killed %8, 0, 1, implicit $exec :: (load store (s64), addrspace 1)80 %9:vgpr_32 = COPY %6.sub181 %10:vgpr_32 = COPY %6.sub082 $vgpr0 = COPY %1083 $vgpr1 = COPY %984 SI_RETURN implicit $vgpr0, implicit $vgpr185...86 87---88name: atomic_dec89tracksRegLiveness: true90body: |91 bb.0:92 ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_dec93 %2:vgpr_32 = IMPLICIT_DEF94 %1:vgpr_32 = IMPLICIT_DEF95 %0:vgpr_32 = IMPLICIT_DEF96 %3:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub197 %5:vreg_64 = COPY %398 ; CHECK: DIVERGENT{{.*}}GLOBAL_ATOMIC_DEC_RTN99 %4:vgpr_32 = GLOBAL_ATOMIC_DEC_RTN killed %5, %2, 0, 1, implicit $exec :: (load store (s32), addrspace 1)100 $vgpr0 = COPY %4101 SI_RETURN implicit $vgpr0102...103 104 105---106name: atomic_dec_64107tracksRegLiveness: true108body: |109 bb.0:110 ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_dec_64111 %3:vgpr_32 = IMPLICIT_DEF112 %2:vgpr_32 = IMPLICIT_DEF113 %1:vgpr_32 = IMPLICIT_DEF114 %0:vgpr_32 = IMPLICIT_DEF115 %4:sreg_64 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1116 %5:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1117 %7:vreg_64 = COPY %5118 %8:vreg_64 = COPY %4119 ; CHECK: DIVERGENT{{.*}}GLOBAL_ATOMIC_DEC_X2_RTN120 %6:vreg_64 = GLOBAL_ATOMIC_DEC_X2_RTN killed %7, killed %8, 0, 1, implicit $exec :: (load store (s64), addrspace 1)121 %9:vgpr_32 = COPY %6.sub1122 %10:vgpr_32 = COPY %6.sub0123 $vgpr0 = COPY %10124 $vgpr1 = COPY %9125 SI_RETURN implicit $vgpr0, implicit $vgpr1126...127