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1; RUN: opt -mtriple amdgcn-unknown-amdhsa -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s2 3; CHECK-LABEL: for function 'readfirstlane':4define amdgpu_kernel void @readfirstlane() {5 %id.x = call i32 @llvm.amdgcn.workitem.id.x()6; CHECK: DIVERGENT: %id.x = call i32 @llvm.amdgcn.workitem.id.x()7 %first.lane = call i32 @llvm.amdgcn.readfirstlane(i32 %id.x)8; CHECK-NOT: DIVERGENT: %first.lane = call i32 @llvm.amdgcn.readfirstlane(i32 %id.x)9 ret void10}11 12; CHECK-LABEL: for function 'icmp':13define amdgpu_kernel void @icmp(i32 inreg %x) {14; CHECK-NOT: DIVERGENT: %icmp = call i64 @llvm.amdgcn.icmp.i3215 %icmp = call i64 @llvm.amdgcn.icmp.i32(i32 %x, i32 0, i32 33)16 ret void17}18 19; CHECK-LABEL: for function 'fcmp':20define amdgpu_kernel void @fcmp(float inreg %x, float inreg %y) {21; CHECK-NOT: DIVERGENT: %fcmp = call i64 @llvm.amdgcn.fcmp.i3222 %fcmp = call i64 @llvm.amdgcn.fcmp.i32(float %x, float %y, i32 33)23 ret void24}25 26; CHECK-LABEL: for function 'ballot':27define amdgpu_kernel void @ballot(i1 inreg %x) {28; CHECK-NOT: DIVERGENT: %ballot = call i64 @llvm.amdgcn.ballot.i3229 %ballot = call i64 @llvm.amdgcn.ballot.i32(i1 %x)30 ret void31}32 33; SGPR asm outputs are uniform regardless of the input operands.34; CHECK-LABEL: for function 'asm_sgpr':35; CHECK: DIVERGENT: i32 %divergent36; CHECK-NOT: DIVERGENT37define i32 @asm_sgpr(i32 %divergent) {38 %sgpr = call i32 asm "; def $0, $1","=s,v"(i32 %divergent)39 ret i32 %sgpr40}41 42; SGPR asm outputs are uniform regardless of the input operands.43; Argument not divergent if marked inreg.44; CHECK-LABEL: for function 'asm_sgpr_inreg_arg':45; CHECK-NOT: DIVERGENT46define i32 @asm_sgpr_inreg_arg(i32 inreg %divergent) {47 %sgpr = call i32 asm "; def $0, $1","=s,v"(i32 %divergent)48 ret i32 %sgpr49}50 51; CHECK-LABEL: for function 'asm_mixed_sgpr_vgpr':52; CHECK: DIVERGENT: %asm = call { i32, i32 } asm "; def $0, $1, $2", "=s,=v,v"(i32 %divergent)53; CHECK-NEXT: {{^[ \t]+}}%sgpr = extractvalue { i32, i32 } %asm, 054; CHECK-NEXT: DIVERGENT: %vgpr = extractvalue { i32, i32 } %asm, 155define void @asm_mixed_sgpr_vgpr(i32 %divergent) {56 %asm = call { i32, i32 } asm "; def $0, $1, $2","=s,=v,v"(i32 %divergent)57 %sgpr = extractvalue { i32, i32 } %asm, 058 %vgpr = extractvalue { i32, i32 } %asm, 159 store i32 %sgpr, ptr addrspace(1) undef60 store i32 %vgpr, ptr addrspace(1) undef61 ret void62}63 64; CHECK-LABEL: for function 'single_lane_func_arguments':65; CHECK-NOT: DIVERGENT66define void @single_lane_func_arguments(i32 %i32, i1 %i1) #2 {67 ret void68}69 70; CHECK-LABEL: for function 'divergent_args':71; CHECK: DIVERGENT ARGUMENTS72define void @divergent_args(i32 %i32, i1 %i1) {73 ret void74}75 76; CHECK-LABEL: for function 'no_divergent_args_if_inreg':77; CHECK-NOT: DIVERGENT78define void @no_divergent_args_if_inreg(i32 inreg %i32, i1 inreg %i1) {79 ret void80}81 82; CHECK-LABEL: for function 'workgroup_id_x':83; CHECK: ALL VALUES UNIFORM84define void @workgroup_id_x(ptr addrspace(1) inreg %out) {85 %result = call i32 @llvm.amdgcn.workgroup.id.x()86 store i32 %result, ptr addrspace(1) %out, align 487 ret void88}89 90; CHECK-LABEL: for function 'workgroup_id_y':91; CHECK: ALL VALUES UNIFORM92define void @workgroup_id_y(ptr addrspace(1) inreg %out) {93 %result = call i32 @llvm.amdgcn.workgroup.id.y()94 store i32 %result, ptr addrspace(1) %out, align 495 ret void96}97 98; CHECK-LABEL: for function 'workgroup_id_z':99; CHECK: ALL VALUES UNIFORM100define void @workgroup_id_z(ptr addrspace(1) inreg %out) {101 %result = call i32 @llvm.amdgcn.workgroup.id.z()102 store i32 %result, ptr addrspace(1) %out, align 4103 ret void104}105 106; CHECK-LABEL: for function 's_getpc':107; CHECK: ALL VALUES UNIFORM108define void @s_getpc(ptr addrspace(1) inreg %out) {109 %result = call i64 @llvm.amdgcn.s.getpc()110 store i64 %result, ptr addrspace(1) %out, align 8111 ret void112}113 114; CHECK-LABEL: for function 's_getreg':115; CHECK: ALL VALUES UNIFORM116define void @s_getreg(ptr addrspace(1) inreg %out) {117 %result = call i32 @llvm.amdgcn.s.getreg(i32 123)118 store i32 %result, ptr addrspace(1) %out, align 4119 ret void120}121 122; CHECK-LABEL: for function 'cluster_workgroup_id_x':123; CHECK: ALL VALUES UNIFORM124define void @cluster_workgroup_id_x(ptr addrspace(1) inreg %out) {125 %result = call i32 @llvm.amdgcn.cluster.workgroup.id.x()126 store i32 %result, ptr addrspace(1) %out, align 4127 ret void128}129 130; CHECK-LABEL: for function 'cluster_workgroup_id_y':131; CHECK: ALL VALUES UNIFORM132define void @cluster_workgroup_id_y(ptr addrspace(1) inreg %out) {133 %result = call i32 @llvm.amdgcn.cluster.workgroup.id.y()134 store i32 %result, ptr addrspace(1) %out, align 4135 ret void136}137 138; CHECK-LABEL: for function 'cluster_workgroup_id_z':139; CHECK: ALL VALUES UNIFORM140define void @cluster_workgroup_id_z(ptr addrspace(1) inreg %out) {141 %result = call i32 @llvm.amdgcn.cluster.workgroup.id.z()142 store i32 %result, ptr addrspace(1) %out, align 4143 ret void144}145 146; CHECK-LABEL: for function 'cluster_workgroup_flat_id':147; CHECK: ALL VALUES UNIFORM148define void @cluster_workgroup_flat_id(ptr addrspace(1) inreg %out) {149 %result = call i32 @llvm.amdgcn.cluster.workgroup.flat.id()150 store i32 %result, ptr addrspace(1) %out, align 4151 ret void152}153 154; CHECK-LABEL: for function 'cluster_workgroup_max_id_x':155; CHECK: ALL VALUES UNIFORM156define void @cluster_workgroup_max_id_x(ptr addrspace(1) inreg %out) {157 %result = call i32 @llvm.amdgcn.cluster.workgroup.max.id.x()158 store i32 %result, ptr addrspace(1) %out, align 4159 ret void160}161 162; CHECK-LABEL: for function 'cluster_workgroup_max_id_y':163; CHECK: ALL VALUES UNIFORM164define void @cluster_workgroup_max_id_y(ptr addrspace(1) inreg %out) {165 %result = call i32 @llvm.amdgcn.cluster.workgroup.max.id.y()166 store i32 %result, ptr addrspace(1) %out, align 4167 ret void168}169 170; CHECK-LABEL: for function 'cluster_workgroup_max_id_z':171; CHECK: ALL VALUES UNIFORM172define void @cluster_workgroup_max_id_z(ptr addrspace(1) inreg %out) {173 %result = call i32 @llvm.amdgcn.cluster.workgroup.max.id.z()174 store i32 %result, ptr addrspace(1) %out, align 4175 ret void176}177 178; CHECK-LABEL: for function 'cluster_workgroup_max_flat_id':179; CHECK: ALL VALUES UNIFORM180define void @cluster_workgroup_max_flat_id(ptr addrspace(1) inreg %out) {181 %result = call i32 @llvm.amdgcn.cluster.workgroup.max.flat.id()182 store i32 %result, ptr addrspace(1) %out, align 4183 ret void184}185 186; CHECK-LABEL: for function 's_memtime':187; CHECK: ALL VALUES UNIFORM188define void @s_memtime(ptr addrspace(1) inreg %out) {189 %result = call i64 @llvm.amdgcn.s.memtime()190 store i64 %result, ptr addrspace(1) %out, align 8191 ret void192}193 194; CHECK-LABEL: for function 's_memrealtime':195; CHECK: ALL VALUES UNIFORM196define void @s_memrealtime(ptr addrspace(1) inreg %out) {197 %result = call i64 @llvm.amdgcn.s.memrealtime()198 store i64 %result, ptr addrspace(1) %out, align 8199 ret void200}201 202 203declare i32 @llvm.amdgcn.workitem.id.x() #0204declare i32 @llvm.amdgcn.readfirstlane(i32) #0205declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #1206declare i64 @llvm.amdgcn.fcmp.i32(float, float, i32) #1207declare i64 @llvm.amdgcn.ballot.i32(i1) #1208declare i32 @llvm.amdgcn.workgroup.id.x() #0209declare i32 @llvm.amdgcn.workgroup.id.y() #0210declare i32 @llvm.amdgcn.workgroup.id.z() #0211declare i32 @llvm.amdgcn.cluster.workgroup.id.x()212declare i32 @llvm.amdgcn.cluster.workgroup.id.y()213declare i32 @llvm.amdgcn.cluster.workgroup.id.z()214declare i32 @llvm.amdgcn.cluster.workgroup.flat.id()215declare i32 @llvm.amdgcn.cluster.workgroup.max.id.x()216declare i32 @llvm.amdgcn.cluster.workgroup.max.id.y()217declare i32 @llvm.amdgcn.cluster.workgroup.max.id.z()218declare i32 @llvm.amdgcn.cluster.workgroup.max.flat.id()219 220attributes #0 = { nounwind readnone }221attributes #1 = { nounwind readnone convergent }222attributes #2 = { "amdgpu-flat-work-group-size"="1,1" }223