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1; RUN: opt -mtriple amdgcn-mesa-mesa3d -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s2 3; Tests control flow intrinsics that should be treated as uniform4 5; CHECK: for function 'test_if_break':6; CHECK: DIVERGENT: %cond = icmp eq i32 %arg0, 07; CHECK-NOT: DIVERGENT8; CHECK: ret void9define amdgpu_ps void @test_if_break(i32 %arg0, i64 inreg %saved) {10entry:11 %cond = icmp eq i32 %arg0, 012 %break = call i64 @llvm.amdgcn.if.break.i64.i64(i1 %cond, i64 %saved)13 store volatile i64 %break, ptr addrspace(1) undef14 ret void15}16 17; CHECK: for function 'test_if':18; CHECK: DIVERGENT: %cond = icmp eq i32 %arg0, 019; CHECK-NEXT: DIVERGENT: %if = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %cond)20; CHECK-NEXT: DIVERGENT: %if.bool = extractvalue { i1, i64 } %if, 021; CHECK-NOT: DIVERGENT22; CHECK: DIVERGENT: %if.bool.ext = zext i1 %if.bool to i3223define void @test_if(i32 %arg0) {24entry:25 %cond = icmp eq i32 %arg0, 026 %if = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %cond)27 %if.bool = extractvalue { i1, i64 } %if, 028 %if.mask = extractvalue { i1, i64 } %if, 129 %if.bool.ext = zext i1 %if.bool to i3230 store volatile i32 %if.bool.ext, ptr addrspace(1) undef31 store volatile i64 %if.mask, ptr addrspace(1) undef32 ret void33}34 35; The result should still be treated as divergent, even with a uniform source.36; CHECK: for function 'test_if_uniform':37; CHECK-NOT: DIVERGENT38; CHECK: DIVERGENT: %if = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %cond)39; CHECK-NEXT: DIVERGENT: %if.bool = extractvalue { i1, i64 } %if, 040; CHECK-NOT: DIVERGENT41; CHECK: DIVERGENT: %if.bool.ext = zext i1 %if.bool to i3242define amdgpu_ps void @test_if_uniform(i32 inreg %arg0) {43entry:44 %cond = icmp eq i32 %arg0, 045 %if = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %cond)46 %if.bool = extractvalue { i1, i64 } %if, 047 %if.mask = extractvalue { i1, i64 } %if, 148 %if.bool.ext = zext i1 %if.bool to i3249 store volatile i32 %if.bool.ext, ptr addrspace(1) undef50 store volatile i64 %if.mask, ptr addrspace(1) undef51 ret void52}53 54; CHECK: for function 'test_loop_uniform':55; CHECK: DIVERGENT: %loop = call i1 @llvm.amdgcn.loop.i64(i64 %mask)56define amdgpu_ps void @test_loop_uniform(i64 inreg %mask) {57entry:58 %loop = call i1 @llvm.amdgcn.loop.i64(i64 %mask)59 %loop.ext = zext i1 %loop to i3260 store volatile i32 %loop.ext, ptr addrspace(1) undef61 ret void62}63 64; CHECK: for function 'test_else':65; CHECK: DIVERGENT: %else = call { i1, i64 } @llvm.amdgcn.else.i64.i64(i64 %mask)66; CHECK: DIVERGENT: %else.bool = extractvalue { i1, i64 } %else, 067; CHECK: {{^[ \t]+}}%else.mask = extractvalue { i1, i64 } %else, 168define amdgpu_ps void @test_else(i64 inreg %mask) {69entry:70 %else = call { i1, i64 } @llvm.amdgcn.else.i64.i64(i64 %mask)71 %else.bool = extractvalue { i1, i64 } %else, 072 %else.mask = extractvalue { i1, i64 } %else, 173 %else.bool.ext = zext i1 %else.bool to i3274 store volatile i32 %else.bool.ext, ptr addrspace(1) undef75 store volatile i64 %else.mask, ptr addrspace(1) undef76 ret void77}78 79; This case is probably always broken80; CHECK: for function 'test_else_divergent_mask':81; CHECK: DIVERGENT: %if = call { i1, i64 } @llvm.amdgcn.else.i64.i64(i64 %mask)82; CHECK-NEXT: DIVERGENT: %if.bool = extractvalue { i1, i64 } %if, 083; CHECK-NOT: DIVERGENT84; CHECK: DIVERGENT: %if.bool.ext = zext i1 %if.bool to i3285define void @test_else_divergent_mask(i64 %mask) {86entry:87 %if = call { i1, i64 } @llvm.amdgcn.else.i64.i64(i64 %mask)88 %if.bool = extractvalue { i1, i64 } %if, 089 %if.mask = extractvalue { i1, i64 } %if, 190 %if.bool.ext = zext i1 %if.bool to i3291 store volatile i32 %if.bool.ext, ptr addrspace(1) undef92 store volatile i64 %if.mask, ptr addrspace(1) undef93 ret void94}95 96declare { i1, i64 } @llvm.amdgcn.if.i64(i1) #097declare { i1, i64 } @llvm.amdgcn.else.i64.i64(i64) #098declare i64 @llvm.amdgcn.if.break.i64.i64(i1, i64) #199declare i1 @llvm.amdgcn.loop.i64(i64) #1100 101attributes #0 = { convergent nounwind }102attributes #1 = { convergent nounwind readnone }103